1/*- 2 * Copyright (c) 1995, David Greenman 3 * All rights reserved. 4 * 5 * Redistribution and use in source and binary forms, with or without 6 * modification, are permitted provided that the following conditions 7 * are met: 8 * 1. Redistributions of source code must retain the above copyright 9 * notice unmodified, this list of conditions, and the following 10 * disclaimer. 11 * 2. Redistributions in binary form must reproduce the above copyright 12 * notice, this list of conditions and the following disclaimer in the 13 * documentation and/or other materials provided with the distribution. 14 * 15 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND 16 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 17 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 18 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE 19 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 20 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 21 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 22 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 23 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 24 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 25 * SUCH DAMAGE. 26 */ 27 28#include <sys/cdefs.h>
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29__FBSDID("$FreeBSD: head/sys/dev/ed/if_ed.c 154895 2006-01-27 08:25:47Z imp $");
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29__FBSDID("$FreeBSD: head/sys/dev/ed/if_ed.c 154924 2006-01-27 19:10:13Z imp $"); |
30 31/* 32 * Device driver for National Semiconductor DS8390/WD83C690 based ethernet 33 * adapters. By David Greenman, 29-April-1993 34 * 35 * Currently supports the Western Digital/SMC 8003 and 8013 series, 36 * the SMC Elite Ultra (8216), the 3Com 3c503, the NE1000 and NE2000, 37 * and a variety of similar clones. 38 * 39 */ 40 41#include "opt_ed.h" 42 43#include <sys/param.h> 44#include <sys/systm.h> 45#include <sys/sockio.h> 46#include <sys/mbuf.h> 47#include <sys/kernel.h> 48#include <sys/socket.h> 49#include <sys/syslog.h> 50 51#include <sys/bus.h> 52 53#include <machine/bus.h> 54#include <sys/rman.h> 55#include <machine/resource.h> 56 57#include <net/ethernet.h> 58#include <net/if.h> 59#include <net/if_arp.h> 60#include <net/if_dl.h> 61#include <net/if_mib.h> 62#include <net/if_media.h> 63#include <net/if_types.h> 64 65#include <net/bpf.h> 66 67#include <dev/ed/if_edreg.h> 68#include <dev/ed/if_edvar.h> 69#include <sys/kdb.h> 70 71devclass_t ed_devclass; 72 73static void ed_init(void *); 74static void ed_init_locked(struct ed_softc *); 75static int ed_ioctl(struct ifnet *, u_long, caddr_t); 76static void ed_start(struct ifnet *); 77static void ed_start_locked(struct ifnet *); 78static void ed_reset(struct ifnet *); 79static void ed_watchdog(struct ifnet *); 80 81static void ed_ds_getmcaf(struct ed_softc *, uint32_t *); 82 83static void ed_get_packet(struct ed_softc *, bus_size_t, u_short); 84static void ed_stop_hw(struct ed_softc *sc); 85 86static __inline void ed_rint(struct ed_softc *); 87static __inline void ed_xmit(struct ed_softc *); 88static __inline void ed_ring_copy(struct ed_softc *, bus_size_t, char *, 89 u_short);
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90static u_short ed_pio_write_mbufs(struct ed_softc *, struct mbuf *,
91 bus_size_t);
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90 91static void ed_setrcr(struct ed_softc *); 92 93/* 94 * Generic probe routine for testing for the existance of a DS8390. 95 * Must be called after the NIC has just been reset. This routine 96 * works by looking at certain register values that are guaranteed 97 * to be initialized a certain way after power-up or reset. Seems 98 * not to currently work on the 83C690. 99 * 100 * Specifically: 101 * 102 * Register reset bits set bits 103 * Command Register (CR) TXP, STA RD2, STP 104 * Interrupt Status (ISR) RST 105 * Interrupt Mask (IMR) All bits 106 * Data Control (DCR) LAS 107 * Transmit Config. (TCR) LB1, LB0 108 * 109 * We only look at the CR and ISR registers, however, because looking at 110 * the others would require changing register pages (which would be 111 * intrusive if this isn't an 8390). 112 * 113 * Return 1 if 8390 was found, 0 if not. 114 */ 115 116int 117ed_probe_generic8390(struct ed_softc *sc) 118{ 119 if ((ed_nic_inb(sc, ED_P0_CR) & 120 (ED_CR_RD2 | ED_CR_TXP | ED_CR_STA | ED_CR_STP)) != 121 (ED_CR_RD2 | ED_CR_STP)) 122 return (0); 123 if ((ed_nic_inb(sc, ED_P0_ISR) & ED_ISR_RST) != ED_ISR_RST) 124 return (0); 125 126 return (1); 127} 128 129void 130ed_disable_16bit_access(struct ed_softc *sc) 131{ 132 /* 133 * Disable 16 bit access to shared memory 134 */ 135 if (sc->isa16bit && sc->vendor == ED_VENDOR_WD_SMC) { 136 if (sc->chip_type == ED_CHIP_TYPE_WD790) 137 ed_asic_outb(sc, ED_WD_MSR, 0x00); 138 ed_asic_outb(sc, ED_WD_LAAR, 139 sc->wd_laar_proto & ~ED_WD_LAAR_M16EN); 140 } 141} 142 143void 144ed_enable_16bit_access(struct ed_softc *sc) 145{ 146 if (sc->isa16bit && sc->vendor == ED_VENDOR_WD_SMC) { 147 ed_asic_outb(sc, ED_WD_LAAR, 148 sc->wd_laar_proto | ED_WD_LAAR_M16EN); 149 if (sc->chip_type == ED_CHIP_TYPE_WD790) 150 ed_asic_outb(sc, ED_WD_MSR, ED_WD_MSR_MENB); 151 } 152} 153 154/* 155 * Allocate a port resource with the given resource id. 156 */ 157int 158ed_alloc_port(device_t dev, int rid, int size) 159{ 160 struct ed_softc *sc = device_get_softc(dev); 161 struct resource *res; 162 163 res = bus_alloc_resource(dev, SYS_RES_IOPORT, &rid, 164 0ul, ~0ul, size, RF_ACTIVE); 165 if (res) { 166 sc->port_rid = rid; 167 sc->port_res = res; 168 sc->port_used = size; 169 sc->port_bst = rman_get_bustag(res); 170 sc->port_bsh = rman_get_bushandle(res); 171 return (0); 172 } 173 return (ENOENT); 174} 175 176/* 177 * Allocate a memory resource with the given resource id. 178 */ 179int 180ed_alloc_memory(device_t dev, int rid, int size) 181{ 182 struct ed_softc *sc = device_get_softc(dev); 183 struct resource *res; 184 185 res = bus_alloc_resource(dev, SYS_RES_MEMORY, &rid, 186 0ul, ~0ul, size, RF_ACTIVE); 187 if (res) { 188 sc->mem_rid = rid; 189 sc->mem_res = res; 190 sc->mem_used = size; 191 sc->mem_bst = rman_get_bustag(res); 192 sc->mem_bsh = rman_get_bushandle(res); 193 return (0); 194 } 195 return (ENOENT); 196} 197 198/* 199 * Allocate an irq resource with the given resource id. 200 */ 201int 202ed_alloc_irq(device_t dev, int rid, int flags) 203{ 204 struct ed_softc *sc = device_get_softc(dev); 205 struct resource *res; 206 207 res = bus_alloc_resource_any(dev, SYS_RES_IRQ, &rid, RF_ACTIVE | flags); 208 if (res) { 209 sc->irq_rid = rid; 210 sc->irq_res = res; 211 return (0); 212 } 213 return (ENOENT); 214} 215 216/* 217 * Release all resources 218 */ 219void 220ed_release_resources(device_t dev) 221{ 222 struct ed_softc *sc = device_get_softc(dev); 223 224 if (sc->port_res) { 225 bus_deactivate_resource(dev, SYS_RES_IOPORT, 226 sc->port_rid, sc->port_res); 227 bus_release_resource(dev, SYS_RES_IOPORT, 228 sc->port_rid, sc->port_res); 229 sc->port_res = 0; 230 } 231 if (sc->mem_res) { 232 bus_deactivate_resource(dev, SYS_RES_MEMORY, 233 sc->mem_rid, sc->mem_res); 234 bus_release_resource(dev, SYS_RES_MEMORY, 235 sc->mem_rid, sc->mem_res); 236 sc->mem_res = 0; 237 } 238 if (sc->irq_res) { 239 bus_deactivate_resource(dev, SYS_RES_IRQ, 240 sc->irq_rid, sc->irq_res); 241 bus_release_resource(dev, SYS_RES_IRQ, 242 sc->irq_rid, sc->irq_res); 243 sc->irq_res = 0; 244 } 245 if (sc->ifp) 246 if_free(sc->ifp); 247} 248 249/* 250 * Install interface into kernel networking data structures 251 */ 252int 253ed_attach(device_t dev) 254{ 255 struct ed_softc *sc = device_get_softc(dev); 256 struct ifnet *ifp; 257 258 sc->dev = dev; 259 ED_LOCK_INIT(sc); 260 ifp = sc->ifp = if_alloc(IFT_ETHER); 261 if (ifp == NULL) { 262 device_printf(dev, "can not if_alloc()\n"); 263 ED_LOCK_DESTROY(sc); 264 return (ENOSPC); 265 } 266 267 if (sc->readmem == NULL) { 268 if (sc->mem_shared) { 269 if (sc->isa16bit) 270 sc->readmem = ed_shmem_readmem16; 271 else 272 sc->readmem = ed_shmem_readmem8; 273 } else { 274 sc->readmem = ed_pio_readmem; 275 } 276 }
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279
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277 if (sc->sc_write_mbufs == NULL) { 278 device_printf(dev, "No write mbufs routine set\n"); 279 return (ENXIO); 280 } 281 |
282 callout_init_mtx(&sc->tick_ch, ED_MUTEX(sc), 0); 283 /* 284 * Set interface to stopped condition (reset) 285 */ 286 ed_stop_hw(sc); 287 288 /* 289 * Initialize ifnet structure 290 */ 291 ifp->if_softc = sc; 292 if_initname(ifp, device_get_name(dev), device_get_unit(dev)); 293 ifp->if_start = ed_start; 294 ifp->if_ioctl = ed_ioctl; 295 ifp->if_watchdog = ed_watchdog; 296 ifp->if_init = ed_init; 297 IFQ_SET_MAXLEN(&ifp->if_snd, IFQ_MAXLEN); 298 ifp->if_snd.ifq_drv_maxlen = IFQ_MAXLEN; 299 IFQ_SET_READY(&ifp->if_snd); 300 ifp->if_linkmib = &sc->mibdata; 301 ifp->if_linkmiblen = sizeof sc->mibdata; 302 /* 303 * XXX - should do a better job. 304 */ 305 if (sc->chip_type == ED_CHIP_TYPE_WD790) 306 sc->mibdata.dot3StatsEtherChipSet = 307 DOT3CHIPSET(dot3VendorWesternDigital, 308 dot3ChipSetWesternDigital83C790); 309 else 310 sc->mibdata.dot3StatsEtherChipSet = 311 DOT3CHIPSET(dot3VendorNational, 312 dot3ChipSetNational8390); 313 sc->mibdata.dot3Compliance = DOT3COMPLIANCE_COLLS; 314 315 ifp->if_flags = IFF_BROADCAST | IFF_SIMPLEX | IFF_MULTICAST; 316 /* 317 * Set default state for LINK2 flag (used to disable the 318 * tranceiver for AUI operation), based on config option. 319 * We only set this flag before we attach the device, so there's 320 * no race. It is convenient to allow users to turn this off 321 * by default in the kernel config, but given our more advanced 322 * boot time configuration options, this might no longer be needed. 323 */ 324 if (device_get_flags(dev) & ED_FLAGS_DISABLE_TRANCEIVER) 325 ifp->if_flags |= IFF_LINK2; 326 327 /* 328 * Attach the interface 329 */ 330 ether_ifattach(ifp, sc->enaddr); 331 /* device attach does transition from UNCONFIGURED to IDLE state */ 332 333 if (bootverbose || 1) { 334 if (sc->type_str && (*sc->type_str != 0)) 335 device_printf(dev, "type %s ", sc->type_str); 336 else 337 device_printf(dev, "type unknown (0x%x) ", sc->type); 338 339#ifdef ED_HPP 340 if (sc->vendor == ED_VENDOR_HP) 341 printf("(%s %s IO)", 342 (sc->hpp_id & ED_HPP_ID_16_BIT_ACCESS) ? 343 "16-bit" : "32-bit", 344 sc->hpp_mem_start ? "memory mapped" : "regular"); 345 else 346#endif 347 printf("%s", sc->isa16bit ? "(16 bit)" : "(8 bit)"); 348 349#if defined(ED_HPP) || defined(ED_3C503) 350 printf("%s", (((sc->vendor == ED_VENDOR_3COM) || 351 (sc->vendor == ED_VENDOR_HP)) && 352 (ifp->if_flags & IFF_LINK2)) ? 353 " tranceiver disabled" : ""); 354#endif 355 printf("\n"); 356 } 357 return (0); 358} 359 360/* 361 * Detach the driver from the hardware and other systems in the kernel. 362 */ 363int 364ed_detach(device_t dev) 365{ 366 struct ed_softc *sc = device_get_softc(dev); 367 struct ifnet *ifp = sc->ifp; 368 369 ED_ASSERT_UNLOCKED(sc); 370 ED_LOCK(sc); 371 if (bus_child_present(dev)) 372 ed_stop(sc); 373 ifp->if_drv_flags &= ~IFF_DRV_RUNNING; 374 ED_UNLOCK(sc); 375 callout_drain(&sc->tick_ch); 376 ether_ifdetach(ifp); 377 bus_teardown_intr(dev, sc->irq_res, sc->irq_handle); 378 ed_release_resources(dev); 379 ED_LOCK_DESTROY(sc); 380 bus_generic_detach(dev); 381 return (0); 382} 383 384/* 385 * Reset interface. 386 */ 387static void 388ed_reset(struct ifnet *ifp) 389{ 390 struct ed_softc *sc = ifp->if_softc; 391 392 ED_ASSERT_LOCKED(sc); 393 /* 394 * Stop interface and re-initialize. 395 */ 396 ed_stop(sc); 397 ed_init_locked(sc); 398} 399 400static void 401ed_stop_hw(struct ed_softc *sc) 402{ 403 int n = 5000; 404 405 /* 406 * Stop everything on the interface, and select page 0 registers. 407 */ 408 ed_nic_outb(sc, ED_P0_CR, sc->cr_proto | ED_CR_STP); 409 410 /* 411 * Wait for interface to enter stopped state, but limit # of checks to 412 * 'n' (about 5ms). It shouldn't even take 5us on modern DS8390's, but 413 * just in case it's an old one. 414 */ 415 if (sc->chip_type != ED_CHIP_TYPE_AX88190) 416 while (((ed_nic_inb(sc, ED_P0_ISR) & ED_ISR_RST) == 0) && --n) 417 continue; 418} 419 420/* 421 * Take interface offline. 422 */ 423void 424ed_stop(struct ed_softc *sc) 425{ 426 ED_ASSERT_LOCKED(sc); 427 if (sc->sc_tick) 428 callout_stop(&sc->tick_ch); 429 ed_stop_hw(sc); 430} 431 432/* 433 * Device timeout/watchdog routine. Entered if the device neglects to 434 * generate an interrupt after a transmit has been started on it. 435 */ 436static void 437ed_watchdog(struct ifnet *ifp) 438{ 439 struct ed_softc *sc = ifp->if_softc; 440 441 log(LOG_ERR, "%s: device timeout\n", ifp->if_xname); 442 ifp->if_oerrors++; 443 444 ED_LOCK(sc); 445 ed_reset(ifp); 446 ED_UNLOCK(sc); 447} 448 449/* 450 * Initialize device. 451 */ 452static void 453ed_init(void *xsc) 454{ 455 struct ed_softc *sc = xsc; 456 457 ED_ASSERT_UNLOCKED(sc); 458 ED_LOCK(sc); 459 ed_init_locked(sc); 460 ED_UNLOCK(sc); 461} 462 463static void 464ed_init_locked(struct ed_softc *sc) 465{ 466 struct ifnet *ifp = sc->ifp; 467 int i; 468 469 ED_ASSERT_LOCKED(sc); 470 471 /* 472 * Initialize the NIC in the exact order outlined in the NS manual. 473 * This init procedure is "mandatory"...don't change what or when 474 * things happen. 475 */ 476 477 /* reset transmitter flags */ 478 sc->xmit_busy = 0; 479 ifp->if_timer = 0; 480 481 sc->txb_inuse = 0; 482 sc->txb_new = 0; 483 sc->txb_next_tx = 0; 484 485 /* This variable is used below - don't move this assignment */ 486 sc->next_packet = sc->rec_page_start + 1; 487 488 /* 489 * Set interface for page 0, Remote DMA complete, Stopped 490 */ 491 ed_nic_outb(sc, ED_P0_CR, sc->cr_proto | ED_CR_STP); 492 493 if (sc->isa16bit) 494 /* 495 * Set FIFO threshold to 8, No auto-init Remote DMA, byte 496 * order=80x86, word-wide DMA xfers, 497 */ 498 ed_nic_outb(sc, ED_P0_DCR, ED_DCR_FT1 | ED_DCR_WTS | ED_DCR_LS); 499 else 500 /* 501 * Same as above, but byte-wide DMA xfers 502 */ 503 ed_nic_outb(sc, ED_P0_DCR, ED_DCR_FT1 | ED_DCR_LS); 504 505 /* 506 * Clear Remote Byte Count Registers 507 */ 508 ed_nic_outb(sc, ED_P0_RBCR0, 0); 509 ed_nic_outb(sc, ED_P0_RBCR1, 0); 510 511 /* 512 * For the moment, don't store incoming packets in memory. 513 */ 514 ed_nic_outb(sc, ED_P0_RCR, ED_RCR_MON); 515 516 /* 517 * Place NIC in internal loopback mode 518 */ 519 ed_nic_outb(sc, ED_P0_TCR, ED_TCR_LB0); 520 521 /* 522 * Initialize transmit/receive (ring-buffer) Page Start 523 */ 524 ed_nic_outb(sc, ED_P0_TPSR, sc->tx_page_start); 525 ed_nic_outb(sc, ED_P0_PSTART, sc->rec_page_start); 526 /* Set lower bits of byte addressable framing to 0 */ 527 if (sc->chip_type == ED_CHIP_TYPE_WD790) 528 ed_nic_outb(sc, 0x09, 0); 529 530 /* 531 * Initialize Receiver (ring-buffer) Page Stop and Boundry 532 */ 533 ed_nic_outb(sc, ED_P0_PSTOP, sc->rec_page_stop); 534 ed_nic_outb(sc, ED_P0_BNRY, sc->rec_page_start); 535 536 /* 537 * Clear all interrupts. A '1' in each bit position clears the 538 * corresponding flag. 539 */ 540 ed_nic_outb(sc, ED_P0_ISR, 0xff); 541 542 /* 543 * Enable the following interrupts: receive/transmit complete, 544 * receive/transmit error, and Receiver OverWrite. 545 * 546 * Counter overflow and Remote DMA complete are *not* enabled. 547 */ 548 ed_nic_outb(sc, ED_P0_IMR, 549 ED_IMR_PRXE | ED_IMR_PTXE | ED_IMR_RXEE | ED_IMR_TXEE | ED_IMR_OVWE); 550 551 /* 552 * Program Command Register for page 1 553 */ 554 ed_nic_outb(sc, ED_P0_CR, sc->cr_proto | ED_CR_PAGE_1 | ED_CR_STP); 555 556 /* 557 * Copy out our station address 558 */ 559 for (i = 0; i < ETHER_ADDR_LEN; ++i) 560 ed_nic_outb(sc, ED_P1_PAR(i), IF_LLADDR(sc->ifp)[i]); 561 562 /* 563 * Set Current Page pointer to next_packet (initialized above) 564 */ 565 ed_nic_outb(sc, ED_P1_CURR, sc->next_packet); 566 567 /* 568 * Program Receiver Configuration Register and multicast filter. CR is 569 * set to page 0 on return. 570 */ 571 ed_setrcr(sc); 572 573 /* 574 * Take interface out of loopback 575 */ 576 ed_nic_outb(sc, ED_P0_TCR, 0); 577 578 if (sc->sc_mediachg) 579 sc->sc_mediachg(sc); 580 581 /* 582 * Set 'running' flag, and clear output active flag. 583 */ 584 ifp->if_drv_flags |= IFF_DRV_RUNNING; 585 ifp->if_drv_flags &= ~IFF_DRV_OACTIVE; 586 587 /* 588 * ...and attempt to start output 589 */ 590 ed_start_locked(ifp); 591 592 if (sc->sc_tick) 593 callout_reset(&sc->tick_ch, hz, sc->sc_tick, sc); 594} 595 596/* 597 * This routine actually starts the transmission on the interface 598 */ 599static __inline void 600ed_xmit(struct ed_softc *sc) 601{ 602 struct ifnet *ifp = sc->ifp; 603 unsigned short len; 604 605 len = sc->txb_len[sc->txb_next_tx]; 606 607 /* 608 * Set NIC for page 0 register access 609 */ 610 ed_nic_outb(sc, ED_P0_CR, sc->cr_proto | ED_CR_STA); 611 612 /* 613 * Set TX buffer start page 614 */ 615 ed_nic_outb(sc, ED_P0_TPSR, sc->tx_page_start + 616 sc->txb_next_tx * ED_TXBUF_SIZE); 617 618 /* 619 * Set TX length 620 */ 621 ed_nic_outb(sc, ED_P0_TBCR0, len); 622 ed_nic_outb(sc, ED_P0_TBCR1, len >> 8); 623 624 /* 625 * Set page 0, Remote DMA complete, Transmit Packet, and *Start* 626 */ 627 ed_nic_outb(sc, ED_P0_CR, sc->cr_proto | ED_CR_TXP | ED_CR_STA); 628 sc->xmit_busy = 1; 629 630 /* 631 * Point to next transmit buffer slot and wrap if necessary. 632 */ 633 sc->txb_next_tx++; 634 if (sc->txb_next_tx == sc->txb_cnt) 635 sc->txb_next_tx = 0; 636 637 /* 638 * Set a timer just in case we never hear from the board again 639 */ 640 ifp->if_timer = 2; 641} 642 643/* 644 * Start output on interface. 645 * We make two assumptions here: 646 * 1) that the current priority is set to splimp _before_ this code 647 * is called *and* is returned to the appropriate priority after 648 * return 649 * 2) that the IFF_DRV_OACTIVE flag is checked before this code is called 650 * (i.e. that the output part of the interface is idle) 651 */ 652static void 653ed_start(struct ifnet *ifp) 654{ 655 struct ed_softc *sc = ifp->if_softc; 656 657 ED_ASSERT_UNLOCKED(sc); 658 ED_LOCK(sc); 659 ed_start_locked(ifp); 660 ED_UNLOCK(sc); 661} 662 663static void 664ed_start_locked(struct ifnet *ifp) 665{ 666 struct ed_softc *sc = ifp->if_softc; 667 struct mbuf *m0, *m; 668 bus_size_t buffer; 669 int len; 670 671 ED_ASSERT_LOCKED(sc); 672outloop: 673 674 /* 675 * First, see if there are buffered packets and an idle transmitter - 676 * should never happen at this point. 677 */ 678 if (sc->txb_inuse && (sc->xmit_busy == 0)) { 679 printf("ed: packets buffered, but transmitter idle\n"); 680 ed_xmit(sc); 681 } 682 683 /* 684 * See if there is room to put another packet in the buffer. 685 */ 686 if (sc->txb_inuse == sc->txb_cnt) { 687 688 /* 689 * No room. Indicate this to the outside world and exit. 690 */ 691 ifp->if_drv_flags |= IFF_DRV_OACTIVE; 692 return; 693 } 694 IFQ_DRV_DEQUEUE(&ifp->if_snd, m); 695 if (m == 0) { 696 697 /* 698 * We are using the !OACTIVE flag to indicate to the outside 699 * world that we can accept an additional packet rather than 700 * that the transmitter is _actually_ active. Indeed, the 701 * transmitter may be active, but if we haven't filled all the 702 * buffers with data then we still want to accept more. 703 */ 704 ifp->if_drv_flags &= ~IFF_DRV_OACTIVE; 705 return; 706 } 707 708 /* 709 * Copy the mbuf chain into the transmit buffer 710 */ 711 m0 = m; 712 713 /* txb_new points to next open buffer slot */ 714 buffer = sc->mem_start + (sc->txb_new * ED_TXBUF_SIZE * ED_PAGE_SIZE); 715
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714 if (sc->mem_shared) {
715 /*
716 * Special case setup for 16 bit boards...
717 */
718 if (sc->isa16bit) {
719 switch (sc->vendor) {
720#ifdef ED_3C503
721 /*
722 * For 16bit 3Com boards (which have 16k of
723 * memory), we have the xmit buffers in a
724 * different page of memory ('page 0') - so
725 * change pages.
726 */
727 case ED_VENDOR_3COM:
728 ed_asic_outb(sc, ED_3COM_GACFR,
729 ED_3COM_GACFR_RSEL);
730 break;
731#endif
732 /*
733 * Enable 16bit access to shared memory on
734 * WD/SMC boards.
735 *
736 * XXX - same as ed_enable_16bit_access()
737 */
738 case ED_VENDOR_WD_SMC:
739 ed_asic_outb(sc, ED_WD_LAAR,
740 sc->wd_laar_proto | ED_WD_LAAR_M16EN);
741 if (sc->chip_type == ED_CHIP_TYPE_WD790)
742 ed_asic_outb(sc, ED_WD_MSR, ED_WD_MSR_MENB);
743 break;
744 }
745 }
746 for (len = 0; m != 0; m = m->m_next) {
747 if (sc->isa16bit)
748 bus_space_write_region_2(sc->mem_bst,
749 sc->mem_bsh, buffer,
750 mtod(m, uint16_t *), (m->m_len + 1)/ 2);
751 else
752 bus_space_write_region_1(sc->mem_bst,
753 sc->mem_bsh, buffer,
754 mtod(m, uint8_t *), m->m_len);
755 buffer += m->m_len;
756 len += m->m_len;
757 }
758
759 /*
760 * Restore previous shared memory access
761 */
762 if (sc->isa16bit) {
763 switch (sc->vendor) {
764#ifdef ED_3C503
765 case ED_VENDOR_3COM:
766 ed_asic_outb(sc, ED_3COM_GACFR,
767 ED_3COM_GACFR_RSEL | ED_3COM_GACFR_MBS0);
768 break;
769#endif
770 case ED_VENDOR_WD_SMC:
771 /* XXX - same as ed_disable_16bit_access() */
772 if (sc->chip_type == ED_CHIP_TYPE_WD790)
773 ed_asic_outb(sc, ED_WD_MSR, 0x00);
774 ed_asic_outb(sc, ED_WD_LAAR,
775 sc->wd_laar_proto & ~ED_WD_LAAR_M16EN);
776 break;
777 }
778 }
779 } else {
780 len = ed_pio_write_mbufs(sc, m, buffer);
781 if (len == 0) {
782 m_freem(m0);
783 goto outloop;
784 }
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716 len = sc->sc_write_mbufs(sc, m, buffer); 717 if (len == 0) { 718 m_freem(m0); 719 goto outloop; |
720 } 721 722 sc->txb_len[sc->txb_new] = max(len, (ETHER_MIN_LEN-ETHER_CRC_LEN)); 723 724 sc->txb_inuse++; 725 726 /* 727 * Point to next buffer slot and wrap if necessary. 728 */ 729 sc->txb_new++; 730 if (sc->txb_new == sc->txb_cnt) 731 sc->txb_new = 0; 732 733 if (sc->xmit_busy == 0) 734 ed_xmit(sc); 735 736 /* 737 * Tap off here if there is a bpf listener. 738 */ 739 BPF_MTAP(ifp, m0); 740 741 m_freem(m0); 742 743 /* 744 * Loop back to the top to possibly buffer more packets 745 */ 746 goto outloop; 747} 748 749/* 750 * Ethernet interface receiver interrupt. 751 */ 752static __inline void 753ed_rint(struct ed_softc *sc) 754{ 755 struct ifnet *ifp = sc->ifp; 756 u_char boundry; 757 u_short len; 758 struct ed_ring packet_hdr; 759 bus_size_t packet_ptr; 760 761 ED_ASSERT_LOCKED(sc); 762 763 /* 764 * Set NIC to page 1 registers to get 'current' pointer 765 */ 766 ed_nic_outb(sc, ED_P0_CR, sc->cr_proto | ED_CR_PAGE_1 | ED_CR_STA); 767 768 /* 769 * 'sc->next_packet' is the logical beginning of the ring-buffer - 770 * i.e. it points to where new data has been buffered. The 'CURR' 771 * (current) register points to the logical end of the ring-buffer - 772 * i.e. it points to where additional new data will be added. We loop 773 * here until the logical beginning equals the logical end (or in 774 * other words, until the ring-buffer is empty). 775 */ 776 while (sc->next_packet != ed_nic_inb(sc, ED_P1_CURR)) { 777 778 /* get pointer to this buffer's header structure */ 779 packet_ptr = sc->mem_ring + 780 (sc->next_packet - sc->rec_page_start) * ED_PAGE_SIZE; 781 782 /* 783 * The byte count includes a 4 byte header that was added by 784 * the NIC. 785 */ 786 sc->readmem(sc, packet_ptr, (char *) &packet_hdr, 787 sizeof(packet_hdr)); 788 len = packet_hdr.count; 789 if (len > (ETHER_MAX_LEN - ETHER_CRC_LEN + sizeof(struct ed_ring)) || 790 len < (ETHER_MIN_LEN - ETHER_CRC_LEN + sizeof(struct ed_ring))) { 791 /* 792 * Length is a wild value. There's a good chance that 793 * this was caused by the NIC being old and buggy. 794 * The bug is that the length low byte is duplicated in 795 * the high byte. Try to recalculate the length based on 796 * the pointer to the next packet. 797 */ 798 /* 799 * NOTE: sc->next_packet is pointing at the current packet. 800 */ 801 len &= ED_PAGE_SIZE - 1; /* preserve offset into page */ 802 if (packet_hdr.next_packet >= sc->next_packet) 803 len += (packet_hdr.next_packet - 804 sc->next_packet) * ED_PAGE_SIZE; 805 else 806 len += 807 ((packet_hdr.next_packet - sc->rec_page_start) + 808 (sc->rec_page_stop - sc->next_packet)) * ED_PAGE_SIZE; 809 /* 810 * because buffers are aligned on 256-byte boundary, 811 * the length computed above is off by 256 in almost 812 * all cases. Fix it... 813 */ 814 if (len & 0xff) 815 len -= 256; 816 if (len > (ETHER_MAX_LEN - ETHER_CRC_LEN 817 + sizeof(struct ed_ring))) 818 sc->mibdata.dot3StatsFrameTooLongs++; 819 } 820 821 /* 822 * Be fairly liberal about what we allow as a "reasonable" length 823 * so that a [crufty] packet will make it to BPF (and can thus 824 * be analyzed). Note that all that is really important is that 825 * we have a length that will fit into one mbuf cluster or less; 826 * the upper layer protocols can then figure out the length from 827 * their own length field(s). 828 * But make sure that we have at least a full ethernet header 829 * or we would be unable to call ether_input() later. 830 */ 831 if ((len >= sizeof(struct ed_ring) + ETHER_HDR_LEN) && 832 (len <= MCLBYTES) && 833 (packet_hdr.next_packet >= sc->rec_page_start) && 834 (packet_hdr.next_packet < sc->rec_page_stop)) { 835 /* 836 * Go get packet. 837 */ 838 ed_get_packet(sc, packet_ptr + sizeof(struct ed_ring), 839 len - sizeof(struct ed_ring)); 840 ifp->if_ipackets++; 841 } else { 842 /* 843 * Really BAD. The ring pointers are corrupted. 844 */ 845 log(LOG_ERR, 846 "%s: NIC memory corrupt - invalid packet length %d\n", 847 ifp->if_xname, len); 848 ifp->if_ierrors++; 849 ed_reset(ifp); 850 return; 851 } 852 853 /* 854 * Update next packet pointer 855 */ 856 sc->next_packet = packet_hdr.next_packet; 857 858 /* 859 * Update NIC boundry pointer - being careful to keep it one 860 * buffer behind. (as recommended by NS databook) 861 */ 862 boundry = sc->next_packet - 1; 863 if (boundry < sc->rec_page_start) 864 boundry = sc->rec_page_stop - 1; 865 866 /* 867 * Set NIC to page 0 registers to update boundry register 868 */ 869 ed_nic_outb(sc, ED_P0_CR, sc->cr_proto | ED_CR_STA); 870 ed_nic_outb(sc, ED_P0_BNRY, boundry); 871 872 /* 873 * Set NIC to page 1 registers before looping to top (prepare 874 * to get 'CURR' current pointer) 875 */ 876 ed_nic_outb(sc, ED_P0_CR, sc->cr_proto | ED_CR_PAGE_1 | ED_CR_STA); 877 } 878} 879 880/* 881 * Ethernet interface interrupt processor 882 */ 883void 884edintr(void *arg) 885{ 886 struct ed_softc *sc = (struct ed_softc*) arg; 887 struct ifnet *ifp = sc->ifp; 888 u_char isr; 889 int count; 890 891 ED_LOCK(sc); 892 if (!(ifp->if_drv_flags & IFF_DRV_RUNNING)) { 893 ED_UNLOCK(sc); 894 return; 895 } 896 /* 897 * Set NIC to page 0 registers 898 */ 899 ed_nic_outb(sc, ED_P0_CR, sc->cr_proto | ED_CR_STA); 900 901 /* 902 * loop until there are no more new interrupts. When the card 903 * goes away, the hardware will read back 0xff. Looking at 904 * the interrupts, it would appear that 0xff is impossible, 905 * or at least extremely unlikely. 906 */ 907 while ((isr = ed_nic_inb(sc, ED_P0_ISR)) != 0 && isr != 0xff) { 908 909 /* 910 * reset all the bits that we are 'acknowledging' by writing a 911 * '1' to each bit position that was set (writing a '1' 912 * *clears* the bit) 913 */ 914 ed_nic_outb(sc, ED_P0_ISR, isr); 915 916 /* 917 * XXX workaround for AX88190 918 * We limit this to 5000 iterations. At 1us per inb/outb, 919 * this translates to about 15ms, which should be plenty 920 * of time, and also gives protection in the card eject 921 * case. 922 */ 923 if (sc->chip_type == ED_CHIP_TYPE_AX88190) { 924 count = 5000; /* 15ms */ 925 while (count-- && (ed_nic_inb(sc, ED_P0_ISR) & isr)) { 926 ed_nic_outb(sc, ED_P0_ISR,0); 927 ed_nic_outb(sc, ED_P0_ISR,isr); 928 } 929 if (count == 0) 930 break; 931 } 932 933 /* 934 * Handle transmitter interrupts. Handle these first because 935 * the receiver will reset the board under some conditions. 936 */ 937 if (isr & (ED_ISR_PTX | ED_ISR_TXE)) { 938 u_char collisions = ed_nic_inb(sc, ED_P0_NCR) & 0x0f; 939 940 /* 941 * Check for transmit error. If a TX completed with an 942 * error, we end up throwing the packet away. Really 943 * the only error that is possible is excessive 944 * collisions, and in this case it is best to allow 945 * the automatic mechanisms of TCP to backoff the 946 * flow. Of course, with UDP we're screwed, but this 947 * is expected when a network is heavily loaded. 948 */ 949 (void) ed_nic_inb(sc, ED_P0_TSR); 950 if (isr & ED_ISR_TXE) { 951 u_char tsr; 952 953 /* 954 * Excessive collisions (16) 955 */ 956 tsr = ed_nic_inb(sc, ED_P0_TSR); 957 if ((tsr & ED_TSR_ABT) 958 && (collisions == 0)) { 959 960 /* 961 * When collisions total 16, the 962 * P0_NCR will indicate 0, and the 963 * TSR_ABT is set. 964 */ 965 collisions = 16; 966 sc->mibdata.dot3StatsExcessiveCollisions++; 967 sc->mibdata.dot3StatsCollFrequencies[15]++; 968 } 969 if (tsr & ED_TSR_OWC) 970 sc->mibdata.dot3StatsLateCollisions++; 971 if (tsr & ED_TSR_CDH) 972 sc->mibdata.dot3StatsSQETestErrors++; 973 if (tsr & ED_TSR_CRS) 974 sc->mibdata.dot3StatsCarrierSenseErrors++; 975 if (tsr & ED_TSR_FU) 976 sc->mibdata.dot3StatsInternalMacTransmitErrors++; 977 978 /* 979 * update output errors counter 980 */ 981 ifp->if_oerrors++; 982 } else { 983 984 /* 985 * Update total number of successfully 986 * transmitted packets. 987 */ 988 ifp->if_opackets++; 989 } 990 991 /* 992 * reset tx busy and output active flags 993 */ 994 sc->xmit_busy = 0; 995 ifp->if_drv_flags &= ~IFF_DRV_OACTIVE; 996 997 /* 998 * clear watchdog timer 999 */ 1000 ifp->if_timer = 0; 1001 1002 /* 1003 * Add in total number of collisions on last 1004 * transmission. 1005 */ 1006 ifp->if_collisions += collisions; 1007 switch(collisions) { 1008 case 0: 1009 case 16: 1010 break; 1011 case 1: 1012 sc->mibdata.dot3StatsSingleCollisionFrames++; 1013 sc->mibdata.dot3StatsCollFrequencies[0]++; 1014 break; 1015 default: 1016 sc->mibdata.dot3StatsMultipleCollisionFrames++; 1017 sc->mibdata. 1018 dot3StatsCollFrequencies[collisions-1] 1019 ++; 1020 break; 1021 } 1022 1023 /* 1024 * Decrement buffer in-use count if not zero (can only 1025 * be zero if a transmitter interrupt occured while 1026 * not actually transmitting). If data is ready to 1027 * transmit, start it transmitting, otherwise defer 1028 * until after handling receiver 1029 */ 1030 if (sc->txb_inuse && --sc->txb_inuse) 1031 ed_xmit(sc); 1032 } 1033 1034 /* 1035 * Handle receiver interrupts 1036 */ 1037 if (isr & (ED_ISR_PRX | ED_ISR_RXE | ED_ISR_OVW)) { 1038 1039 /* 1040 * Overwrite warning. In order to make sure that a 1041 * lockup of the local DMA hasn't occurred, we reset 1042 * and re-init the NIC. The NSC manual suggests only a 1043 * partial reset/re-init is necessary - but some chips 1044 * seem to want more. The DMA lockup has been seen 1045 * only with early rev chips - Methinks this bug was 1046 * fixed in later revs. -DG 1047 */ 1048 if (isr & ED_ISR_OVW) { 1049 ifp->if_ierrors++; 1050#ifdef DIAGNOSTIC 1051 log(LOG_WARNING, 1052 "%s: warning - receiver ring buffer overrun\n", 1053 ifp->if_xname); 1054#endif 1055 1056 /* 1057 * Stop/reset/re-init NIC 1058 */ 1059 ed_reset(ifp); 1060 } else { 1061 1062 /* 1063 * Receiver Error. One or more of: CRC error, 1064 * frame alignment error FIFO overrun, or 1065 * missed packet. 1066 */ 1067 if (isr & ED_ISR_RXE) { 1068 u_char rsr; 1069 rsr = ed_nic_inb(sc, ED_P0_RSR); 1070 if (rsr & ED_RSR_CRC) 1071 sc->mibdata.dot3StatsFCSErrors++; 1072 if (rsr & ED_RSR_FAE) 1073 sc->mibdata.dot3StatsAlignmentErrors++; 1074 if (rsr & ED_RSR_FO) 1075 sc->mibdata.dot3StatsInternalMacReceiveErrors++; 1076 ifp->if_ierrors++; 1077#ifdef ED_DEBUG 1078 if_printf(ifp, "receive error %x\n", 1079 ed_nic_inb(sc, ED_P0_RSR)); 1080#endif 1081 } 1082 1083 /* 1084 * Go get the packet(s) XXX - Doing this on an 1085 * error is dubious because there shouldn't be 1086 * any data to get (we've configured the 1087 * interface to not accept packets with 1088 * errors). 1089 */ 1090 1091 /* 1092 * Enable 16bit access to shared memory first 1093 * on WD/SMC boards. 1094 */ 1095 ed_enable_16bit_access(sc); 1096 ed_rint(sc); 1097 ed_disable_16bit_access(sc); 1098 } 1099 } 1100 1101 /* 1102 * If it looks like the transmitter can take more data, 1103 * attempt to start output on the interface. This is done 1104 * after handling the receiver to give the receiver priority. 1105 */ 1106 if ((ifp->if_drv_flags & IFF_DRV_OACTIVE) == 0) 1107 ed_start_locked(ifp); 1108 1109 /* 1110 * return NIC CR to standard state: page 0, remote DMA 1111 * complete, start (toggling the TXP bit off, even if was just 1112 * set in the transmit routine, is *okay* - it is 'edge' 1113 * triggered from low to high) 1114 */ 1115 ed_nic_outb(sc, ED_P0_CR, sc->cr_proto | ED_CR_STA); 1116 1117 /* 1118 * If the Network Talley Counters overflow, read them to reset 1119 * them. It appears that old 8390's won't clear the ISR flag 1120 * otherwise - resulting in an infinite loop. 1121 */ 1122 if (isr & ED_ISR_CNT) { 1123 (void) ed_nic_inb(sc, ED_P0_CNTR0); 1124 (void) ed_nic_inb(sc, ED_P0_CNTR1); 1125 (void) ed_nic_inb(sc, ED_P0_CNTR2); 1126 } 1127 } 1128 ED_UNLOCK(sc); 1129} 1130 1131/* 1132 * Process an ioctl request. 1133 */ 1134static int 1135ed_ioctl(struct ifnet *ifp, u_long command, caddr_t data) 1136{ 1137 struct ed_softc *sc = ifp->if_softc; 1138 struct ifreq *ifr = (struct ifreq *)data; 1139 int error = 0; 1140 1141 /* 1142 * XXX really needed? 1143 */ 1144 if (sc == NULL) { 1145 ifp->if_drv_flags &= ~IFF_DRV_RUNNING; 1146 return (ENXIO); 1147 } 1148 1149 switch (command) { 1150 case SIOCSIFFLAGS: 1151 /* 1152 * If the interface is marked up and stopped, then start it. 1153 * If we're up and already running, then it may be a mediachg. 1154 * If it is marked down and running, then stop it. 1155 */ 1156 ED_LOCK(sc); 1157 if (ifp->if_flags & IFF_UP) { 1158 if ((ifp->if_drv_flags & IFF_DRV_RUNNING) == 0) 1159 ed_init_locked(sc); 1160 else if (sc->sc_mediachg) 1161 sc->sc_mediachg(sc); 1162 } else { 1163 if (ifp->if_drv_flags & IFF_DRV_RUNNING) { 1164 ed_stop(sc); 1165 ifp->if_drv_flags &= ~IFF_DRV_RUNNING; 1166 } 1167 } 1168 1169 /* 1170 * Promiscuous flag may have changed, so reprogram the RCR. 1171 */ 1172 ed_setrcr(sc); 1173 1174 ED_UNLOCK(sc); 1175 break; 1176 1177 case SIOCADDMULTI: 1178 case SIOCDELMULTI: 1179 /* 1180 * Multicast list has changed; set the hardware filter 1181 * accordingly. 1182 */ 1183 ED_LOCK(sc); 1184 ed_setrcr(sc); 1185 ED_UNLOCK(sc); 1186 error = 0; 1187 break; 1188 1189 case SIOCGIFMEDIA: 1190 case SIOCSIFMEDIA: 1191 if (sc->sc_media_ioctl == NULL) { 1192 error = EINVAL; 1193 break; 1194 } 1195 sc->sc_media_ioctl(sc, ifr, command); 1196 break; 1197 1198 default: 1199 error = ether_ioctl(ifp, command, data); 1200 break; 1201 } 1202 return (error); 1203} 1204 1205/* 1206 * Given a source and destination address, copy 'amount' of a packet from 1207 * the ring buffer into a linear destination buffer. Takes into account 1208 * ring-wrap. 1209 */ 1210static __inline void 1211ed_ring_copy(struct ed_softc *sc, bus_size_t src, char *dst, u_short amount) 1212{ 1213 u_short tmp_amount; 1214 1215 /* does copy wrap to lower addr in ring buffer? */ 1216 if (src + amount > sc->mem_end) { 1217 tmp_amount = sc->mem_end - src; 1218 /* copy amount up to end of NIC memory */ 1219 sc->readmem(sc, src, dst, tmp_amount); 1220 amount -= tmp_amount; 1221 src = sc->mem_ring; 1222 dst += tmp_amount; 1223 } 1224 sc->readmem(sc, src, dst, amount); 1225} 1226 1227/* 1228 * Retreive packet from shared memory and send to the next level up via 1229 * ether_input(). 1230 */ 1231static void 1232ed_get_packet(struct ed_softc *sc, bus_size_t buf, u_short len) 1233{ 1234 struct ifnet *ifp = sc->ifp; 1235 struct ether_header *eh; 1236 struct mbuf *m; 1237 1238 /* Allocate a header mbuf */ 1239 MGETHDR(m, M_DONTWAIT, MT_DATA); 1240 if (m == NULL) 1241 return; 1242 m->m_pkthdr.rcvif = ifp; 1243 m->m_pkthdr.len = m->m_len = len; 1244 1245 /* 1246 * We always put the received packet in a single buffer - 1247 * either with just an mbuf header or in a cluster attached 1248 * to the header. The +2 is to compensate for the alignment 1249 * fixup below. 1250 */ 1251 if ((len + 2) > MHLEN) { 1252 /* Attach an mbuf cluster */ 1253 MCLGET(m, M_DONTWAIT); 1254 1255 /* Insist on getting a cluster */ 1256 if ((m->m_flags & M_EXT) == 0) { 1257 m_freem(m); 1258 return; 1259 } 1260 } 1261 1262 /* 1263 * The +2 is to longword align the start of the real packet. 1264 * This is important for NFS. 1265 */ 1266 m->m_data += 2; 1267 eh = mtod(m, struct ether_header *); 1268 1269 /* 1270 * Get packet, including link layer address, from interface. 1271 */ 1272 ed_ring_copy(sc, buf, (char *)eh, len); 1273 1274 m->m_pkthdr.len = m->m_len = len; 1275 1276 ED_UNLOCK(sc); 1277 (*ifp->if_input)(ifp, m); 1278 ED_LOCK(sc); 1279} 1280 1281/* 1282 * Supporting routines 1283 */ 1284 1285/* 1286 * Given a NIC memory source address and a host memory destination 1287 * address, copy 'amount' from NIC to host using shared memory. 1288 * The 'amount' is rounded up to a word - okay as long as mbufs 1289 * are word sized. That's what the +1 is below. 1290 * This routine accesses things as 16 bit quantities. 1291 */ 1292void 1293ed_shmem_readmem16(struct ed_softc *sc, bus_size_t src, uint8_t *dst, 1294 uint16_t amount) 1295{ 1296 bus_space_read_region_2(sc->mem_bst, sc->mem_bsh, src, (uint16_t *)dst, 1297 amount + 1 / 2); 1298} 1299 1300/* 1301 * Given a NIC memory source address and a host memory destination 1302 * address, copy 'amount' from NIC to host using shared memory. 1303 * This routine accesses things as 8 bit quantities. 1304 */ 1305void 1306ed_shmem_readmem8(struct ed_softc *sc, bus_size_t src, uint8_t *dst, 1307 uint16_t amount) 1308{ 1309 bus_space_read_region_1(sc->mem_bst, sc->mem_bsh, src, dst, amount); 1310} 1311 1312/* 1313 * Given a NIC memory source address and a host memory destination 1314 * address, copy 'amount' from NIC to host using Programmed I/O. 1315 * The 'amount' is rounded up to a word - okay as long as mbufs 1316 * are word sized. 1317 * This routine is currently Novell-specific. 1318 */ 1319void 1320ed_pio_readmem(struct ed_softc *sc, bus_size_t src, uint8_t *dst, 1321 uint16_t amount) 1322{ 1323 /* Regular Novell cards */ 1324 /* select page 0 registers */ 1325 ed_nic_outb(sc, ED_P0_CR, ED_CR_RD2 | ED_CR_STA); 1326 1327 /* round up to a word */ 1328 if (amount & 1) 1329 ++amount; 1330 1331 /* set up DMA byte count */ 1332 ed_nic_outb(sc, ED_P0_RBCR0, amount); 1333 ed_nic_outb(sc, ED_P0_RBCR1, amount >> 8); 1334 1335 /* set up source address in NIC mem */ 1336 ed_nic_outb(sc, ED_P0_RSAR0, src); 1337 ed_nic_outb(sc, ED_P0_RSAR1, src >> 8); 1338 1339 ed_nic_outb(sc, ED_P0_CR, ED_CR_RD0 | ED_CR_STA); 1340 1341 if (sc->isa16bit) 1342 ed_asic_insw(sc, ED_NOVELL_DATA, dst, amount / 2); 1343 else 1344 ed_asic_insb(sc, ED_NOVELL_DATA, dst, amount); 1345} 1346 1347/* 1348 * Stripped down routine for writing a linear buffer to NIC memory. 1349 * Only used in the probe routine to test the memory. 'len' must 1350 * be even. 1351 */ 1352void 1353ed_pio_writemem(struct ed_softc *sc, uint8_t *src, uint16_t dst, uint16_t len) 1354{ 1355 int maxwait = 200; /* about 240us */ 1356 1357 /* select page 0 registers */ 1358 ed_nic_outb(sc, ED_P0_CR, ED_CR_RD2 | ED_CR_STA); 1359 1360 /* reset remote DMA complete flag */ 1361 ed_nic_outb(sc, ED_P0_ISR, ED_ISR_RDC); 1362 1363 /* set up DMA byte count */ 1364 ed_nic_outb(sc, ED_P0_RBCR0, len); 1365 ed_nic_outb(sc, ED_P0_RBCR1, len >> 8); 1366 1367 /* set up destination address in NIC mem */ 1368 ed_nic_outb(sc, ED_P0_RSAR0, dst); 1369 ed_nic_outb(sc, ED_P0_RSAR1, dst >> 8); 1370 1371 /* set remote DMA write */ 1372 ed_nic_outb(sc, ED_P0_CR, ED_CR_RD1 | ED_CR_STA); 1373 1374 if (sc->isa16bit) 1375 ed_asic_outsw(sc, ED_NOVELL_DATA, src, len / 2); 1376 else 1377 ed_asic_outsb(sc, ED_NOVELL_DATA, src, len); 1378 1379 /* 1380 * Wait for remote DMA complete. This is necessary because on the 1381 * transmit side, data is handled internally by the NIC in bursts and 1382 * we can't start another remote DMA until this one completes. Not 1383 * waiting causes really bad things to happen - like the NIC 1384 * irrecoverably jamming the ISA bus. 1385 */ 1386 while (((ed_nic_inb(sc, ED_P0_ISR) & ED_ISR_RDC) != ED_ISR_RDC) && 1387 --maxwait) 1388 continue; 1389} 1390 1391/* 1392 * Write an mbuf chain to the destination NIC memory address using 1393 * programmed I/O. 1394 */
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1460static u_short
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1395u_short |
1396ed_pio_write_mbufs(struct ed_softc *sc, struct mbuf *m, bus_size_t dst) 1397{ 1398 struct ifnet *ifp = sc->ifp; 1399 unsigned short total_len, dma_len; 1400 struct mbuf *mp; 1401 int maxwait = 200; /* about 240us */ 1402 1403 ED_ASSERT_LOCKED(sc); 1404
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1470#ifdef ED_HPP
1471 /* HP PC Lan+ cards need special handling */
1472 if (sc->vendor == ED_VENDOR_HP && sc->type == ED_TYPE_HP_PCLANPLUS)
1473 return ed_hpp_write_mbufs(sc, m, dst);
1474#endif
1475
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1405 /* Regular Novell cards */ 1406 /* First, count up the total number of bytes to copy */ 1407 for (total_len = 0, mp = m; mp; mp = mp->m_next) 1408 total_len += mp->m_len; 1409 1410 dma_len = total_len; 1411 if (sc->isa16bit && (dma_len & 1)) 1412 dma_len++; 1413 1414 /* select page 0 registers */ 1415 ed_nic_outb(sc, ED_P0_CR, ED_CR_RD2 | ED_CR_STA); 1416 1417 /* reset remote DMA complete flag */ 1418 ed_nic_outb(sc, ED_P0_ISR, ED_ISR_RDC); 1419 1420 /* set up DMA byte count */ 1421 ed_nic_outb(sc, ED_P0_RBCR0, dma_len); 1422 ed_nic_outb(sc, ED_P0_RBCR1, dma_len >> 8); 1423 1424 /* set up destination address in NIC mem */ 1425 ed_nic_outb(sc, ED_P0_RSAR0, dst); 1426 ed_nic_outb(sc, ED_P0_RSAR1, dst >> 8); 1427 1428 /* set remote DMA write */ 1429 ed_nic_outb(sc, ED_P0_CR, ED_CR_RD1 | ED_CR_STA); 1430 1431 /* 1432 * Transfer the mbuf chain to the NIC memory. 1433 * 16-bit cards require that data be transferred as words, and only words. 1434 * So that case requires some extra code to patch over odd-length mbufs. 1435 */ 1436 1437 if (!sc->isa16bit) { 1438 /* NE1000s are easy */ 1439 while (m) { 1440 if (m->m_len) 1441 ed_asic_outsb(sc, ED_NOVELL_DATA, 1442 m->m_data, m->m_len); 1443 m = m->m_next; 1444 } 1445 } else { 1446 /* NE2000s are a pain */ 1447 unsigned char *data; 1448 int len, wantbyte; 1449 unsigned char savebyte[2]; 1450 1451 wantbyte = 0; 1452 1453 while (m) { 1454 len = m->m_len; 1455 if (len) { 1456 data = mtod(m, caddr_t); 1457 /* finish the last word */ 1458 if (wantbyte) { 1459 savebyte[1] = *data; 1460 ed_asic_outw(sc, ED_NOVELL_DATA, 1461 *(u_short *)savebyte); 1462 data++; 1463 len--; 1464 wantbyte = 0; 1465 } 1466 /* output contiguous words */ 1467 if (len > 1) { 1468 ed_asic_outsw(sc, ED_NOVELL_DATA, 1469 data, len >> 1); 1470 data += len & ~1; 1471 len &= 1; 1472 } 1473 /* save last byte, if necessary */ 1474 if (len == 1) { 1475 savebyte[0] = *data; 1476 wantbyte = 1; 1477 } 1478 } 1479 m = m->m_next; 1480 } 1481 /* spit last byte */ 1482 if (wantbyte) 1483 ed_asic_outw(sc, ED_NOVELL_DATA, *(u_short *)savebyte); 1484 } 1485 1486 /* 1487 * Wait for remote DMA complete. This is necessary because on the 1488 * transmit side, data is handled internally by the NIC in bursts and 1489 * we can't start another remote DMA until this one completes. Not 1490 * waiting causes really bad things to happen - like the NIC 1491 * irrecoverably jamming the ISA bus. 1492 */ 1493 while (((ed_nic_inb(sc, ED_P0_ISR) & ED_ISR_RDC) != ED_ISR_RDC) && 1494 --maxwait) 1495 continue; 1496 1497 if (!maxwait) { 1498 log(LOG_WARNING, "%s: remote transmit DMA failed to complete\n", 1499 ifp->if_xname); 1500 ed_reset(ifp); 1501 return(0); 1502 } 1503 return (total_len); 1504} 1505 1506static void 1507ed_setrcr(struct ed_softc *sc) 1508{ 1509 struct ifnet *ifp = sc->ifp; 1510 int i; 1511 u_char reg1; 1512 1513 ED_ASSERT_LOCKED(sc); 1514 1515 /* Bit 6 in AX88190 RCR register must be set. */ 1516 if (sc->chip_type == ED_CHIP_TYPE_AX88190) 1517 reg1 = ED_RCR_INTT; 1518 else 1519 reg1 = 0x00; 1520 1521 /* set page 1 registers */ 1522 ed_nic_outb(sc, ED_P0_CR, sc->cr_proto | ED_CR_PAGE_1 | ED_CR_STP); 1523 1524 if (ifp->if_flags & IFF_PROMISC) { 1525 1526 /* 1527 * Reconfigure the multicast filter. 1528 */ 1529 for (i = 0; i < 8; i++) 1530 ed_nic_outb(sc, ED_P1_MAR(i), 0xff); 1531 1532 /* 1533 * And turn on promiscuous mode. Also enable reception of 1534 * runts and packets with CRC & alignment errors. 1535 */ 1536 /* Set page 0 registers */ 1537 ed_nic_outb(sc, ED_P0_CR, sc->cr_proto | ED_CR_STP); 1538 1539 ed_nic_outb(sc, ED_P0_RCR, ED_RCR_PRO | ED_RCR_AM | 1540 ED_RCR_AB | ED_RCR_AR | ED_RCR_SEP | reg1); 1541 } else { 1542 /* set up multicast addresses and filter modes */ 1543 if (ifp->if_flags & IFF_MULTICAST) { 1544 uint32_t mcaf[2]; 1545 1546 if (ifp->if_flags & IFF_ALLMULTI) { 1547 mcaf[0] = 0xffffffff; 1548 mcaf[1] = 0xffffffff; 1549 } else 1550 ed_ds_getmcaf(sc, mcaf); 1551 1552 /* 1553 * Set multicast filter on chip. 1554 */ 1555 for (i = 0; i < 8; i++) 1556 ed_nic_outb(sc, ED_P1_MAR(i), ((u_char *) mcaf)[i]); 1557 1558 /* Set page 0 registers */ 1559 ed_nic_outb(sc, ED_P0_CR, sc->cr_proto | ED_CR_STP); 1560 1561 ed_nic_outb(sc, ED_P0_RCR, ED_RCR_AM | ED_RCR_AB | reg1); 1562 } else { 1563 1564 /* 1565 * Initialize multicast address hashing registers to 1566 * not accept multicasts. 1567 */ 1568 for (i = 0; i < 8; ++i) 1569 ed_nic_outb(sc, ED_P1_MAR(i), 0x00); 1570 1571 /* Set page 0 registers */ 1572 ed_nic_outb(sc, ED_P0_CR, sc->cr_proto | ED_CR_STP); 1573 1574 ed_nic_outb(sc, ED_P0_RCR, ED_RCR_AB | reg1); 1575 } 1576 } 1577 1578 /* 1579 * Start interface. 1580 */ 1581 ed_nic_outb(sc, ED_P0_CR, sc->cr_proto | ED_CR_STA); 1582} 1583 1584/* 1585 * Compute the multicast address filter from the 1586 * list of multicast addresses we need to listen to. 1587 */ 1588static void 1589ed_ds_getmcaf(struct ed_softc *sc, uint32_t *mcaf) 1590{ 1591 uint32_t index; 1592 u_char *af = (u_char *) mcaf; 1593 struct ifmultiaddr *ifma; 1594 1595 mcaf[0] = 0; 1596 mcaf[1] = 0; 1597 1598 IF_ADDR_LOCK(sc->ifp); 1599 TAILQ_FOREACH(ifma, &sc->ifp->if_multiaddrs, ifma_link) { 1600 if (ifma->ifma_addr->sa_family != AF_LINK) 1601 continue; 1602 index = ether_crc32_be(LLADDR((struct sockaddr_dl *) 1603 ifma->ifma_addr), ETHER_ADDR_LEN) >> 26; 1604 af[index >> 3] |= 1 << (index & 7); 1605 } 1606 IF_ADDR_UNLOCK(sc->ifp); 1607} 1608 1609int 1610ed_isa_mem_ok(device_t dev, u_long pmem, u_int memsize) 1611{ 1612 if (pmem < 0xa0000 || pmem + memsize > 0x1000000) { 1613 device_printf(dev, "Invalid ISA memory address range " 1614 "configured: 0x%lx - 0x%lx\n", pmem, pmem + memsize); 1615 return (ENXIO); 1616 } 1617 return (0); 1618} 1619 1620int 1621ed_clear_memory(device_t dev) 1622{ 1623 struct ed_softc *sc = device_get_softc(dev); 1624 bus_size_t i; 1625 1626 bus_space_set_region_1(sc->mem_bst, sc->mem_bsh, sc->mem_start, 1627 0, sc->mem_size); 1628 1629 for (i = 0; i < sc->mem_size; i++) { 1630 if (bus_space_read_1(sc->mem_bst, sc->mem_bsh, 1631 sc->mem_start + i)) { 1632 device_printf(dev, "failed to clear shared memory at " 1633 "0x%jx - check configuration\n", 1634 (uintmax_t)rman_get_start(sc->mem_res) + i); 1635 return (ENXIO); 1636 } 1637 } 1638 return (0); 1639}
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1640 1641u_short 1642ed_shmem_write_mbufs(struct ed_softc *sc, struct mbuf *m, bus_size_t dst) 1643{ 1644 u_short len; 1645 1646 /* 1647 * Special case setup for 16 bit boards... 1648 */ 1649 if (sc->isa16bit) { 1650 switch (sc->vendor) { 1651#ifdef ED_3C503 1652 /* 1653 * For 16bit 3Com boards (which have 16k of 1654 * memory), we have the xmit buffers in a 1655 * different page of memory ('page 0') - so 1656 * change pages. 1657 */ 1658 case ED_VENDOR_3COM: 1659 ed_asic_outb(sc, ED_3COM_GACFR, ED_3COM_GACFR_RSEL); 1660 break; 1661#endif 1662 /* 1663 * Enable 16bit access to shared memory on 1664 * WD/SMC boards. 1665 * 1666 * XXX - same as ed_enable_16bit_access() 1667 */ 1668 case ED_VENDOR_WD_SMC: 1669 ed_asic_outb(sc, ED_WD_LAAR, 1670 sc->wd_laar_proto | ED_WD_LAAR_M16EN); 1671 if (sc->chip_type == ED_CHIP_TYPE_WD790) 1672 ed_asic_outb(sc, ED_WD_MSR, ED_WD_MSR_MENB); 1673 break; 1674 } 1675 } 1676 for (len = 0; m != 0; m = m->m_next) { 1677 if (sc->isa16bit) 1678 bus_space_write_region_2(sc->mem_bst, 1679 sc->mem_bsh, dst, 1680 mtod(m, uint16_t *), (m->m_len + 1)/ 2); 1681 else 1682 bus_space_write_region_1(sc->mem_bst, 1683 sc->mem_bsh, dst, 1684 mtod(m, uint8_t *), m->m_len); 1685 dst += m->m_len; 1686 len += m->m_len; 1687 } 1688 1689 /* 1690 * Restore previous shared memory access 1691 */ 1692 if (sc->isa16bit) { 1693 switch (sc->vendor) { 1694#ifdef ED_3C503 1695 case ED_VENDOR_3COM: 1696 ed_asic_outb(sc, ED_3COM_GACFR, 1697 ED_3COM_GACFR_RSEL | ED_3COM_GACFR_MBS0); 1698 break; 1699#endif 1700 case ED_VENDOR_WD_SMC: 1701 /* XXX - same as ed_disable_16bit_access() */ 1702 if (sc->chip_type == ED_CHIP_TYPE_WD790) 1703 ed_asic_outb(sc, ED_WD_MSR, 0x00); 1704 ed_asic_outb(sc, ED_WD_LAAR, 1705 sc->wd_laar_proto & ~ED_WD_LAAR_M16EN); 1706 break; 1707 } 1708 } 1709 return (len); 1710} |
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