1/*
2 * Device driver for National Semiconductor DS8390/WD83C690 based ethernet
3 * adapters. By David Greenman, 29-April-1993
4 *
5 * Copyright (C) 1993, David Greenman. This software may be used, modified,
6 * copied, distributed, and sold, in both source and binary form provided
7 * that the above copyright and these terms are retained. Under no
8 * circumstances is the author responsible for the proper functioning
9 * of this software, nor does the author assume any responsibility
10 * for damages incurred with its use.
11 *
12 * Currently supports the Western Digital/SMC 8003 and 8013 series,
13 * the 3Com 3c503, the NE1000 and NE2000, and a variety of similar
14 * clones.
15 *
16 * Thanks to Charles Hannum for proving to me with example code that the
17 * NE1000/2000 support could be added with minimal impact. Without
18 * this, I wouldn't have proceeded in this direction.
19 *
20 */
21
22/*
23 * $Id: if_ed.c,v 1.21 1993/10/23 04:52:41 davidg Exp $
24 */
25
26/*
27 * Modification history
28 *
29 * Revision 2.11 1993/10/23 04:21:03 davidg
30 * Novell probe changed to be invasive because of too many complaints
31 * about some clone boards not being reset properly and thus not
32 * found on a warmboot. Yuck.
33 *
34 * Revision 2.10 1993/10/23 04:07:12 davidg
35 * increment output errors if the device times out (done via watchdog)
36 *
37 * Revision 2.9 1993/10/23 04:01:45 davidg
38 * increment input error counter if a packet with a bad length is
39 * detected.
40 *
41 * Revision 2.8 1993/10/15 10:59:56 davidg
42 * increase maximum time to wait for transmit DMA to complete to 120us.
43 * call ed_reset() if the time limit is reached instead of trying
44 * to abort the remote DMA.
45 *
46 * Revision 2.7 1993/10/15 10:49:10 davidg
47 * minor change to way the mbuf pointer temp variable is assigned in
48 * ed_start (slightly improves code readability)
49 *
50 * Revision 2.6 93/10/02 01:12:20 davidg
51 * use ETHER_ADDR_LEN in NE probe rather than '6'.
52 *
53 * Revision 2.5 93/09/30 17:44:14 davidg
54 * patch from vak@zebub.msk.su (Serge V.Vakulenko) to work around
55 * a hardware bug in cheap WD clone boards where the PROM checksum
56 * byte is always zero
57 *
58 * Revision 2.4 93/09/29 21:24:30 davidg
59 * Added software NIC reset in NE probe to work around a problem
60 * with some NE boards where the 8390 doesn't reset properly on
61 * power-up. Remove initialization of IMR/ISR in the NE probe
62 * because this is inherent in the reset.
63 *
64 * Revision 2.3 93/09/29 15:10:16 davidg
65 * credit Charles Hannum
66 *
67 * Revision 2.2 93/09/29 13:23:25 davidg
68 * added no multi-buffer override for 3c503
69 *
70 * Revision 2.1 93/09/29 12:32:12 davidg
71 * changed multi-buffer count for 16bit 3c503's from 5 to 2 after
72 * noticing that the transmitter becomes idle because of so many
73 * packets to load.
74 *
75 * Revision 2.0 93/09/29 00:00:19 davidg
76 * many changes, rewrites, additions, etc. Now supports the
77 * NE1000, NE2000, WD8003, WD8013, 3C503, 16bit 3C503, and
78 * a variety of similar clones. 16bit 3c503 now does multi
79 * transmit buffers. Nearly every part of the driver has
80 * changed in some way since rev 1.30.
81 *
82 * Revision 1.1 93/06/14 22:21:24 davidg
83 * Beta release of device driver for SMC/WD80x3 and 3C503 ethernet boards.
84 *
85 */
86
87#include "ed.h"
88#if NED > 0
89/* bpfilter included here in case it is needed in future net includes */
90#include "bpfilter.h"
91
92#include "param.h"
93#include "systm.h"
94#include "errno.h"
95#include "ioctl.h"
96#include "mbuf.h"
97#include "socket.h"
98#include "syslog.h"
99
100#include "net/if.h"
101#include "net/if_dl.h"
102#include "net/if_types.h"
103#include "net/netisr.h"
104
105#ifdef INET
106#include "netinet/in.h"
107#include "netinet/in_systm.h"
108#include "netinet/in_var.h"
109#include "netinet/ip.h"
110#include "netinet/if_ether.h"
111#endif
112
113#ifdef NS
114#include "netns/ns.h"
115#include "netns/ns_if.h"
116#endif
117
118#if NBPFILTER > 0
119#include "net/bpf.h"
120#include "net/bpfdesc.h"
121#endif
122
123#include "i386/isa/isa.h"
124#include "i386/isa/isa_device.h"
125#include "i386/isa/icu.h"
126#include "i386/isa/if_edreg.h"
127
128#include "i386/include/pio.h"
129
130/* For backwards compatibility */
131#ifndef IFF_ALTPHYS
132#define IFF_ALTPHYS IFF_LLC0
133#endif
134
135/*
136 * ed_softc: per line info and status
137 */
138struct ed_softc {
139 struct arpcom arpcom; /* ethernet common */
140
141 char *type_str; /* pointer to type string */
142 u_char vendor; /* interface vendor */
143 u_char type; /* interface type code */
144
145 u_short asic_addr; /* ASIC I/O bus address */
146 u_short nic_addr; /* NIC (DS8390) I/O bus address */
147
148/*
149 * The following 'proto' variable is part of a work-around for 8013EBT asics
150 * being write-only. It's sort of a prototype/shadow of the real thing.
151 */
152 u_char wd_laar_proto;
153 u_char isa16bit; /* width of access to card 0=8 or 1=16 */
154
155 caddr_t bpf; /* BPF "magic cookie" */
156 caddr_t mem_start; /* NIC memory start address */
157 caddr_t mem_end; /* NIC memory end address */
158 u_long mem_size; /* total NIC memory size */
159 caddr_t mem_ring; /* start of RX ring-buffer (in NIC mem) */
160
161 u_char mem_shared; /* NIC memory is shared with host */
162 u_char xmit_busy; /* transmitter is busy */
163 u_char txb_cnt; /* number of transmit buffers */
164 u_char txb_inuse; /* number of TX buffers currently in-use*/
165
166 u_char txb_new; /* pointer to where new buffer will be added */
167 u_char txb_next_tx; /* pointer to next buffer ready to xmit */
168 u_short txb_len[8]; /* buffered xmit buffer lengths */
169 u_char tx_page_start; /* first page of TX buffer area */
170 u_char rec_page_start; /* first page of RX ring-buffer */
171 u_char rec_page_stop; /* last page of RX ring-buffer */
172 u_char next_packet; /* pointer to next unread RX packet */
173} ed_softc[NED];
174
175int ed_attach(), ed_init(), edintr(), ed_ioctl(), ed_probe(),
176 ed_start(), ed_reset(), ed_watchdog();
177
178static void ed_stop();
179
180static inline void ed_rint();
181static inline void ed_xmit();
182static inline char *ed_ring_copy();
183
184void ed_pio_readmem(), ed_pio_writemem();
185u_short ed_pio_write_mbufs();
186
187extern int ether_output();
188
189struct trailer_header {
190 u_short ether_type;
191 u_short ether_residual;
192};
193
194struct isa_driver eddriver = {
195 ed_probe,
196 ed_attach,
197 "ed"
198};
199/*
200 * Interrupt conversion table for WD/SMC ASIC
201 * (IRQ* are defined in icu.h)
202 */
203static unsigned short ed_intr_mask[] = {
204 IRQ9,
205 IRQ3,
206 IRQ5,
207 IRQ7,
208 IRQ10,
209 IRQ11,
210 IRQ15,
211 IRQ4
212};
213
214#define ETHER_MIN_LEN 64
215#define ETHER_MAX_LEN 1518
216#define ETHER_ADDR_LEN 6
217#define ETHER_HDR_SIZE 14
218
219/*
220 * Determine if the device is present
221 *
222 * on entry:
223 * a pointer to an isa_device struct
224 * on exit:
225 * NULL if device not found
226 * or # of i/o addresses used (if found)
227 */
228int
229ed_probe(isa_dev)
230 struct isa_device *isa_dev;
231{
232 struct ed_softc *sc = &ed_softc[isa_dev->id_unit];
233 int nports;
234
235 if (nports = ed_probe_WD80x3(isa_dev))
236 return (nports);
237
238 if (nports = ed_probe_3Com(isa_dev))
239 return (nports);
240
241 if (nports = ed_probe_Novell(isa_dev))
242 return (nports);
243
244 return 0; /* Added by GW: don't fall off the end */
245}
246
247/*
248 * Generic probe routine for testing for the existance of a DS8390.
249 * Must be called after the NIC has just been reset. This routine
250 * works by looking at certain register values that are gauranteed
251 * to be initialized a certain way after power-up or reset. Seems
252 * not to currently work on the 83C690.
253 *
254 * Specifically:
255 *
256 * Register reset bits set bits
257 * Command Register (CR) TXP, STA RD2, STP
258 * Interrupt Status (ISR) RST
259 * Interrupt Mask (IMR) All bits
260 * Data Control (DCR) LAS
261 * Transmit Config. (TCR) LB1, LB0
262 *
263 * We only look at the CR and ISR registers, however, because looking at
264 * the others would require changing register pages (which would be
265 * intrusive if this isn't an 8390).
266 *
267 * Return 1 if 8390 was found, 0 if not.
268 */
269
270int
271ed_probe_generic8390(sc)
272 struct ed_softc *sc;
273{
274 if ((inb(sc->nic_addr + ED_P0_CR) &
275 (ED_CR_RD2|ED_CR_TXP|ED_CR_STA|ED_CR_STP)) !=
276 (ED_CR_RD2|ED_CR_STP))
277 return (0);
278 if ((inb(sc->nic_addr + ED_P0_ISR) & ED_ISR_RST) != ED_ISR_RST)
279 return (0);
280
281 return(1);
282}
283
284/*
285 * Probe and vendor-specific initialization routine for SMC/WD80x3 boards
286 */
287int
288ed_probe_WD80x3(isa_dev)
289 struct isa_device *isa_dev;
290{
291 struct ed_softc *sc = &ed_softc[isa_dev->id_unit];
292 int i;
293 u_int memsize;
294 u_char iptr, isa16bit, sum;
295
296 sc->asic_addr = isa_dev->id_iobase;
297 sc->nic_addr = sc->asic_addr + ED_WD_NIC_OFFSET;
298
299 /*
300 * Attempt to do a checksum over the station address PROM.
301 * If it fails, it's probably not a SMC/WD board. There
302 * is a problem with this, though: some clone WD boards
303 * don't pass the checksum test. Danpex boards for one.
304 */
305 for (sum = 0, i = 0; i < 8; ++i)
306 sum += inb(sc->asic_addr + ED_WD_PROM + i);
307
308 if (sum != ED_WD_ROM_CHECKSUM_TOTAL) {
309 /*
310 * Checksum is invalid. This often happens with cheap
311 * WD8003E clones. In this case, the checksum byte
312 * (the eighth byte) seems to always be zero.
313 */
314 if (inb(sc->asic_addr + ED_WD_CARD_ID) != ED_TYPE_WD8003E ||
315 inb(sc->asic_addr + ED_WD_PROM + 7) != 0)
316 return(0);
317 }
318
319 /* reset card to force it into a known state. */
320 outb(sc->asic_addr + ED_WD_MSR, ED_WD_MSR_RST);
321 DELAY(100);
322 outb(sc->asic_addr + ED_WD_MSR, inb(sc->asic_addr + ED_WD_MSR) & ~ED_WD_MSR_RST);
323 /* wait in the case this card is reading it's EEROM */
324 DELAY(5000);
325
326 sc->vendor = ED_VENDOR_WD_SMC;
327 sc->type = inb(sc->asic_addr + ED_WD_CARD_ID);
328
329 /*
330 * Set initial values for width/size.
331 */
332 switch (sc->type) {
333 case ED_TYPE_WD8003S:
334 sc->type_str = "WD8003S";
335 memsize = 8192;
336 isa16bit = 0;
337 break;
338 case ED_TYPE_WD8003E:
339 sc->type_str = "WD8003E";
340 memsize = 8192;
341 isa16bit = 0;
342 break;
343 case ED_TYPE_WD8013EBT:
344 sc->type_str = "WD8013EBT";
345 memsize = 16384;
346 isa16bit = 1;
347 break;
348 case ED_TYPE_WD8013EP: /* also WD8003EP */
349 if (inb(sc->asic_addr + ED_WD_ICR)
350 & ED_WD_ICR_16BIT) {
351 isa16bit = 1;
352 memsize = 16384;
353 sc->type_str = "WD8013EP";
354 } else {
355 isa16bit = 0;
356 memsize = 8192;
357 sc->type_str = "WD8003EP";
358 }
359 break;
360 case ED_TYPE_WD8013WC:
361 sc->type_str = "WD8013WC";
362 memsize = 16384;
363 isa16bit = 1;
364 break;
365 case ED_TYPE_WD8013EBP:
366 sc->type_str = "WD8013EBP";
367 memsize = 16384;
368 isa16bit = 1;
369 break;
370 case ED_TYPE_WD8013EPC:
371 sc->type_str = "WD8013EPC";
372 memsize = 16384;
373 isa16bit = 1;
374 break;
375 default:
376 sc->type_str = "";
377 memsize = 8192;
378 isa16bit = 0;
379 break;
380 }
381 /*
382 * Make some adjustments to initial values depending on what is
383 * found in the ICR.
384 */
385 if (isa16bit && (sc->type != ED_TYPE_WD8013EBT)
386 && ((inb(sc->asic_addr + ED_WD_ICR) & ED_WD_ICR_16BIT) == 0)) {
387 isa16bit = 0;
388 memsize = 8192;
389 }
390
391#if ED_DEBUG
392 printf("type=%s isa16bit=%d memsize=%d id_msize=%d\n",
393 sc->type_str,isa16bit,memsize,isa_dev->id_msize);
394 for (i=0; i<8; i++)
395 printf("%x -> %x\n", i, inb(sc->asic_addr + i));
396#endif
397 /*
398 * Allow the user to override the autoconfiguration
399 */
400 if (isa_dev->id_msize)
401 memsize = isa_dev->id_msize;
402 /*
403 * (note that if the user specifies both of the following flags
404 * that '8bit' mode intentionally has precedence)
405 */
406 if (isa_dev->id_flags & ED_FLAGS_FORCE_16BIT_MODE)
407 isa16bit = 1;
408 if (isa_dev->id_flags & ED_FLAGS_FORCE_8BIT_MODE)
409 isa16bit = 0;
410
411 /*
412 * Check 83C584 interrupt configuration register if this board has one
413 * XXX - we could also check the IO address register. But why
414 * bother...if we get past this, it *has* to be correct.
415 */
416 if (sc->type & ED_WD_SOFTCONFIG) {
417 /*
418 * Assemble together the encoded interrupt number.
419 */
420 iptr = (inb(isa_dev->id_iobase + ED_WD_ICR) & ED_WD_ICR_IR2) |
421 ((inb(isa_dev->id_iobase + ED_WD_IRR) &
422 (ED_WD_IRR_IR0 | ED_WD_IRR_IR1)) >> 5);
423 /*
424 * Translate it using translation table, and check for correctness.
425 */
426 if (ed_intr_mask[iptr] != isa_dev->id_irq) {
427 printf("ed%d: kernel configured irq %d doesn't match board configured irq %d\n",
428 isa_dev->id_unit, ffs(isa_dev->id_irq) - 1, ffs(ed_intr_mask[iptr]) - 1);
429 return(0);
430 }
431 /*
432 * Enable the interrupt.
433 */
434 outb(isa_dev->id_iobase + ED_WD_IRR,
435 inb(isa_dev->id_iobase + ED_WD_IRR) | ED_WD_IRR_IEN);
436 }
437
438 sc->isa16bit = isa16bit;
439
440#ifdef notyet /* XXX - I'm not sure if PIO mode is even possible on WD/SMC boards */
441 /*
442 * The following allows the WD/SMC boards to be used in Programmed I/O
443 * mode - without mapping the NIC memory shared. ...Not the prefered
444 * way, but it might be the only way.
445 */
446 if (isa_dev->id_flags & ED_FLAGS_FORCE_PIO) {
447 sc->mem_shared = 0;
448 isa_dev->id_maddr = 0;
449 } else {
450 sc->mem_shared = 1;
451 }
452#else
453 sc->mem_shared = 1;
454#endif
455 isa_dev->id_msize = memsize;
456
457 sc->mem_start = (caddr_t)isa_dev->id_maddr;
458
459 /*
460 * allocate one xmit buffer if < 16k, two buffers otherwise
461 */
462 if ((memsize < 16384) || (isa_dev->id_flags & ED_FLAGS_NO_MULTI_BUFFERING)) {
463 sc->mem_ring = sc->mem_start + (ED_PAGE_SIZE * ED_TXBUF_SIZE);
464 sc->txb_cnt = 1;
465 sc->rec_page_start = ED_TXBUF_SIZE;
466 } else {
467 sc->mem_ring = sc->mem_start + (ED_PAGE_SIZE * ED_TXBUF_SIZE * 2);
468 sc->txb_cnt = 2;
469 sc->rec_page_start = ED_TXBUF_SIZE * 2;
470 }
471 sc->mem_size = memsize;
472 sc->mem_end = sc->mem_start + memsize;
473 sc->rec_page_stop = memsize / ED_PAGE_SIZE;
474 sc->tx_page_start = ED_WD_PAGE_OFFSET;
475
476 /*
477 * Get station address from on-board ROM
478 */
479 for (i = 0; i < ETHER_ADDR_LEN; ++i)
480 sc->arpcom.ac_enaddr[i] = inb(sc->asic_addr + ED_WD_PROM + i);
481
482 if (sc->mem_shared) {
483 /*
484 * Set address and enable interface shared memory.
485 */
486 outb(sc->asic_addr + ED_WD_MSR, ((kvtop(sc->mem_start) >> 13) &
487 ED_WD_MSR_ADDR) | ED_WD_MSR_MENB);
488
489 /*
490 * Set upper address bits and 8/16 bit access to shared memory
491 */
492 if (isa16bit) {
493 outb(sc->asic_addr + ED_WD_LAAR, (sc->wd_laar_proto =
494 ED_WD_LAAR_L16EN | ED_WD_LAAR_M16EN |
495 ((kvtop(sc->mem_start) >> 19) & ED_WD_LAAR_ADDRHI)));
496 } else {
497 if ((sc->type & ED_WD_SOFTCONFIG) || (sc->type == ED_TYPE_WD8013EBT)) {
498 outb(sc->asic_addr + ED_WD_LAAR, (sc->wd_laar_proto =
499 ((kvtop(sc->mem_start) >> 19) & ED_WD_LAAR_ADDRHI)));
500 }
501 }
502
503 /*
504 * Now zero memory and verify that it is clear
505 */
506 bzero(sc->mem_start, memsize);
507
508 for (i = 0; i < memsize; ++i)
509 if (sc->mem_start[i]) {
510 printf("ed%d: failed to clear shared memory at %x - check configuration\n",
511 isa_dev->id_unit, kvtop(sc->mem_start + i));
512
513 /*
514 * Disable 16 bit access to shared memory
515 */
516 if (isa16bit)
517 outb(sc->asic_addr + ED_WD_LAAR, (sc->wd_laar_proto &=
518 ~ED_WD_LAAR_M16EN));
519
520 return(0);
521 }
522
523 /*
524 * Disable 16bit access to shared memory - we leave it disabled so
525 * that 1) machines reboot properly when the board is set
526 * 16 bit mode and there are conflicting 8bit devices/ROMS
527 * in the same 128k address space as this boards shared
528 * memory. and 2) so that other 8 bit devices with shared
529 * memory can be used in this 128k region, too.
530 */
531 if (isa16bit)
532 outb(sc->asic_addr + ED_WD_LAAR, (sc->wd_laar_proto &=
533 ~ED_WD_LAAR_M16EN));
534
535 }
536
537 return (ED_WD_IO_PORTS);
538}
539
540/*
541 * Probe and vendor-specific initialization routine for 3Com 3c503 boards
542 */
543int
544ed_probe_3Com(isa_dev)
545 struct isa_device *isa_dev;
546{
547 struct ed_softc *sc = &ed_softc[isa_dev->id_unit];
548 int i;
549 u_int memsize;
550 u_char isa16bit, sum;
551
552 sc->asic_addr = isa_dev->id_iobase + ED_3COM_ASIC_OFFSET;
553 sc->nic_addr = isa_dev->id_iobase + ED_3COM_NIC_OFFSET;
554
555 /*
556 * Verify that the kernel configured I/O address matches the board
557 * configured address
558 */
559 switch (inb(sc->asic_addr + ED_3COM_BCFR)) {
560 case ED_3COM_BCFR_300:
561 if (isa_dev->id_iobase != 0x300)
562 return(0);
563 break;
564 case ED_3COM_BCFR_310:
565 if (isa_dev->id_iobase != 0x310)
566 return(0);
567 break;
568 case ED_3COM_BCFR_330:
569 if (isa_dev->id_iobase != 0x330)
570 return(0);
571 break;
572 case ED_3COM_BCFR_350:
573 if (isa_dev->id_iobase != 0x350)
574 return(0);
575 break;
576 case ED_3COM_BCFR_250:
577 if (isa_dev->id_iobase != 0x250)
578 return(0);
579 break;
580 case ED_3COM_BCFR_280:
581 if (isa_dev->id_iobase != 0x280)
582 return(0);
583 break;
584 case ED_3COM_BCFR_2A0:
585 if (isa_dev->id_iobase != 0x2a0)
586 return(0);
587 break;
588 case ED_3COM_BCFR_2E0:
589 if (isa_dev->id_iobase != 0x2e0)
590 return(0);
591 break;
592 default:
593 return(0);
594 }
595
596 /*
597 * Verify that the kernel shared memory address matches the
598 * board configured address.
599 */
600 switch (inb(sc->asic_addr + ED_3COM_PCFR)) {
601 case ED_3COM_PCFR_DC000:
602 if (kvtop(isa_dev->id_maddr) != 0xdc000)
603 return(0);
604 break;
605 case ED_3COM_PCFR_D8000:
606 if (kvtop(isa_dev->id_maddr) != 0xd8000)
607 return(0);
608 break;
609 case ED_3COM_PCFR_CC000:
610 if (kvtop(isa_dev->id_maddr) != 0xcc000)
611 return(0);
612 break;
613 case ED_3COM_PCFR_C8000:
614 if (kvtop(isa_dev->id_maddr) != 0xc8000)
615 return(0);
616 break;
617 default:
618 return(0);
619 }
620
621
622 /*
623 * Reset NIC and ASIC. Enable on-board transceiver throughout reset
624 * sequence because it'll lock up if the cable isn't connected
625 * if we don't.
626 */
627 outb(sc->asic_addr + ED_3COM_CR, ED_3COM_CR_RST | ED_3COM_CR_XSEL);
628
629 /*
630 * Wait for a while, then un-reset it
631 */
632 DELAY(50);
633 /*
634 * The 3Com ASIC defaults to rather strange settings for the CR after
635 * a reset - it's important to set it again after the following
636 * outb (this is done when we map the PROM below).
637 */
638 outb(sc->asic_addr + ED_3COM_CR, ED_3COM_CR_XSEL);
639
640 /*
641 * Wait a bit for the NIC to recover from the reset
642 */
643 DELAY(5000);
644
645 sc->vendor = ED_VENDOR_3COM;
646 sc->type_str = "3c503";
647
648 sc->mem_shared = 1;
649
650 /*
651 * Hmmm...a 16bit 3Com board has 16k of memory, but only an 8k
652 * window to it.
653 */
654 memsize = 8192;
655
656 /*
657 * Get station address from on-board ROM
658 */
659 /*
660 * First, map ethernet address PROM over the top of where the NIC
661 * registers normally appear.
662 */
663 outb(sc->asic_addr + ED_3COM_CR, ED_3COM_CR_EALO | ED_3COM_CR_XSEL);
664
665 for (i = 0; i < ETHER_ADDR_LEN; ++i)
666 sc->arpcom.ac_enaddr[i] = inb(sc->nic_addr + i);
667
668 /*
669 * Unmap PROM - select NIC registers. The proper setting of the
670 * tranceiver is set in ed_init so that the attach code
671 * is given a chance to set the default based on a compile-time
672 * config option
673 */
674 outb(sc->asic_addr + ED_3COM_CR, ED_3COM_CR_XSEL);
675
676 /*
677 * Determine if this is an 8bit or 16bit board
678 */
679
680 /*
681 * select page 0 registers
682 */
683 outb(sc->nic_addr + ED_P0_CR, ED_CR_RD2|ED_CR_STP);
684
685 /*
686 * Attempt to clear WTS bit. If it doesn't clear, then this is a
687 * 16bit board.
688 */
689 outb(sc->nic_addr + ED_P0_DCR, 0);
690
691 /*
692 * select page 2 registers
693 */
694 outb(sc->nic_addr + ED_P0_CR, ED_CR_PAGE_2|ED_CR_RD2|ED_CR_STP);
695
696 /*
697 * The 3c503 forces the WTS bit to a one if this is a 16bit board
698 */
699 if (inb(sc->nic_addr + ED_P2_DCR) & ED_DCR_WTS)
700 isa16bit = 1;
701 else
702 isa16bit = 0;
703
704 /*
705 * select page 0 registers
706 */
707 outb(sc->nic_addr + ED_P2_CR, ED_CR_RD2|ED_CR_STP);
708
709 sc->mem_start = (caddr_t)isa_dev->id_maddr;
710 sc->mem_size = memsize;
711 sc->mem_end = sc->mem_start + memsize;
712
713 /*
714 * We have an entire 8k window to put the transmit buffers on the
715 * 16bit boards. But since the 16bit 3c503's shared memory
716 * is only fast enough to overlap the loading of one full-size
717 * packet, trying to load more than 2 buffers can actually
718 * leave the transmitter idle during the load. So 2 seems
719 * the best value. (Although a mix of variable-sized packets
720 * might change this assumption. Nonetheless, we optimize for
721 * linear transfers of same-size packets.)
722 */
723 if (isa16bit) {
724 if (isa_dev->id_flags & ED_FLAGS_NO_MULTI_BUFFERING)
725 sc->txb_cnt = 1;
726 else
727 sc->txb_cnt = 2;
728
729 sc->tx_page_start = ED_3COM_TX_PAGE_OFFSET_16BIT;
730 sc->rec_page_start = ED_3COM_RX_PAGE_OFFSET_16BIT;
731 sc->rec_page_stop = memsize / ED_PAGE_SIZE +
732 ED_3COM_RX_PAGE_OFFSET_16BIT;
733 sc->mem_ring = sc->mem_start;
734 } else {
735 sc->txb_cnt = 1;
736 sc->tx_page_start = ED_3COM_TX_PAGE_OFFSET_8BIT;
737 sc->rec_page_start = ED_TXBUF_SIZE + ED_3COM_TX_PAGE_OFFSET_8BIT;
738 sc->rec_page_stop = memsize / ED_PAGE_SIZE +
739 ED_3COM_TX_PAGE_OFFSET_8BIT;
740 sc->mem_ring = sc->mem_start + (ED_PAGE_SIZE * ED_TXBUF_SIZE);
741 }
742
743 sc->isa16bit = isa16bit;
744
745 /*
746 * Initialize GA page start/stop registers. Probably only needed
747 * if doing DMA, but what the hell.
748 */
749 outb(sc->asic_addr + ED_3COM_PSTR, sc->rec_page_start);
750 outb(sc->asic_addr + ED_3COM_PSPR, sc->rec_page_stop);
751
752 /*
753 * Set IRQ. 3c503 only allows a choice of irq 2-5.
754 */
755 switch (isa_dev->id_irq) {
756 case IRQ2:
757 outb(sc->asic_addr + ED_3COM_IDCFR, ED_3COM_IDCFR_IRQ2);
758 break;
759 case IRQ3:
760 outb(sc->asic_addr + ED_3COM_IDCFR, ED_3COM_IDCFR_IRQ3);
761 break;
762 case IRQ4:
763 outb(sc->asic_addr + ED_3COM_IDCFR, ED_3COM_IDCFR_IRQ4);
764 break;
765 case IRQ5:
766 outb(sc->asic_addr + ED_3COM_IDCFR, ED_3COM_IDCFR_IRQ5);
767 break;
768 default:
769 printf("ed%d: Invalid irq configuration (%d) must be 2-5 for 3c503\n",
770 isa_dev->id_unit, ffs(isa_dev->id_irq) - 1);
771 return(0);
772 }
773
774 /*
775 * Initialize GA configuration register. Set bank and enable shared mem.
776 */
777 outb(sc->asic_addr + ED_3COM_GACFR, ED_3COM_GACFR_RSEL |
778 ED_3COM_GACFR_MBS0);
779
780 /*
781 * Initialize "Vector Pointer" registers. These gawd-awful things
782 * are compared to 20 bits of the address on ISA, and if they
783 * match, the shared memory is disabled. We set them to
784 * 0xffff0...allegedly the reset vector.
785 */
786 outb(sc->asic_addr + ED_3COM_VPTR2, 0xff);
787 outb(sc->asic_addr + ED_3COM_VPTR1, 0xff);
788 outb(sc->asic_addr + ED_3COM_VPTR0, 0x00);
789
790 /*
791 * Zero memory and verify that it is clear
792 */
793 bzero(sc->mem_start, memsize);
794
795 for (i = 0; i < memsize; ++i)
796 if (sc->mem_start[i]) {
797 printf("ed%d: failed to clear shared memory at %x - check configuration\n",
798 isa_dev->id_unit, kvtop(sc->mem_start + i));
799 return(0);
800 }
801
802 isa_dev->id_msize = memsize;
803 return(ED_3COM_IO_PORTS);
804}
805
806/*
807 * Probe and vendor-specific initialization routine for NE1000/2000 boards
808 */
809int
810ed_probe_Novell(isa_dev)
811 struct isa_device *isa_dev;
812{
813 struct ed_softc *sc = &ed_softc[isa_dev->id_unit];
814 u_int memsize, n;
815 u_char romdata[16], isa16bit = 0, tmp;
816 static char test_pattern[32] = "THIS is A memory TEST pattern";
817 char test_buffer[32];
818
819 sc->asic_addr = isa_dev->id_iobase + ED_NOVELL_ASIC_OFFSET;
820 sc->nic_addr = isa_dev->id_iobase + ED_NOVELL_NIC_OFFSET;
821
822 /* XXX - do Novell-specific probe here */
823
824 /* Reset the board */
825 tmp = inb(sc->asic_addr + ED_NOVELL_RESET);
826
827#if 0
828 /*
829 * This total and completely screwy thing is to work around braindamage
830 * in some NE compatible boards. Why it works, I have *no* idea.
831 * It appears that the boards watch the ISA bus for an outb, and
832 * will lock up the ISA bus if they see an inb first. Weird.
833 */
834 outb(0x84, 0);
835#endif
836
837 /*
838 * I don't know if this is necessary; probably cruft leftover from
839 * Clarkson packet driver code. Doesn't do a thing on the boards
840 * I've tested. -DG [note that a outb(0x84, 0) seems to work
841 * here, and is non-invasive...but some boards don't seem to reset
842 * and I don't have complete documentation on what the 'right'
843 * thing to do is...so we do the invasive thing for now. Yuck.]
844 */
845 outb(sc->asic_addr + ED_NOVELL_RESET, tmp);
846 DELAY(5000);
847
848 /*
849 * This is needed because some NE clones apparently don't reset the
850 * NIC properly (or the NIC chip doesn't reset fully on power-up)
851 * XXX - this makes the probe invasive! ...Done against my better
852 * judgement. -DLG
853 */
854 outb(sc->nic_addr + ED_P0_CR, ED_CR_RD2|ED_CR_STP);
855
856 DELAY(5000);
857
858 /* Make sure that we really have an 8390 based board */
859 if (!ed_probe_generic8390(sc))
860 return(0);
861
862 sc->vendor = ED_VENDOR_NOVELL;
863 sc->mem_shared = 0;
864 isa_dev->id_maddr = 0;
865
866 /*
867 * Test the ability to read and write to the NIC memory. This has
868 * the side affect of determining if this is an NE1000 or an NE2000.
869 */
870
871 /*
872 * This prevents packets from being stored in the NIC memory when
873 * the readmem routine turns on the start bit in the CR.
874 */
875 outb(sc->nic_addr + ED_P0_RCR, ED_RCR_MON);
876
877 /* Temporarily initialize DCR for byte operations */
878 outb(sc->nic_addr + ED_P0_DCR, ED_DCR_FT1|ED_DCR_LS);
879
880 outb(sc->nic_addr + ED_P0_PSTART, 8192 / ED_PAGE_SIZE);
881 outb(sc->nic_addr + ED_P0_PSTOP, 16384 / ED_PAGE_SIZE);
882
883 sc->isa16bit = 0;
884
885 /*
886 * Write a test pattern in byte mode. If this fails, then there
887 * probably isn't any memory at 8k - which likely means
888 * that the board is an NE2000.
889 */
890 ed_pio_writemem(sc, test_pattern, 8192, sizeof(test_pattern));
891 ed_pio_readmem(sc, 8192, test_buffer, sizeof(test_pattern));
892
893 if (bcmp(test_pattern, test_buffer, sizeof(test_pattern))) {
894 /* not an NE1000 - try NE2000 */
895
896 outb(sc->nic_addr + ED_P0_DCR,
897 ED_DCR_WTS|ED_DCR_FT1|ED_DCR_LS);
898 outb(sc->nic_addr + ED_P0_PSTART, 16384 / ED_PAGE_SIZE);
899 outb(sc->nic_addr + ED_P0_PSTOP, 32768 / ED_PAGE_SIZE);
900
901 sc->isa16bit = 1;
902 /*
903 * Write a test pattern in word mode. If this also fails, then
904 * we don't know what this board is.
905 */
906 ed_pio_writemem(sc, test_pattern, 16384, sizeof(test_pattern));
907 ed_pio_readmem(sc, 16384, test_buffer, sizeof(test_pattern));
908
909 if (bcmp(test_pattern, test_buffer, sizeof(test_pattern)))
910 return(0); /* not an NE2000 either */
911
912 sc->type = ED_TYPE_NE2000;
913 sc->type_str = "NE2000";
914 } else {
915 sc->type = ED_TYPE_NE1000;
916 sc->type_str = "NE1000";
917 }
918
919 /* 8k of memory plus an additional 8k if 16bit */
920 memsize = 8192 + sc->isa16bit * 8192;
921
922#if 0 /* probably not useful - NE boards only come two ways */
923 /* allow kernel config file overrides */
924 if (isa_dev->id_msize)
925 memsize = isa_dev->id_msize;
926#endif
927
928 sc->mem_size = memsize;
929
930 /* NIC memory doesn't start at zero on an NE board */
931 /* The start address is tied to the bus width */
932 sc->mem_start = (char *) 8192 + sc->isa16bit * 8192;
933 sc->mem_end = sc->mem_start + memsize;
934 sc->tx_page_start = memsize / ED_PAGE_SIZE;
935
936 /*
937 * Use one xmit buffer if < 16k, two buffers otherwise (if not told
938 * otherwise).
939 */
940 if ((memsize < 16384) || (isa_dev->id_flags & ED_FLAGS_NO_MULTI_BUFFERING))
941 sc->txb_cnt = 1;
942 else
943 sc->txb_cnt = 2;
944
945 sc->rec_page_start = sc->tx_page_start + sc->txb_cnt * ED_TXBUF_SIZE;
946 sc->rec_page_stop = sc->tx_page_start + memsize / ED_PAGE_SIZE;
947
948 sc->mem_ring = sc->mem_start + sc->txb_cnt * ED_PAGE_SIZE * ED_TXBUF_SIZE;
949
950 ed_pio_readmem(sc, 0, romdata, 16);
951 for (n = 0; n < ETHER_ADDR_LEN; n++)
952 sc->arpcom.ac_enaddr[n] = romdata[n*(sc->isa16bit+1)];
953
954 /* clear any pending interrupts that might have occurred above */
955 outb(sc->nic_addr + ED_P0_ISR, 0xff);
956
957 return(ED_NOVELL_IO_PORTS);
958}
959
960/*
961 * Install interface into kernel networking data structures
962 */
963int
964ed_attach(isa_dev)
965 struct isa_device *isa_dev;
966{
967 struct ed_softc *sc = &ed_softc[isa_dev->id_unit];
968 struct ifnet *ifp = &sc->arpcom.ac_if;
969 struct ifaddr *ifa;
970 struct sockaddr_dl *sdl;
971
972 /*
973 * Set interface to stopped condition (reset)
974 */
975 ed_stop(isa_dev->id_unit);
976
977 /*
978 * Initialize ifnet structure
979 */
980 ifp->if_unit = isa_dev->id_unit;
981 ifp->if_name = "ed" ;
982 ifp->if_mtu = ETHERMTU;
983 ifp->if_init = ed_init;
984 ifp->if_output = ether_output;
985 ifp->if_start = ed_start;
986 ifp->if_ioctl = ed_ioctl;
987 ifp->if_reset = ed_reset;
988 ifp->if_watchdog = ed_watchdog;
989
990 /*
991 * Set default state for ALTPHYS flag (used to disable the tranceiver
992 * for AUI operation), based on compile-time config option.
993 */
994 if (isa_dev->id_flags & ED_FLAGS_DISABLE_TRANCEIVER)
995 ifp->if_flags = (IFF_BROADCAST | IFF_SIMPLEX | IFF_NOTRAILERS
996 | IFF_ALTPHYS);
997 else
998 ifp->if_flags = (IFF_BROADCAST | IFF_SIMPLEX | IFF_NOTRAILERS);
999
1000 /*
1001 * Attach the interface
1002 */
1003 if_attach(ifp);
1004
1005 /*
1006 * Search down the ifa address list looking for the AF_LINK type entry
1007 */
1008 ifa = ifp->if_addrlist;
1009 while ((ifa != 0) && (ifa->ifa_addr != 0) &&
1010 (ifa->ifa_addr->sa_family != AF_LINK))
1011 ifa = ifa->ifa_next;
1012 /*
1013 * If we find an AF_LINK type entry we fill in the hardware address.
1014 * This is useful for netstat(1) to keep track of which interface
1015 * is which.
1016 */
1017 if ((ifa != 0) && (ifa->ifa_addr != 0)) {
1018 /*
1019 * Fill in the link-level address for this interface
1020 */
1021 sdl = (struct sockaddr_dl *)ifa->ifa_addr;
1022 sdl->sdl_type = IFT_ETHER;
1023 sdl->sdl_alen = ETHER_ADDR_LEN;
1024 sdl->sdl_slen = 0;
1025 bcopy(sc->arpcom.ac_enaddr, LLADDR(sdl), ETHER_ADDR_LEN);
1026 }
1027
1028 /*
1029 * Print additional info when attached
1030 */
1031 printf("ed%d: address %s, ", isa_dev->id_unit,
1032 ether_sprintf(sc->arpcom.ac_enaddr));
1033
1034 if (sc->type_str && (*sc->type_str != 0))
1035 printf("type %s ", sc->type_str);
1036 else
1037 printf("type unknown (0x%x) ", sc->type);
1038
1039 printf("%s ",sc->isa16bit ? "(16 bit)" : "(8 bit)");
1040
1041 printf("%s\n", ((sc->vendor == ED_VENDOR_3COM) &&
1042 (ifp->if_flags & IFF_ALTPHYS)) ? "tranceiver disabled" : "");
1043
1044 /*
1045 * If BPF is in the kernel, call the attach for it
1046 */
1047#if NBPFILTER > 0
1048 bpfattach(&sc->bpf, ifp, DLT_EN10MB, sizeof(struct ether_header));
1049#endif
1050
1051}
1052
1053/*
1054 * Reset interface.
1055 */
1056int
1057ed_reset(unit)
1058 int unit;
1059{
1060 int s;
1061
1062 s = splnet();
1063
1064 /*
1065 * Stop interface and re-initialize.
1066 */
1067 ed_stop(unit);
1068 ed_init(unit);
1069
1070 (void) splx(s);
1071}
1072
1073/*
1074 * Take interface offline.
1075 */
1076void
1077ed_stop(unit)
1078 int unit;
1079{
1080 struct ed_softc *sc = &ed_softc[unit];
1081 int n = 5000;
1082
1083 /*
1084 * Stop everything on the interface, and select page 0 registers.
1085 */
1086 outb(sc->nic_addr + ED_P0_CR, ED_CR_RD2|ED_CR_STP);
1087
1088 /*
1089 * Wait for interface to enter stopped state, but limit # of checks
1090 * to 'n' (about 5ms). It shouldn't even take 5us on modern
1091 * DS8390's, but just in case it's an old one.
1092 */
1093 while (((inb(sc->nic_addr + ED_P0_ISR) & ED_ISR_RST) == 0) && --n);
1094
1095}
1096
1097/*
1098 * Device timeout/watchdog routine. Entered if the device neglects to
1099 * generate an interrupt after a transmit has been started on it.
1100 */
1101int
1102ed_watchdog(unit)
1103 int unit;
1104{
1105 struct ed_softc *sc = &ed_softc[unit];
1106
1107 log(LOG_ERR, "ed%d: device timeout\n", unit);
1108 ++sc->arpcom.ac_if.if_oerrors;
1109
1110 ed_reset(unit);
1111}
1112
1113/*
1114 * Initialize device.
1115 */
1116ed_init(unit)
1117 int unit;
1118{
1119 struct ed_softc *sc = &ed_softc[unit];
1120 struct ifnet *ifp = &sc->arpcom.ac_if;
1121 int i, s;
1122 u_char command;
1123
1124
1125 /* address not known */
1126 if (ifp->if_addrlist == (struct ifaddr *)0) return;
1127
1128 /*
1129 * Initialize the NIC in the exact order outlined in the NS manual.
1130 * This init procedure is "mandatory"...don't change what or when
1131 * things happen.
1132 */
1133 s = splnet();
1134
1135 /* reset transmitter flags */
1136 sc->xmit_busy = 0;
1137 sc->arpcom.ac_if.if_timer = 0;
1138
1139 sc->txb_inuse = 0;
1140 sc->txb_new = 0;
1141 sc->txb_next_tx = 0;
1142
1143 /* This variable is used below - don't move this assignment */
1144 sc->next_packet = sc->rec_page_start + 1;
1145
1146 /*
1147 * Set interface for page 0, Remote DMA complete, Stopped
1148 */
1149 outb(sc->nic_addr + ED_P0_CR, ED_CR_RD2|ED_CR_STP);
1150
1151 if (sc->isa16bit) {
1152 /*
1153 * Set FIFO threshold to 8, No auto-init Remote DMA,
1154 * byte order=80x86, word-wide DMA xfers,
1155 */
1156 outb(sc->nic_addr + ED_P0_DCR, ED_DCR_FT1|ED_DCR_WTS|ED_DCR_LS);
1157 } else {
1158 /*
1159 * Same as above, but byte-wide DMA xfers
1160 */
1161 outb(sc->nic_addr + ED_P0_DCR, ED_DCR_FT1|ED_DCR_LS);
1162 }
1163
1164 /*
1165 * Clear Remote Byte Count Registers
1166 */
1167 outb(sc->nic_addr + ED_P0_RBCR0, 0);
1168 outb(sc->nic_addr + ED_P0_RBCR1, 0);
1169
1170 /*
1171 * Enable reception of broadcast packets
1172 */
1173 outb(sc->nic_addr + ED_P0_RCR, ED_RCR_AB);
1174
1175 /*
1176 * Place NIC in internal loopback mode
1177 */
1178 outb(sc->nic_addr + ED_P0_TCR, ED_TCR_LB0);
1179
1180 /*
1181 * Initialize transmit/receive (ring-buffer) Page Start
1182 */
1183 outb(sc->nic_addr + ED_P0_TPSR, sc->tx_page_start);
1184 outb(sc->nic_addr + ED_P0_PSTART, sc->rec_page_start);
1185
1186 /*
1187 * Initialize Receiver (ring-buffer) Page Stop and Boundry
1188 */
1189 outb(sc->nic_addr + ED_P0_PSTOP, sc->rec_page_stop);
1190 outb(sc->nic_addr + ED_P0_BNRY, sc->rec_page_start);
1191
1192 /*
1193 * Clear all interrupts. A '1' in each bit position clears the
1194 * corresponding flag.
1195 */
1196 outb(sc->nic_addr + ED_P0_ISR, 0xff);
1197
1198 /*
1199 * Enable the following interrupts: receive/transmit complete,
1200 * receive/transmit error, and Receiver OverWrite.
1201 *
1202 * Counter overflow and Remote DMA complete are *not* enabled.
1203 */
1204 outb(sc->nic_addr + ED_P0_IMR,
1205 ED_IMR_PRXE|ED_IMR_PTXE|ED_IMR_RXEE|ED_IMR_TXEE|ED_IMR_OVWE);
1206
1207 /*
1208 * Program Command Register for page 1
1209 */
1210 outb(sc->nic_addr + ED_P0_CR, ED_CR_PAGE_1|ED_CR_RD2|ED_CR_STP);
1211
1212 /*
1213 * Copy out our station address
1214 */
1215 for (i = 0; i < ETHER_ADDR_LEN; ++i)
1216 outb(sc->nic_addr + ED_P1_PAR0 + i, sc->arpcom.ac_enaddr[i]);
1217
1218#if NBPFILTER > 0
1219 /*
1220 * Initialize multicast address hashing registers to accept
1221 * all multicasts (only used when in promiscuous mode)
1222 */
1223 for (i = 0; i < 8; ++i)
1224 outb(sc->nic_addr + ED_P1_MAR0 + i, 0xff);
1225#endif
1226
1227 /*
1228 * Set Current Page pointer to next_packet (initialized above)
1229 */
1230 outb(sc->nic_addr + ED_P1_CURR, sc->next_packet);
1231
1232 /*
1233 * Set Command Register for page 0, Remote DMA complete,
1234 * and interface Start.
1235 */
1236 outb(sc->nic_addr + ED_P1_CR, ED_CR_RD2|ED_CR_STA);
1237
1238 /*
1239 * Take interface out of loopback
1240 */
1241 outb(sc->nic_addr + ED_P0_TCR, 0);
1242
1243 /*
1244 * If this is a 3Com board, the tranceiver must be software enabled
1245 * (there is no settable hardware default).
1246 */
1247 if (sc->vendor == ED_VENDOR_3COM) {
1248 if (ifp->if_flags & IFF_ALTPHYS) {
1249 outb(sc->asic_addr + ED_3COM_CR, 0);
1250 } else {
1251 outb(sc->asic_addr + ED_3COM_CR, ED_3COM_CR_XSEL);
1252 }
1253 }
1254
1255 /*
1256 * Set 'running' flag, and clear output active flag.
1257 */
1258 ifp->if_flags |= IFF_RUNNING;
1259 ifp->if_flags &= ~IFF_OACTIVE;
1260
1261 /*
1262 * ...and attempt to start output
1263 */
1264 ed_start(ifp);
1265
1266 (void) splx(s);
1267}
1268
1269/*
1270 * This routine actually starts the transmission on the interface
1271 */
1272static inline void ed_xmit(ifp)
1273 struct ifnet *ifp;
1274{
1275 struct ed_softc *sc = &ed_softc[ifp->if_unit];
1276 unsigned short len;
1277
1278 len = sc->txb_len[sc->txb_next_tx];
1279
1280 /*
1281 * Set NIC for page 0 register access
1282 */
1283 outb(sc->nic_addr + ED_P0_CR, ED_CR_RD2|ED_CR_STA);
1284
1285 /*
1286 * Set TX buffer start page
1287 */
1288 outb(sc->nic_addr + ED_P0_TPSR, sc->tx_page_start +
1289 sc->txb_next_tx * ED_TXBUF_SIZE);
1290
1291 /*
1292 * Set TX length
1293 */
1294 outb(sc->nic_addr + ED_P0_TBCR0, len);
1295 outb(sc->nic_addr + ED_P0_TBCR1, len >> 8);
1296
1297 /*
1298 * Set page 0, Remote DMA complete, Transmit Packet, and *Start*
1299 */
1300 outb(sc->nic_addr + ED_P0_CR, ED_CR_RD2|ED_CR_TXP|ED_CR_STA);
1301
1302 sc->xmit_busy = 1;
1303
1304 /*
1305 * Point to next transmit buffer slot and wrap if necessary.
1306 */
1307 sc->txb_next_tx++;
1308 if (sc->txb_next_tx == sc->txb_cnt)
1309 sc->txb_next_tx = 0;
1310
1311 /*
1312 * Set a timer just in case we never hear from the board again
1313 */
1314 ifp->if_timer = 2;
1315}
1316
1317/*
1318 * Start output on interface.
1319 * We make two assumptions here:
1320 * 1) that the current priority is set to splnet _before_ this code
1321 * is called *and* is returned to the appropriate priority after
1322 * return
1323 * 2) that the IFF_OACTIVE flag is checked before this code is called
1324 * (i.e. that the output part of the interface is idle)
1325 */
1326int
1327ed_start(ifp)
1328 struct ifnet *ifp;
1329{
1330 struct ed_softc *sc = &ed_softc[ifp->if_unit];
1331 struct mbuf *m0, *m;
1332 caddr_t buffer;
1333 int len;
1334
1335outloop:
1336 /*
1337 * First, see if there are buffered packets and an idle
1338 * transmitter - should never happen at this point.
1339 */
1340 if (sc->txb_inuse && (sc->xmit_busy == 0)) {
1341 printf("ed: packets buffers, but transmitter idle\n");
1342 ed_xmit(ifp);
1343 }
1344
1345 /*
1346 * See if there is room to put another packet in the buffer.
1347 */
1348 if (sc->txb_inuse == sc->txb_cnt) {
1349 /*
1350 * No room. Indicate this to the outside world
1351 * and exit.
1352 */
1353 ifp->if_flags |= IFF_OACTIVE;
1354 return;
1355 }
1356
1357 IF_DEQUEUE(&sc->arpcom.ac_if.if_snd, m);
1358 if (m == 0) {
1359 /*
1360 * We are using the !OACTIVE flag to indicate to the outside
1361 * world that we can accept an additional packet rather than
1362 * that the transmitter is _actually_ active. Indeed, the
1363 * transmitter may be active, but if we haven't filled all
1364 * the buffers with data then we still want to accept more.
1365 */
1366 ifp->if_flags &= ~IFF_OACTIVE;
1367 return;
1368 }
1369
1370 /*
1371 * Copy the mbuf chain into the transmit buffer
1372 */
1373
1374 m0 = m;
1375
1376 /* txb_new points to next open buffer slot */
1377 buffer = sc->mem_start + (sc->txb_new * ED_TXBUF_SIZE * ED_PAGE_SIZE);
1378
1379 if (sc->mem_shared) {
1380 /*
1381 * Special case setup for 16 bit boards...
1382 */
1383 if (sc->isa16bit) {
1384 switch (sc->vendor) {
1385 /*
1386 * For 16bit 3Com boards (which have 16k of memory),
1387 * we have the xmit buffers in a different page
1388 * of memory ('page 0') - so change pages.
1389 */
1390 case ED_VENDOR_3COM:
1391 outb(sc->asic_addr + ED_3COM_GACFR,
1392 ED_3COM_GACFR_RSEL);
1393 break;
1394 /*
1395 * Enable 16bit access to shared memory on WD/SMC boards
1396 * Don't update wd_laar_proto because we want to restore the
1397 * previous state (because an arp reply in the input code
1398 * may cause a call-back to ed_start)
1399 * XXX - the call-back to 'start' is a bug, IMHO.
1400 */
1401 case ED_VENDOR_WD_SMC:
1402 outb(sc->asic_addr + ED_WD_LAAR,
1403 (sc->wd_laar_proto | ED_WD_LAAR_M16EN));
1404 }
1405 }
1406
1407 for (len = 0; m != 0; m = m->m_next) {
1408 bcopy(mtod(m, caddr_t), buffer, m->m_len);
1409 buffer += m->m_len;
1410 len += m->m_len;
1411 }
1412
1413 /*
1414 * Restore previous shared memory access
1415 */
1416 if (sc->isa16bit) {
1417 switch (sc->vendor) {
1418 case ED_VENDOR_3COM:
1419 outb(sc->asic_addr + ED_3COM_GACFR,
1420 ED_3COM_GACFR_RSEL | ED_3COM_GACFR_MBS0);
1421 break;
1422 case ED_VENDOR_WD_SMC:
1423 outb(sc->asic_addr + ED_WD_LAAR, sc->wd_laar_proto);
1424 break;
1425 }
1426 }
1427 } else {
1428 len = ed_pio_write_mbufs(sc, m, buffer);
1429 }
1430
1431 sc->txb_len[sc->txb_new] = MAX(len, ETHER_MIN_LEN);
1432
1433 sc->txb_inuse++;
1434
1435 /*
1436 * Point to next buffer slot and wrap if necessary.
1437 */
1438 sc->txb_new++;
1439 if (sc->txb_new == sc->txb_cnt)
1440 sc->txb_new = 0;
1441
1442 if (sc->xmit_busy == 0)
1443 ed_xmit(ifp);
1444 /*
1445 * If there is BPF support in the configuration, tap off here.
1446 * The following has support for converting trailer packets
1447 * back to normal.
1448 * XXX - support for trailer packets in BPF should be moved into
1449 * the bpf code proper to avoid code duplication in all of
1450 * the drivers.
1451 */
1452#if NBPFILTER > 0
1453 if (sc->bpf) {
1454 u_short etype;
1455 int off, datasize, resid;
1456 struct ether_header *eh;
1457 struct trailer_header trailer_header;
1458 char ether_packet[ETHER_MAX_LEN];
1459 char *ep;
1460
1461 ep = ether_packet;
1462
1463 /*
1464 * We handle trailers below:
1465 * Copy ether header first, then residual data,
1466 * then data. Put all this in a temporary buffer
1467 * 'ether_packet' and send off to bpf. Since the
1468 * system has generated this packet, we assume
1469 * that all of the offsets in the packet are
1470 * correct; if they're not, the system will almost
1471 * certainly crash in m_copydata.
1472 * We make no assumptions about how the data is
1473 * arranged in the mbuf chain (i.e. how much
1474 * data is in each mbuf, if mbuf clusters are
1475 * used, etc.), which is why we use m_copydata
1476 * to get the ether header rather than assume
1477 * that this is located in the first mbuf.
1478 */
1479 /* copy ether header */
1480 m_copydata(m0, 0, sizeof(struct ether_header), ep);
1481 eh = (struct ether_header *) ep;
1482 ep += sizeof(struct ether_header);
1483 etype = ntohs(eh->ether_type);
1484 if (etype >= ETHERTYPE_TRAIL &&
1485 etype < ETHERTYPE_TRAIL+ETHERTYPE_NTRAILER) {
1486 datasize = ((etype - ETHERTYPE_TRAIL) << 9);
1487 off = datasize + sizeof(struct ether_header);
1488
1489 /* copy trailer_header into a data structure */
1490 m_copydata(m0, off, sizeof(struct trailer_header),
1491 &trailer_header.ether_type);
1492
1493 /* copy residual data */
1494 m_copydata(m0, off+sizeof(struct trailer_header),
1495 resid = ntohs(trailer_header.ether_residual) -
1496 sizeof(struct trailer_header), ep);
1497 ep += resid;
1498
1499 /* copy data */
1500 m_copydata(m0, sizeof(struct ether_header),
1501 datasize, ep);
1502 ep += datasize;
1503
1504 /* restore original ether packet type */
1505 eh->ether_type = trailer_header.ether_type;
1506
1507 bpf_tap(sc->bpf, ether_packet, ep - ether_packet);
1508 } else
1509 bpf_mtap(sc->bpf, m0);
1510 }
1511#endif
1512
1513 m_freem(m0);
1514
1515 /*
1516 * Loop back to the top to possibly buffer more packets
1517 */
1518 goto outloop;
1519}
1520
1521/*
1522 * Ethernet interface receiver interrupt.
1523 */
1524static inline void
1525ed_rint(unit)
1526 int unit;
1527{
1528 register struct ed_softc *sc = &ed_softc[unit];
1529 u_char boundry, current;
1530 u_short len;
1531 struct ed_ring packet_hdr;
1532 char *packet_ptr;
1533
1534 /*
1535 * Set NIC to page 1 registers to get 'current' pointer
1536 */
1537 outb(sc->nic_addr + ED_P0_CR, ED_CR_PAGE_1|ED_CR_RD2|ED_CR_STA);
1538
1539 /*
1540 * 'sc->next_packet' is the logical beginning of the ring-buffer - i.e.
1541 * it points to where new data has been buffered. The 'CURR'
1542 * (current) register points to the logical end of the ring-buffer
1543 * - i.e. it points to where additional new data will be added.
1544 * We loop here until the logical beginning equals the logical
1545 * end (or in other words, until the ring-buffer is empty).
1546 */
1547 while (sc->next_packet != inb(sc->nic_addr + ED_P1_CURR)) {
1548
1549 /* get pointer to this buffer's header structure */
1550 packet_ptr = sc->mem_ring +
1551 (sc->next_packet - sc->rec_page_start) * ED_PAGE_SIZE;
1552
1553 /*
1554 * The byte count includes the FCS - Frame Check Sequence (a
1555 * 32 bit CRC).
1556 */
1557 if (sc->mem_shared)
1558 packet_hdr = *(struct ed_ring *)packet_ptr;
1559 else
1560 ed_pio_readmem(sc, packet_ptr, (char *) &packet_hdr,
1561 sizeof(packet_hdr));
1562 len = packet_hdr.count;
1563 if ((len >= ETHER_MIN_LEN) && (len <= ETHER_MAX_LEN)) {
1564 /*
1565 * Go get packet. len - 4 removes CRC from length.
1566 */
1567 ed_get_packet(sc, packet_ptr + 4, len - 4);
1568 ++sc->arpcom.ac_if.if_ipackets;
1569 } else {
1570 /*
1571 * Really BAD...probably indicates that the ring pointers
1572 * are corrupted. Also seen on early rev chips under
1573 * high load - the byte order of the length gets switched.
1574 */
1575 log(LOG_ERR,
1576 "ed%d: NIC memory corrupt - invalid packet length %d\n",
1577 unit, len);
1578 ++sc->arpcom.ac_if.if_ierrors;
1579 ed_reset(unit);
1580 return;
1581 }
1582
1583 /*
1584 * Update next packet pointer
1585 */
1586 sc->next_packet = packet_hdr.next_packet;
1587
1588 /*
1589 * Update NIC boundry pointer - being careful to keep it
1590 * one buffer behind. (as recommended by NS databook)
1591 */
1592 boundry = sc->next_packet - 1;
1593 if (boundry < sc->rec_page_start)
1594 boundry = sc->rec_page_stop - 1;
1595
1596 /*
1597 * Set NIC to page 0 registers to update boundry register
1598 */
1599 outb(sc->nic_addr + ED_P0_CR, ED_CR_RD2|ED_CR_STA);
1600
1601 outb(sc->nic_addr + ED_P0_BNRY, boundry);
1602
1603 /*
1604 * Set NIC to page 1 registers before looping to top (prepare to
1605 * get 'CURR' current pointer)
1606 */
1607 outb(sc->nic_addr + ED_P0_CR, ED_CR_PAGE_1|ED_CR_RD2|ED_CR_STA);
1608 }
1609}
1610
1611/*
1612 * Ethernet interface interrupt processor
1613 */
1614int
1615edintr(unit)
1616 int unit;
1617{
1618 struct ed_softc *sc = &ed_softc[unit];
1619 u_char isr;
1620
1621 /*
1622 * Set NIC to page 0 registers
1623 */
1624 outb(sc->nic_addr + ED_P0_CR, ED_CR_RD2|ED_CR_STA);
1625
1626 /*
1627 * loop until there are no more new interrupts
1628 */
1629 while (isr = inb(sc->nic_addr + ED_P0_ISR)) {
1630
1631 /*
1632 * reset all the bits that we are 'acknowledging'
1633 * by writing a '1' to each bit position that was set
1634 * (writing a '1' *clears* the bit)
1635 */
1636 outb(sc->nic_addr + ED_P0_ISR, isr);
1637
1638 /*
1639 * Handle transmitter interrupts. Handle these first
1640 * because the receiver will reset the board under
1641 * some conditions.
1642 */
1643 if (isr & (ED_ISR_PTX|ED_ISR_TXE)) {
1644 u_char collisions = inb(sc->nic_addr + ED_P0_NCR);
1645
1646 /*
1647 * Check for transmit error. If a TX completed with an
1648 * error, we end up throwing the packet away. Really
1649 * the only error that is possible is excessive
1650 * collisions, and in this case it is best to allow the
1651 * automatic mechanisms of TCP to backoff the flow. Of
1652 * course, with UDP we're screwed, but this is expected
1653 * when a network is heavily loaded.
1654 */
1655 if (isr & ED_ISR_TXE) {
1656
1657 /*
1658 * Excessive collisions (16)
1659 */
1660 if ((inb(sc->nic_addr + ED_P0_TSR) & ED_TSR_ABT)
1661 && (collisions == 0)) {
1662 /*
1663 * When collisions total 16, the
1664 * P0_NCR will indicate 0, and the
1665 * TSR_ABT is set.
1666 */
1667 collisions = 16;
1668 }
1669
1670 /*
1671 * update output errors counter
1672 */
1673 ++sc->arpcom.ac_if.if_oerrors;
1674 } else {
1675 /*
1676 * Update total number of successfully
1677 * transmitted packets.
1678 */
1679 ++sc->arpcom.ac_if.if_opackets;
1680 }
1681
1682 /*
1683 * reset tx busy and output active flags
1684 */
1685 sc->xmit_busy = 0;
1686 sc->arpcom.ac_if.if_flags &= ~IFF_OACTIVE;
1687
1688 /*
1689 * clear watchdog timer
1690 */
1691 sc->arpcom.ac_if.if_timer = 0;
1692
1693 /*
1694 * Add in total number of collisions on last
1695 * transmission.
1696 */
1697 sc->arpcom.ac_if.if_collisions += collisions;
1698
1699 /*
1700 * Decrement buffer in-use count if not zero (can only
1701 * be zero if a transmitter interrupt occured while
1702 * not actually transmitting).
1703 * If data is ready to transmit, start it transmitting,
1704 * otherwise defer until after handling receiver
1705 */
1706 if (sc->txb_inuse && --sc->txb_inuse)
1707 ed_xmit(&sc->arpcom.ac_if);
1708 }
1709
1710 /*
1711 * Handle receiver interrupts
1712 */
1713 if (isr & (ED_ISR_PRX|ED_ISR_RXE|ED_ISR_OVW)) {
1714 /*
1715 * Overwrite warning. In order to make sure that a lockup
1716 * of the local DMA hasn't occurred, we reset and
1717 * re-init the NIC. The NSC manual suggests only a
1718 * partial reset/re-init is necessary - but some
1719 * chips seem to want more. The DMA lockup has been
1720 * seen only with early rev chips - Methinks this
1721 * bug was fixed in later revs. -DG
1722 */
1723 if (isr & ED_ISR_OVW) {
1724 ++sc->arpcom.ac_if.if_ierrors;
1725#ifdef DIAGNOSTIC
1726 log(LOG_WARNING,
1727 "ed%d: warning - receiver ring buffer overrun\n",
1728 unit);
1729#endif
1730 /*
1731 * Stop/reset/re-init NIC
1732 */
1733 ed_reset(unit);
1734 } else {
1735
1736 /*
1737 * Receiver Error. One or more of: CRC error, frame
1738 * alignment error FIFO overrun, or missed packet.
1739 */
1740 if (isr & ED_ISR_RXE) {
1741 ++sc->arpcom.ac_if.if_ierrors;
1742#ifdef ED_DEBUG
1743 printf("ed%d: receive error %x\n", unit,
1744 inb(sc->nic_addr + ED_P0_RSR));
1745#endif
1746 }
1747
1748 /*
1749 * Go get the packet(s)
1750 * XXX - Doing this on an error is dubious
1751 * because there shouldn't be any data to
1752 * get (we've configured the interface to
1753 * not accept packets with errors).
1754 */
1755
1756 /*
1757 * Enable 16bit access to shared memory first
1758 * on WD/SMC boards.
1759 */
1760 if (sc->isa16bit &&
1761 (sc->vendor == ED_VENDOR_WD_SMC)) {
1762
1763 outb(sc->asic_addr + ED_WD_LAAR,
1764 (sc->wd_laar_proto |=
1765 ED_WD_LAAR_M16EN));
1766 }
1767
1768 ed_rint (unit);
1769
1770 /* disable 16bit access */
1771 if (sc->isa16bit &&
1772 (sc->vendor == ED_VENDOR_WD_SMC)) {
1773
1774 outb(sc->asic_addr + ED_WD_LAAR,
1775 (sc->wd_laar_proto &=
1776 ~ED_WD_LAAR_M16EN));
1777 }
1778 }
1779 }
1780
1781 /*
1782 * If it looks like the transmitter can take more data,
1783 * attempt to start output on the interface.
1784 * This is done after handling the receiver to
1785 * give the receiver priority.
1786 */
1787 if ((sc->arpcom.ac_if.if_flags & IFF_OACTIVE) == 0)
1788 ed_start(&sc->arpcom.ac_if);
1789
1790 /*
1791 * return NIC CR to standard state: page 0, remote DMA complete,
1792 * start (toggling the TXP bit off, even if was just set
1793 * in the transmit routine, is *okay* - it is 'edge'
1794 * triggered from low to high)
1795 */
1796 outb(sc->nic_addr + ED_P0_CR, ED_CR_RD2|ED_CR_STA);
1797
1798 /*
1799 * If the Network Talley Counters overflow, read them to
1800 * reset them. It appears that old 8390's won't
1801 * clear the ISR flag otherwise - resulting in an
1802 * infinite loop.
1803 */
1804 if (isr & ED_ISR_CNT) {
1805 (void) inb(sc->nic_addr + ED_P0_CNTR0);
1806 (void) inb(sc->nic_addr + ED_P0_CNTR1);
1807 (void) inb(sc->nic_addr + ED_P0_CNTR2);
1808 }
1809 }
1810}
1811
1812/*
1813 * Process an ioctl request. This code needs some work - it looks
1814 * pretty ugly.
1815 */
1816int
1817ed_ioctl(ifp, command, data)
1818 register struct ifnet *ifp;
1819 int command;
1820 caddr_t data;
1821{
1822 register struct ifaddr *ifa = (struct ifaddr *)data;
1823 struct ed_softc *sc = &ed_softc[ifp->if_unit];
1824 struct ifreq *ifr = (struct ifreq *)data;
1825 int s, error = 0;
1826
1827 s = splnet();
1828
1829 switch (command) {
1830
1831 case SIOCSIFADDR:
1832 ifp->if_flags |= IFF_UP;
1833
1834 switch (ifa->ifa_addr->sa_family) {
1835#ifdef INET
1836 case AF_INET:
1837 ed_init(ifp->if_unit); /* before arpwhohas */
1838 /*
1839 * See if another station has *our* IP address.
1840 * i.e.: There is an address conflict! If a
1841 * conflict exists, a message is sent to the
1842 * console.
1843 */
1844 ((struct arpcom *)ifp)->ac_ipaddr =
1845 IA_SIN(ifa)->sin_addr;
1846 arpwhohas((struct arpcom *)ifp, &IA_SIN(ifa)->sin_addr);
1847 break;
1848#endif
1849#ifdef NS
1850 /*
1851 * XXX - This code is probably wrong
1852 */
1853 case AF_NS:
1854 {
1855 register struct ns_addr *ina = &(IA_SNS(ifa)->sns_addr);
1856
1857 if (ns_nullhost(*ina))
1858 ina->x_host =
1859 *(union ns_host *)(sc->arpcom.ac_enaddr);
1860 else {
1861 /*
1862 *
1863 */
1864 bcopy((caddr_t)ina->x_host.c_host,
1865 (caddr_t)sc->arpcom.ac_enaddr,
1866 sizeof(sc->arpcom.ac_enaddr));
1867 }
1868 /*
1869 * Set new address
1870 */
1871 ed_init(ifp->if_unit);
1872 break;
1873 }
1874#endif
1875 default:
1876 ed_init(ifp->if_unit);
1877 break;
1878 }
1879 break;
1880
1881 case SIOCSIFFLAGS:
1882 /*
1883 * If interface is marked down and it is running, then stop it
1884 */
1885 if (((ifp->if_flags & IFF_UP) == 0) &&
1886 (ifp->if_flags & IFF_RUNNING)) {
1887 ed_stop(ifp->if_unit);
1888 ifp->if_flags &= ~IFF_RUNNING;
1889 } else {
1890 /*
1891 * If interface is marked up and it is stopped, then start it
1892 */
1893 if ((ifp->if_flags & IFF_UP) &&
1894 ((ifp->if_flags & IFF_RUNNING) == 0))
1895 ed_init(ifp->if_unit);
1896 }
1897#if NBPFILTER > 0
1898 if (ifp->if_flags & IFF_PROMISC) {
1899 /*
1900 * Set promiscuous mode on interface.
1901 * XXX - for multicasts to work, we would need to
1902 * write 1's in all bits of multicast
1903 * hashing array. For now we assume that
1904 * this was done in ed_init().
1905 */
1906 outb(sc->nic_addr + ED_P0_RCR,
1907 ED_RCR_PRO|ED_RCR_AM|ED_RCR_AB);
1908 } else {
1909 /*
1910 * XXX - for multicasts to work, we would need to
1911 * rewrite the multicast hashing array with the
1912 * proper hash (would have been destroyed above).
1913 */
1914 outb(sc->nic_addr + ED_P0_RCR, ED_RCR_AB);
1915 }
1916#endif
1917 /*
1918 * An unfortunate hack to provide the (required) software control
1919 * of the tranceiver for 3Com boards. The ALTPHYS flag disables
1920 * the tranceiver if set.
1921 */
1922 if (sc->vendor == ED_VENDOR_3COM) {
1923 if (ifp->if_flags & IFF_ALTPHYS) {
1924 outb(sc->asic_addr + ED_3COM_CR, 0);
1925 } else {
1926 outb(sc->asic_addr + ED_3COM_CR, ED_3COM_CR_XSEL);
1927 }
1928 }
1929
1930 break;
1931
1932 default:
1933 error = EINVAL;
1934 }
1935 (void) splx(s);
1936 return (error);
1937}
1938
1939/*
1940 * Macro to calculate a new address within shared memory when given an offset
1941 * from an address, taking into account ring-wrap.
1942 */
1943#define ringoffset(sc, start, off, type) \
1944 ((type)( ((caddr_t)(start)+(off) >= (sc)->mem_end) ? \
1945 (((caddr_t)(start)+(off))) - (sc)->mem_end \
1946 + (sc)->mem_ring: \
1947 ((caddr_t)(start)+(off)) ))
1948
1949/*
1950 * Retreive packet from shared memory and send to the next level up via
1951 * ether_input(). If there is a BPF listener, give a copy to BPF, too.
1952 */
1953ed_get_packet(sc, buf, len)
1954 struct ed_softc *sc;
1955 char *buf;
1956 u_short len;
1957{
1958 struct ether_header *eh;
1959 struct mbuf *m, *head, *ed_ring_to_mbuf();
1960 u_short off;
1961 int resid;
1962 u_short etype;
1963 struct trailer_header trailer_header;
1964
1965 /* Allocate a header mbuf */
1966 MGETHDR(m, M_DONTWAIT, MT_DATA);
1967 if (m == 0)
1968 goto bad;
1969 m->m_pkthdr.rcvif = &sc->arpcom.ac_if;
1970 m->m_pkthdr.len = len;
1971 m->m_len = 0;
1972 head = m;
1973
1974 /* The following sillines is to make NFS happy */
1975#define EROUND ((sizeof(struct ether_header) + 3) & ~3)
1976#define EOFF (EROUND - sizeof(struct ether_header))
1977
1978 /*
1979 * The following assumes there is room for
1980 * the ether header in the header mbuf
1981 */
1982 head->m_data += EOFF;
1983 eh = mtod(head, struct ether_header *);
1984
1985 if (sc->mem_shared)
1986 bcopy(buf, mtod(head, caddr_t), sizeof(struct ether_header));
1987 else
1988 ed_pio_readmem(sc, buf, mtod(head, caddr_t),
1989 sizeof(struct ether_header));
1990 buf += sizeof(struct ether_header);
1991 head->m_len += sizeof(struct ether_header);
1992 len -= sizeof(struct ether_header);
1993
1994 etype = ntohs((u_short)eh->ether_type);
1995
1996 /*
1997 * Deal with trailer protocol:
1998 * If trailer protocol, calculate the datasize as 'off',
1999 * which is also the offset to the trailer header.
2000 * Set resid to the amount of packet data following the
2001 * trailer header.
2002 * Finally, copy residual data into mbuf chain.
2003 */
2004 if (etype >= ETHERTYPE_TRAIL &&
2005 etype < ETHERTYPE_TRAIL+ETHERTYPE_NTRAILER) {
2006
2007 off = (etype - ETHERTYPE_TRAIL) << 9;
2008 if ((off + sizeof(struct trailer_header)) > len)
2009 goto bad; /* insanity */
2010
2011 /*
2012 * If we have shared memory, we can get info directly from the
2013 * stored packet, otherwise we must get a local copy
2014 * of the trailer header using PIO.
2015 */
2016 if (sc->mem_shared) {
2017 eh->ether_type = *ringoffset(sc, buf, off, u_short *);
2018 resid = ntohs(*ringoffset(sc, buf, off+2, u_short *));
2019 } else {
2020 struct trailer_header trailer_header;
2021 ed_pio_readmem(sc,
2022 ringoffset(sc, buf, off, caddr_t),
2023 (char *) &trailer_header,
2024 sizeof(trailer_header));
2025 eh->ether_type = trailer_header.ether_type;
2026 resid = trailer_header.ether_residual;
2027 }
2028
2029 if ((off + resid) > len) goto bad; /* insanity */
2030
2031 resid -= sizeof(struct trailer_header);
2032 if (resid < 0) goto bad; /* insanity */
2033
2034 m = ed_ring_to_mbuf(sc, ringoffset(sc, buf, off+4, char *), head, resid);
2035 if (m == 0) goto bad;
2036
2037 len = off;
2038 head->m_pkthdr.len -= 4; /* subtract trailer header */
2039 }
2040
2041 /*
2042 * Pull packet off interface. Or if this was a trailer packet,
2043 * the data portion is appended.
2044 */
2045 m = ed_ring_to_mbuf(sc, buf, m, len);
2046 if (m == 0) goto bad;
2047
2048#if NBPFILTER > 0
2049 /*
2050 * Check if there's a BPF listener on this interface.
2051 * If so, hand off the raw packet to bpf.
2052 */
2053 if (sc->bpf) {
2054 bpf_mtap(sc->bpf, head);
2055
2056 /*
2057 * Note that the interface cannot be in promiscuous mode if
2058 * there are no BPF listeners. And if we are in promiscuous
2059 * mode, we have to check if this packet is really ours.
2060 *
2061 * XXX This test does not support multicasts.
2062 */
2063 if ((sc->arpcom.ac_if.if_flags & IFF_PROMISC) &&
2064 bcmp(eh->ether_dhost, sc->arpcom.ac_enaddr,
2065 sizeof(eh->ether_dhost)) != 0 &&
2066 bcmp(eh->ether_dhost, etherbroadcastaddr,
2067 sizeof(eh->ether_dhost)) != 0) {
2068
2069 m_freem(head);
2070 return;
2071 }
2072 }
2073#endif
2074
2075 /*
2076 * Fix up data start offset in mbuf to point past ether header
2077 */
2078 m_adj(head, sizeof(struct ether_header));
2079
2080 /*
2081 * silly ether_input routine needs 'type' in host byte order
2082 */
2083 eh->ether_type = ntohs(eh->ether_type);
2084
2085 ether_input(&sc->arpcom.ac_if, eh, head);
2086 return;
2087
2088bad: if (head)
2089 m_freem(head);
2090 return;
2091}
2092
2093/*
2094 * Supporting routines
2095 */
2096
2097/*
2098 * Given a NIC memory source address and a host memory destination
2099 * address, copy 'amount' from NIC to host using Programmed I/O.
2100 * The 'amount' is rounded up to a word - okay as long as mbufs
2101 * are word sized.
2102 * This routine is currently Novell-specific.
2103 */
2104void
2105ed_pio_readmem(sc,src,dst,amount)
2106 struct ed_softc *sc;
2107 unsigned short src;
2108 unsigned char *dst;
2109 unsigned short amount;
2110{
2111 unsigned short tmp_amount;
2112
2113 /* select page 0 registers */
2114 outb(sc->nic_addr + ED_P0_CR, ED_CR_RD2|ED_CR_STA);
2115
2116 /* round up to a word */
2117 tmp_amount = amount;
2118 if (amount & 1) ++amount;
2119
2120 /* set up DMA byte count */
2121 outb(sc->nic_addr + ED_P0_RBCR0, amount);
2122 outb(sc->nic_addr + ED_P0_RBCR1, amount>>8);
2123
2124 /* set up source address in NIC mem */
2125 outb(sc->nic_addr + ED_P0_RSAR0, src);
2126 outb(sc->nic_addr + ED_P0_RSAR1, src>>8);
2127
2128 outb(sc->nic_addr + ED_P0_CR, ED_CR_RD0 | ED_CR_STA);
2129
2130 if (sc->isa16bit) {
2131 insw(sc->asic_addr + ED_NOVELL_DATA, dst, amount/2);
2132 } else
2133 insb(sc->asic_addr + ED_NOVELL_DATA, dst, amount);
2134
2135}
2136
2137/*
2138 * Stripped down routine for writing a linear buffer to NIC memory.
2139 * Only used in the probe routine to test the memory. 'len' must
2140 * be even.
2141 */
2142void
2143ed_pio_writemem(sc,src,dst,len)
2144 struct ed_softc *sc;
2145 char *src;
2146 unsigned short dst;
2147 unsigned short len;
2148{
2149 int maxwait=100; /* about 120us */
2150
2151 /* select page 0 registers */
2152 outb(sc->nic_addr + ED_P0_CR, ED_CR_RD2|ED_CR_STA);
2153
2154 /* reset remote DMA complete flag */
2155 outb(sc->nic_addr + ED_P0_ISR, ED_ISR_RDC);
2156
2157 /* set up DMA byte count */
2158 outb(sc->nic_addr + ED_P0_RBCR0, len);
2159 outb(sc->nic_addr + ED_P0_RBCR1, len>>8);
2160
2161 /* set up destination address in NIC mem */
2162 outb(sc->nic_addr + ED_P0_RSAR0, dst);
2163 outb(sc->nic_addr + ED_P0_RSAR1, dst>>8);
2164
2165 /* set remote DMA write */
2166 outb(sc->nic_addr + ED_P0_CR, ED_CR_RD1 | ED_CR_STA);
2167
2168 if (sc->isa16bit)
2169 outsw(sc->asic_addr + ED_NOVELL_DATA, src, len/2);
2170 else
2171 outsb(sc->asic_addr + ED_NOVELL_DATA, src, len);
2172 /*
2173 * Wait for remote DMA complete. This is necessary because on the
2174 * transmit side, data is handled internally by the NIC in bursts
2175 * and we can't start another remote DMA until this one completes.
2176 * Not waiting causes really bad things to happen - like the NIC
2177 * irrecoverably jamming the ISA bus.
2178 */
2179 while (((inb(sc->nic_addr + ED_P0_ISR) & ED_ISR_RDC) != ED_ISR_RDC) && --maxwait);
2180}
2181
2182/*
2183 * Write an mbuf chain to the destination NIC memory address using
2184 * programmed I/O.
2185 */
2186u_short
2187ed_pio_write_mbufs(sc,m,dst)
2188 struct ed_softc *sc;
2189 struct mbuf *m;
2190 unsigned short dst;
2191{
2192 unsigned short len, mb_offset;
2193 struct mbuf *mp;
2194 unsigned char residual[2];
2195 int maxwait=100; /* about 120us */
2196
2197 /* First, count up the total number of bytes to copy */
2198 for (len = 0, mp = m; mp; mp = mp->m_next)
2199 len += mp->m_len;
2200
2201 /* select page 0 registers */
2202 outb(sc->nic_addr + ED_P0_CR, ED_CR_RD2|ED_CR_STA);
2203
2204 /* reset remote DMA complete flag */
2205 outb(sc->nic_addr + ED_P0_ISR, ED_ISR_RDC);
2206
2207 /* set up DMA byte count */
2208 outb(sc->nic_addr + ED_P0_RBCR0, len);
2209 outb(sc->nic_addr + ED_P0_RBCR1, len>>8);
2210
2211 /* set up destination address in NIC mem */
2212 outb(sc->nic_addr + ED_P0_RSAR0, dst);
2213 outb(sc->nic_addr + ED_P0_RSAR1, dst>>8);
2214
2215 /* set remote DMA write */
2216 outb(sc->nic_addr + ED_P0_CR, ED_CR_RD1 | ED_CR_STA);
2217
2218 mb_offset = 0;
2219 /*
2220 * Transfer the mbuf chain to the NIC memory.
2221 * The following code isn't too pretty. The problem is that we can only
2222 * transfer words to the board, and if an mbuf has an odd number
2223 * of bytes in it, this is a problem. It's not a simple matter of
2224 * just removing a byte from the next mbuf (adjusting data++ and
2225 * len--) because this will hose-over the mbuf chain which might
2226 * be needed later for BPF. Instead, we maintain an offset
2227 * (mb_offset) which let's us skip over the first byte in the
2228 * following mbuf.
2229 */
2230 while (m) {
2231 if (m->m_len - mb_offset) {
2232 if (sc->isa16bit) {
2233 if ((m->m_len - mb_offset) > 1)
2234 outsw(sc->asic_addr + ED_NOVELL_DATA,
2235 mtod(m, caddr_t) + mb_offset,
2236 (m->m_len - mb_offset) / 2);
2237
2238 /*
2239 * if odd number of bytes, get the odd byte from
2240 * the next mbuf with data
2241 */
2242 if ((m->m_len - mb_offset) & 1) {
2243 /* first the last byte in current mbuf */
2244 residual[0] = *(mtod(m, caddr_t)
2245 + m->m_len - 1);
2246
2247 /* advance past any empty mbufs */
2248 while (m->m_next && (m->m_next->m_len == 0))
2249 m = m->m_next;
2250
2251 if (m->m_next) {
2252 /* remove first byte in next mbuf */
2253 residual[1] = *(mtod(m->m_next, caddr_t));
2254 mb_offset = 1;
2255 }
2256
2257 outw(sc->asic_addr + ED_NOVELL_DATA,
2258 *((unsigned short *) residual));
2259 } else
2260 mb_offset = 0;
2261 } else
2262 outsb(sc->asic_addr + ED_NOVELL_DATA, m->m_data, m->m_len);
2263
2264 }
2265 m = m->m_next;
2266 }
2267
2268 /*
2269 * Wait for remote DMA complete. This is necessary because on the
2270 * transmit side, data is handled internally by the NIC in bursts
2271 * and we can't start another remote DMA until this one completes.
2272 * Not waiting causes really bad things to happen - like the NIC
2273 * irrecoverably jamming the ISA bus.
2274 */
2275 while (((inb(sc->nic_addr + ED_P0_ISR) & ED_ISR_RDC) != ED_ISR_RDC) && --maxwait);
2276
2277 if (!maxwait) {
2278 log(LOG_WARNING, "ed%d: remote transmit DMA failed to complete\n",
2279 sc->arpcom.ac_if.if_unit);
2280 ed_reset(sc->arpcom.ac_if.if_unit);
2281 }
2282
2283 return(len);
2284}
2285
2286/*
2287 * Given a source and destination address, copy 'amount' of a packet from
2288 * the ring buffer into a linear destination buffer. Takes into account
2289 * ring-wrap.
2290 */
2291static inline char *
2292ed_ring_copy(sc,src,dst,amount)
2293 struct ed_softc *sc;
2294 char *src;
2295 char *dst;
2296 u_short amount;
2297{
2298 u_short tmp_amount;
2299
2300 /* does copy wrap to lower addr in ring buffer? */
2301 if (src + amount > sc->mem_end) {
2302 tmp_amount = sc->mem_end - src;
2303
2304 /* copy amount up to end of NIC memory */
2305 if (sc->mem_shared)
2306 bcopy(src,dst,tmp_amount);
2307 else
2308 ed_pio_readmem(sc,src,dst,tmp_amount);
2309
2310 amount -= tmp_amount;
2311 src = sc->mem_ring;
2312 dst += tmp_amount;
2313 }
2314
2315 if (sc->mem_shared)
2316 bcopy(src, dst, amount);
2317 else
2318 ed_pio_readmem(sc, src, dst, amount);
2319
2320 return(src + amount);
2321}
2322
2323/*
2324 * Copy data from receive buffer to end of mbuf chain
2325 * allocate additional mbufs as needed. return pointer
2326 * to last mbuf in chain.
2327 * sc = ed info (softc)
2328 * src = pointer in ed ring buffer
2329 * dst = pointer to last mbuf in mbuf chain to copy to
2330 * amount = amount of data to copy
2331 */
2332struct mbuf *
2333ed_ring_to_mbuf(sc,src,dst,total_len)
2334 struct ed_softc *sc;
2335 char *src;
2336 struct mbuf *dst;
2337 u_short total_len;
2338{
2339 register struct mbuf *m = dst;
2340
2341 while (total_len) {
2342 register u_short amount = min(total_len, M_TRAILINGSPACE(m));
2343
2344 if (amount == 0) { /* no more data in this mbuf, alloc another */
2345 /*
2346 * If there is enough data for an mbuf cluster, attempt
2347 * to allocate one of those, otherwise, a regular
2348 * mbuf will do.
2349 * Note that a regular mbuf is always required, even if
2350 * we get a cluster - getting a cluster does not
2351 * allocate any mbufs, and one is needed to assign
2352 * the cluster to. The mbuf that has a cluster
2353 * extension can not be used to contain data - only
2354 * the cluster can contain data.
2355 */
2356 dst = m;
2357 MGET(m, M_DONTWAIT, MT_DATA);
2358 if (m == 0)
2359 return (0);
2360
2361 if (total_len >= MINCLSIZE)
2362 MCLGET(m, M_DONTWAIT);
2363
2364 m->m_len = 0;
2365 dst->m_next = m;
2366 amount = min(total_len, M_TRAILINGSPACE(m));
2367 }
2368
2369 src = ed_ring_copy(sc, src, mtod(m, caddr_t) + m->m_len, amount);
2370
2371 m->m_len += amount;
2372 total_len -= amount;
2373
2374 }
2375 return (m);
2376}
2377#endif