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1/*-
2 * Copyright (c) 2011 Chelsio Communications, Inc.
3 * All rights reserved.
4 * Written by: Navdeep Parhar <np@FreeBSD.org>
5 *
6 * Redistribution and use in source and binary forms, with or without
7 * modification, are permitted provided that the following conditions
8 * are met:

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21 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
22 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
23 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
24 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
25 * SUCH DAMAGE.
26 */
27
28#include <sys/cdefs.h>
29__FBSDID("$FreeBSD: head/sys/dev/cxgbe/t4_sge.c 220643 2011-04-14 20:06:23Z np $");
30
31#include "opt_inet.h"
32
33#include <sys/types.h>
34#include <sys/mbuf.h>
35#include <sys/socket.h>
36#include <sys/kernel.h>
37#include <sys/malloc.h>

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274 if (rc != 0) {
275 device_printf(sc->dev,
276 "failed to create fwd intr queue %d: %d\n",
277 i, rc);
278 return (rc);
279 }
280 }
281
282 handler = t4_intr_evt;
283 i = 0; /* forward fwq's interrupt to the first fiq */
284 } else {
285 handler = NULL;
286 i = 1; /* fwq should use vector 1 (0 is used by error) */
287 }
288
289 snprintf(name, sizeof(name), "%s fwq", device_get_nameunit(sc->dev));
290 init_iq(fwq, sc, 0, 0, FW_IQ_QSIZE, FW_IQ_ESIZE, handler, name);

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340 }
341
342 for_each_rxq(pi, i, rxq) {
343
344 snprintf(name, sizeof(name), "%s rxq%d-iq",
345 device_get_nameunit(pi->dev), i);
346 init_iq(&rxq->iq, sc, pi->tmr_idx, pi->pktc_idx,
347 pi->qsize_rxq, RX_IQ_ESIZE,
348 sc->flags & INTR_FWD ? t4_intr_data: NULL, name);
349
350 snprintf(name, sizeof(name), "%s rxq%d-fl",
351 device_get_nameunit(pi->dev), i);
352 init_fl(&rxq->fl, pi->qsize_rxq / 8, name);
353
354 if (sc->flags & INTR_FWD)
355 intr_idx = (pi->first_rxq + i) % NFIQ(sc);
356 else

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423t4_intr_fwd(void *arg)
424{
425 struct sge_iq *iq = arg, *q;
426 struct adapter *sc = iq->adapter;
427 struct rsp_ctrl *ctrl;
428 int ndesc_pending = 0, ndesc_total = 0;
429 int qid;
430
431 while (is_new_response(iq, &ctrl)) {
432
433 rmb();
434
435 /* Only interrupt muxing expected on this queue */
436 KASSERT(G_RSPD_TYPE(ctrl->u.type_gen) == X_RSPD_TYPE_INTR,
437 ("unexpected event on forwarded interrupt queue: %x",
438 G_RSPD_TYPE(ctrl->u.type_gen)));

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455 iq_next(iq);
456 }
457
458 if (ndesc_total > 0) {
459 t4_write_reg(sc, MYPF_REG(A_SGE_PF_GTS),
460 V_CIDXINC(ndesc_pending) | V_INGRESSQID((u32)iq->cntxt_id) |
461 V_SEINTARM(iq->intr_params));
462 }
463}
464
465/* Deals with error interrupts */
466void
467t4_intr_err(void *arg)
468{
469 struct adapter *sc = arg;
470
471 if (sc->intr_type == INTR_INTX)
472 t4_write_reg(sc, MYPF_REG(A_PCIE_PF_CLI), 0);
473
474 t4_slow_intr_handler(sc);
475}
476
477/* Deals with the firmware event queue */
478void
479t4_intr_evt(void *arg)
480{
481 struct sge_iq *iq = arg;
482 struct adapter *sc = iq->adapter;
483 struct rsp_ctrl *ctrl;
484 const struct rss_header *rss;
485 int ndesc_pending = 0, ndesc_total = 0;
486
487 KASSERT(iq == &sc->sge.fwq, ("%s: unexpected ingress queue", __func__));
488
489 while (is_new_response(iq, &ctrl)) {

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532 if (ndesc_total > 0) {
533 t4_write_reg(sc, MYPF_REG(A_SGE_PF_GTS),
534 V_CIDXINC(ndesc_pending) | V_INGRESSQID(iq->cntxt_id) |
535 V_SEINTARM(iq->intr_params));
536 }
537}
538
539void
540t4_intr_data(void *arg)
541{
542 struct sge_rxq *rxq = arg;
543 struct sge_iq *iq = arg;
544 struct adapter *sc = iq->adapter;
545 struct rsp_ctrl *ctrl;
546 struct ifnet *ifp = rxq->ifp;
547 struct sge_fl *fl = &rxq->fl;
548 struct fl_sdesc *sd = &fl->sdesc[fl->cidx], *sd_next;

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1012 struct fw_iq_cmd c;
1013 struct adapter *sc = iq->adapter;
1014 __be32 v = 0;
1015
1016 /* The adapter queues are nominally allocated in port[0]'s name */
1017 if (pi == NULL)
1018 pi = sc->port[0];
1019
1020 mtx_init(&iq->iq_lock, iq->lockname, NULL, MTX_DEF);
1021
1022 len = iq->qsize * iq->esize;
1023 rc = alloc_ring(sc, len, &iq->desc_tag, &iq->desc_map, &iq->ba,
1024 (void **)&iq->desc);
1025 if (rc != 0)
1026 return (rc);
1027
1028 bzero(&c, sizeof(c));
1029 c.op_to_vfn = htobe32(V_FW_CMD_OP(FW_IQ_CMD) | F_FW_CMD_REQUEST |

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1143 FL_LOCK(fl);
1144 refill_fl(fl, -1);
1145 if (fl->pending >= 8)
1146 ring_fl_db(sc, fl);
1147 FL_UNLOCK(fl);
1148 }
1149
1150 /* Enable IQ interrupts */
1151 t4_write_reg(sc, MYPF_REG(A_SGE_PF_GTS), V_SEINTARM(iq->intr_params) |
1152 V_INGRESSQID(iq->cntxt_id));
1153
1154 return (0);
1155}
1156
1157/*
1158 * This can be called with the iq/fl in any state - fully allocated and

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1174 rc = -t4_iq_start_stop(sc, sc->mbox, 0, sc->pf, 0,
1175 iq->cntxt_id, fl ? fl->cntxt_id : 0xffff, 0xffff);
1176 if (rc != 0) {
1177 device_printf(dev,
1178 "failed to stop queue %p: %d\n", iq, rc);
1179 return (rc);
1180 }
1181 iq->flags &= ~IQ_STARTED;
1182 }
1183
1184 if (iq->flags & IQ_ALLOCATED) {
1185
1186 rc = -t4_iq_free(sc, sc->mbox, sc->pf, 0,
1187 FW_IQ_TYPE_FL_INT_CAP, iq->cntxt_id,
1188 fl ? fl->cntxt_id : 0xffff, 0xffff);
1189 if (rc != 0) {
1190 device_printf(dev,
1191 "failed to free queue %p: %d\n", iq, rc);
1192 return (rc);
1193 }
1194 iq->flags &= ~IQ_ALLOCATED;
1195 }
1196
1197 free_ring(sc, iq->desc_tag, iq->desc_map, iq->ba, iq->desc);
1198
1199 if (mtx_initialized(&iq->iq_lock))
1200 mtx_destroy(&iq->iq_lock);
1201
1202 bzero(iq, sizeof(*iq));
1203
1204 if (fl) {
1205 free_ring(sc, fl->desc_tag, fl->desc_map, fl->ba,
1206 fl->desc);
1207
1208 if (fl->sdesc) {
1209 FL_LOCK(fl);

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1420static int
1421free_txq(struct port_info *pi, struct sge_txq *txq)
1422{
1423 int rc;
1424 struct adapter *sc = pi->adapter;
1425 struct sge_eq *eq = &txq->eq;
1426
1427 if (eq->flags & (EQ_ALLOCATED | EQ_STARTED)) {
1428 rc = -t4_eth_eq_free(sc, sc->mbox, sc->pf, 0, eq->cntxt_id);
1429 if (rc != 0) {
1430 device_printf(pi->dev,
1431 "failed to free egress queue %p: %d\n", eq, rc);
1432 return (rc);
1433 }
1434 eq->flags &= ~(EQ_ALLOCATED | EQ_STARTED);
1435 }

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2439handle_sge_egr_update(struct adapter *sc, const struct cpl_sge_egr_update *cpl)
2440{
2441 unsigned int qid = G_EGR_QID(ntohl(cpl->opcode_qid));
2442 struct sge *s = &sc->sge;
2443 struct sge_txq *txq;
2444 struct port_info *pi;
2445
2446 txq = (void *)s->eqmap[qid - s->eq_start];
2447
2448 KASSERT(txq->eq.flags & EQ_CRFLUSHED,
2449 ("%s: tx queue %p not expecting an update.", __func__, txq));
2450
2451 pi = txq->ifp->if_softc;
2452 taskqueue_enqueue(pi->tq, &txq->resume_tx);
2453 txq->egr_update++;
2454
2455 return (0);
2456}