| t4_hw.h (247122) | t4_hw.h (248925) |
|---|---|
| 1/*- 2 * Copyright (c) 2011 Chelsio Communications, Inc. 3 * All rights reserved. 4 * 5 * Redistribution and use in source and binary forms, with or without 6 * modification, are permitted provided that the following conditions 7 * are met: 8 * 1. Redistributions of source code must retain the above copyright --- 9 unchanged lines hidden (view full) --- 18 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 19 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 20 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 21 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 22 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 23 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 24 * SUCH DAMAGE. 25 * | 1/*- 2 * Copyright (c) 2011 Chelsio Communications, Inc. 3 * All rights reserved. 4 * 5 * Redistribution and use in source and binary forms, with or without 6 * modification, are permitted provided that the following conditions 7 * are met: 8 * 1. Redistributions of source code must retain the above copyright --- 9 unchanged lines hidden (view full) --- 18 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 19 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 20 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 21 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 22 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 23 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 24 * SUCH DAMAGE. 25 * |
| 26 * $FreeBSD: head/sys/dev/cxgbe/common/t4_hw.h 247122 2013-02-21 20:13:15Z np $ | 26 * $FreeBSD: head/sys/dev/cxgbe/common/t4_hw.h 248925 2013-03-30 02:26:20Z np $ |
| 27 * 28 */ 29 30#ifndef __T4_HW_H 31#define __T4_HW_H 32 33#include "osdep.h" 34 35enum { | 27 * 28 */ 29 30#ifndef __T4_HW_H 31#define __T4_HW_H 32 33#include "osdep.h" 34 35enum { |
| 36 NCHAN = 4, /* # of HW channels */ 37 MAX_MTU = 9600, /* max MAC MTU, excluding header + FCS */ 38 EEPROMSIZE = 17408, /* Serial EEPROM physical size */ 39 EEPROMVSIZE = 32768, /* Serial EEPROM virtual address space size */ 40 EEPROMPFSIZE = 1024, /* EEPROM writable area size for PFn, n>0 */ 41 RSS_NENTRIES = 2048, /* # of entries in RSS mapping table */ 42 TCB_SIZE = 128, /* TCB size */ 43 NMTUS = 16, /* size of MTU table */ 44 NCCTRL_WIN = 32, /* # of congestion control windows */ 45 NTX_SCHED = 8, /* # of HW Tx scheduling queues */ 46 PM_NSTATS = 5, /* # of PM stats */ 47 MBOX_LEN = 64, /* mailbox size in bytes */ 48 TRACE_LEN = 112, /* length of trace data and mask */ 49 FILTER_OPT_LEN = 36, /* filter tuple width for optional components */ 50 NWOL_PAT = 8, /* # of WoL patterns */ 51 WOL_PAT_LEN = 128, /* length of WoL patterns */ | 36 NCHAN = 4, /* # of HW channels */ 37 MAX_MTU = 9600, /* max MAC MTU, excluding header + FCS */ 38 EEPROMSIZE = 17408, /* Serial EEPROM physical size */ 39 EEPROMVSIZE = 32768, /* Serial EEPROM virtual address space size */ 40 EEPROMPFSIZE = 1024, /* EEPROM writable area size for PFn, n>0 */ 41 RSS_NENTRIES = 2048, /* # of entries in RSS mapping table */ 42 TCB_SIZE = 128, /* TCB size */ 43 NMTUS = 16, /* size of MTU table */ 44 NCCTRL_WIN = 32, /* # of congestion control windows */ 45 NTX_SCHED = 8, /* # of HW Tx scheduling queues */ 46 PM_NSTATS = 5, /* # of PM stats */ 47 MBOX_LEN = 64, /* mailbox size in bytes */ 48 TRACE_LEN = 112, /* length of trace data and mask */ 49 FILTER_OPT_LEN = 36, /* filter tuple width of optional components */ 50 NWOL_PAT = 8, /* # of WoL patterns */ 51 WOL_PAT_LEN = 128, /* length of WoL patterns */ 52 UDBS_SEG_SIZE = 128, /* Segment size of BAR2 doorbells */ 53 UDBS_SEG_SHIFT = 7, /* log2(UDBS_SEG_SIZE) */ 54 UDBS_DB_OFFSET = 8, /* offset of the 4B doorbell in a segment */ 55 UDBS_WR_OFFSET = 64, /* offset of the work request in a segment */ |
| 52}; 53 54enum { 55 CIM_NUM_IBQ = 6, /* # of CIM IBQs */ 56 CIM_NUM_OBQ = 6, /* # of CIM OBQs */ | 56}; 57 58enum { 59 CIM_NUM_IBQ = 6, /* # of CIM IBQs */ 60 CIM_NUM_OBQ = 6, /* # of CIM OBQs */ |
| 61 CIM_NUM_OBQ_T5 = 8, /* # of CIM OBQs for T5 adapter */ |
|
| 57 CIMLA_SIZE = 2048, /* # of 32-bit words in CIM LA */ 58 CIM_PIFLA_SIZE = 64, /* # of 192-bit words in CIM PIF LA */ 59 CIM_MALA_SIZE = 64, /* # of 160-bit words in CIM MA LA */ 60 CIM_IBQ_SIZE = 128, /* # of 128-bit words in a CIM IBQ */ 61 CIM_OBQ_SIZE = 128, /* # of 128-bit words in a CIM OBQ */ 62 TPLA_SIZE = 128, /* # of 64-bit words in TP LA */ 63 ULPRX_LA_SIZE = 512, /* # of 256-bit words in ULP_RX LA */ 64}; --- 10 unchanged lines hidden (view full) --- 75 76enum { MBOX_OWNER_NONE, MBOX_OWNER_FW, MBOX_OWNER_DRV }; /* mailbox owners */ 77 78enum { 79 SGE_MAX_WR_LEN = 512, /* max WR size in bytes */ 80 SGE_CTXT_SIZE = 24, /* size of SGE context */ 81 SGE_NTIMERS = 6, /* # of interrupt holdoff timer values */ 82 SGE_NCOUNTERS = 4, /* # of interrupt packet counter values */ | 62 CIMLA_SIZE = 2048, /* # of 32-bit words in CIM LA */ 63 CIM_PIFLA_SIZE = 64, /* # of 192-bit words in CIM PIF LA */ 64 CIM_MALA_SIZE = 64, /* # of 160-bit words in CIM MA LA */ 65 CIM_IBQ_SIZE = 128, /* # of 128-bit words in a CIM IBQ */ 66 CIM_OBQ_SIZE = 128, /* # of 128-bit words in a CIM OBQ */ 67 TPLA_SIZE = 128, /* # of 64-bit words in TP LA */ 68 ULPRX_LA_SIZE = 512, /* # of 256-bit words in ULP_RX LA */ 69}; --- 10 unchanged lines hidden (view full) --- 80 81enum { MBOX_OWNER_NONE, MBOX_OWNER_FW, MBOX_OWNER_DRV }; /* mailbox owners */ 82 83enum { 84 SGE_MAX_WR_LEN = 512, /* max WR size in bytes */ 85 SGE_CTXT_SIZE = 24, /* size of SGE context */ 86 SGE_NTIMERS = 6, /* # of interrupt holdoff timer values */ 87 SGE_NCOUNTERS = 4, /* # of interrupt packet counter values */ |
| 88 SGE_MAX_IQ_SIZE = 65520, |
|
| 83}; 84 85struct sge_qstat { /* data written to SGE queue status entries */ 86 volatile __be32 qid; 87 volatile __be16 cidx; 88 volatile __be16 pidx; 89}; 90 --- 125 unchanged lines hidden (view full) --- 216 FLASH_BOOTCFG_NSECS = 1, 217 FLASH_BOOTCFG_START = FLASH_START(FLASH_BOOTCFG_START_SEC), 218 FLASH_BOOTCFG_MAX_SIZE = FLASH_MAX_SIZE(FLASH_BOOTCFG_NSECS), 219 220 /* 221 * Location of firmware image in FLASH. 222 */ 223 FLASH_FW_START_SEC = 8, | 89}; 90 91struct sge_qstat { /* data written to SGE queue status entries */ 92 volatile __be32 qid; 93 volatile __be16 cidx; 94 volatile __be16 pidx; 95}; 96 --- 125 unchanged lines hidden (view full) --- 222 FLASH_BOOTCFG_NSECS = 1, 223 FLASH_BOOTCFG_START = FLASH_START(FLASH_BOOTCFG_START_SEC), 224 FLASH_BOOTCFG_MAX_SIZE = FLASH_MAX_SIZE(FLASH_BOOTCFG_NSECS), 225 226 /* 227 * Location of firmware image in FLASH. 228 */ 229 FLASH_FW_START_SEC = 8, |
| 224 FLASH_FW_NSECS = 8, | 230 FLASH_FW_NSECS = 16, |
| 225 FLASH_FW_START = FLASH_START(FLASH_FW_START_SEC), 226 FLASH_FW_MAX_SIZE = FLASH_MAX_SIZE(FLASH_FW_NSECS), 227 228 /* 229 * iSCSI persistent/crash information. 230 */ 231 FLASH_ISCSI_CRASH_START_SEC = 29, 232 FLASH_ISCSI_CRASH_NSECS = 1, --- 34 unchanged lines hidden --- | 231 FLASH_FW_START = FLASH_START(FLASH_FW_START_SEC), 232 FLASH_FW_MAX_SIZE = FLASH_MAX_SIZE(FLASH_FW_NSECS), 233 234 /* 235 * iSCSI persistent/crash information. 236 */ 237 FLASH_ISCSI_CRASH_START_SEC = 29, 238 FLASH_ISCSI_CRASH_NSECS = 1, --- 34 unchanged lines hidden --- |