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t4_hw.c (252747) t4_hw.c (253691)
1/*-
2 * Copyright (c) 2012 Chelsio Communications, Inc.
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions
7 * are met:
8 * 1. Redistributions of source code must retain the above copyright

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20 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
21 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
22 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
23 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
24 * SUCH DAMAGE.
25 */
26
27#include <sys/cdefs.h>
1/*-
2 * Copyright (c) 2012 Chelsio Communications, Inc.
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions
7 * are met:
8 * 1. Redistributions of source code must retain the above copyright

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20 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
21 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
22 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
23 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
24 * SUCH DAMAGE.
25 */
26
27#include <sys/cdefs.h>
28__FBSDID("$FreeBSD: head/sys/dev/cxgbe/common/t4_hw.c 252747 2013-07-05 01:53:51Z np $");
28__FBSDID("$FreeBSD: head/sys/dev/cxgbe/common/t4_hw.c 253691 2013-07-26 22:04:11Z np $");
29
30#include "opt_inet.h"
31
32#include "common.h"
33#include "t4_regs.h"
34#include "t4_regs_values.h"
35#include "firmware/t4fw_interface.h"
36

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3619
3620/**
3621 * t4_set_trace_filter - configure one of the tracing filters
3622 * @adap: the adapter
3623 * @tp: the desired trace filter parameters
3624 * @idx: which filter to configure
3625 * @enable: whether to enable or disable the filter
3626 *
29
30#include "opt_inet.h"
31
32#include "common.h"
33#include "t4_regs.h"
34#include "t4_regs_values.h"
35#include "firmware/t4fw_interface.h"
36

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3619
3620/**
3621 * t4_set_trace_filter - configure one of the tracing filters
3622 * @adap: the adapter
3623 * @tp: the desired trace filter parameters
3624 * @idx: which filter to configure
3625 * @enable: whether to enable or disable the filter
3626 *
3627 * Configures one of the tracing filters available in HW. If @enable is
3628 * %0 @tp is not examined and may be %NULL. The user is responsible to
3629 * set the single/multiple trace mode by writing to A_MPS_TRC_CFG register
3630 * by using "cxgbtool iface reg reg_addr=val" command. See t4_sniffer/
3631 * docs/readme.txt for a complete description of how to setup traceing on
3632 * T4.
3627 * Configures one of the tracing filters available in HW. If @tp is %NULL
3628 * it indicates that the filter is already written in the register and it
3629 * just needs to be enabled or disabled.
3633 */
3630 */
3634int t4_set_trace_filter(struct adapter *adap, const struct trace_params *tp, int idx,
3635 int enable)
3631int t4_set_trace_filter(struct adapter *adap, const struct trace_params *tp,
3632 int idx, int enable)
3636{
3637 int i, ofst = idx * 4;
3638 u32 data_reg, mask_reg, cfg;
3639 u32 multitrc = F_TRCMULTIFILTER;
3633{
3634 int i, ofst = idx * 4;
3635 u32 data_reg, mask_reg, cfg;
3636 u32 multitrc = F_TRCMULTIFILTER;
3637 u32 en = is_t4(adap) ? F_TFEN : F_T5_TFEN;
3640
3638
3641 if (!enable) {
3642 t4_write_reg(adap, A_MPS_TRC_FILTER_MATCH_CTL_A + ofst, 0);
3639 if (idx < 0 || idx >= NTRACE)
3640 return -EINVAL;
3641
3642 if (tp == NULL || !enable) {
3643 t4_set_reg_field(adap, A_MPS_TRC_FILTER_MATCH_CTL_A + ofst, en,
3644 enable ? en : 0);
3643 return 0;
3644 }
3645
3646 /*
3647 * TODO - After T4 data book is updated, specify the exact
3648 * section below.
3649 *
3650 * See T4 data book - MPS section for a complete description

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3655 if (cfg & F_TRCMULTIFILTER) {
3656 /*
3657 * If multiple tracers are enabled, then maximum
3658 * capture size is 2.5KB (FIFO size of a single channel)
3659 * minus 2 flits for CPL_TRACE_PKT header.
3660 */
3661 if (tp->snap_len > ((10 * 1024 / 4) - (2 * 8)))
3662 return -EINVAL;
3645 return 0;
3646 }
3647
3648 /*
3649 * TODO - After T4 data book is updated, specify the exact
3650 * section below.
3651 *
3652 * See T4 data book - MPS section for a complete description

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3657 if (cfg & F_TRCMULTIFILTER) {
3658 /*
3659 * If multiple tracers are enabled, then maximum
3660 * capture size is 2.5KB (FIFO size of a single channel)
3661 * minus 2 flits for CPL_TRACE_PKT header.
3662 */
3663 if (tp->snap_len > ((10 * 1024 / 4) - (2 * 8)))
3664 return -EINVAL;
3663 }
3664 else {
3665 } else {
3665 /*
3666 * If multiple tracers are disabled, to avoid deadlocks
3667 * maximum packet capture size of 9600 bytes is recommended.
3668 * Also in this mode, only trace0 can be enabled and running.
3669 */
3670 multitrc = 0;
3671 if (tp->snap_len > 9600 || idx)
3672 return -EINVAL;
3673 }
3674
3666 /*
3667 * If multiple tracers are disabled, to avoid deadlocks
3668 * maximum packet capture size of 9600 bytes is recommended.
3669 * Also in this mode, only trace0 can be enabled and running.
3670 */
3671 multitrc = 0;
3672 if (tp->snap_len > 9600 || idx)
3673 return -EINVAL;
3674 }
3675
3675 if (tp->port > 11 || tp->invert > 1 || tp->skip_len > M_TFLENGTH ||
3676 tp->skip_ofst > M_TFOFFSET || tp->min_len > M_TFMINPKTSIZE)
3676 if (tp->port > (is_t4(adap) ? 11 : 19) || tp->invert > 1 ||
3677 tp->skip_len > M_TFLENGTH || tp->skip_ofst > M_TFOFFSET ||
3678 tp->min_len > M_TFMINPKTSIZE)
3677 return -EINVAL;
3678
3679 /* stop the tracer we'll be changing */
3679 return -EINVAL;
3680
3681 /* stop the tracer we'll be changing */
3680 t4_write_reg(adap, A_MPS_TRC_FILTER_MATCH_CTL_A + ofst, 0);
3682 t4_set_reg_field(adap, A_MPS_TRC_FILTER_MATCH_CTL_A + ofst, en, 0);
3681
3682 idx *= (A_MPS_TRC_FILTER1_MATCH - A_MPS_TRC_FILTER0_MATCH);
3683 data_reg = A_MPS_TRC_FILTER0_MATCH + idx;
3684 mask_reg = A_MPS_TRC_FILTER0_DONT_CARE + idx;
3685
3686 for (i = 0; i < TRACE_LEN / 4; i++, data_reg += 4, mask_reg += 4) {
3687 t4_write_reg(adap, data_reg, tp->data[i]);
3688 t4_write_reg(adap, mask_reg, ~tp->mask[i]);
3689 }
3690 t4_write_reg(adap, A_MPS_TRC_FILTER_MATCH_CTL_B + ofst,
3691 V_TFCAPTUREMAX(tp->snap_len) |
3692 V_TFMINPKTSIZE(tp->min_len));
3693 t4_write_reg(adap, A_MPS_TRC_FILTER_MATCH_CTL_A + ofst,
3683
3684 idx *= (A_MPS_TRC_FILTER1_MATCH - A_MPS_TRC_FILTER0_MATCH);
3685 data_reg = A_MPS_TRC_FILTER0_MATCH + idx;
3686 mask_reg = A_MPS_TRC_FILTER0_DONT_CARE + idx;
3687
3688 for (i = 0; i < TRACE_LEN / 4; i++, data_reg += 4, mask_reg += 4) {
3689 t4_write_reg(adap, data_reg, tp->data[i]);
3690 t4_write_reg(adap, mask_reg, ~tp->mask[i]);
3691 }
3692 t4_write_reg(adap, A_MPS_TRC_FILTER_MATCH_CTL_B + ofst,
3693 V_TFCAPTUREMAX(tp->snap_len) |
3694 V_TFMINPKTSIZE(tp->min_len));
3695 t4_write_reg(adap, A_MPS_TRC_FILTER_MATCH_CTL_A + ofst,
3694 V_TFOFFSET(tp->skip_ofst) | V_TFLENGTH(tp->skip_len) |
3695 is_t4(adap) ?
3696 V_TFPORT(tp->port) | F_TFEN | V_TFINVERTMATCH(tp->invert) :
3697 V_T5_TFPORT(tp->port) | F_T5_TFEN |
3698 V_T5_TFINVERTMATCH(tp->invert));
3696 V_TFOFFSET(tp->skip_ofst) | V_TFLENGTH(tp->skip_len) | en |
3697 (is_t4(adap) ?
3698 V_TFPORT(tp->port) | V_TFINVERTMATCH(tp->invert) :
3699 V_T5_TFPORT(tp->port) | V_T5_TFINVERTMATCH(tp->invert)));
3699
3700 return 0;
3701}
3702
3703/**
3704 * t4_get_trace_filter - query one of the tracing filters
3705 * @adap: the adapter
3706 * @tp: the current trace filter parameters

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3717 u32 data_reg, mask_reg;
3718
3719 ctla = t4_read_reg(adap, A_MPS_TRC_FILTER_MATCH_CTL_A + ofst);
3720 ctlb = t4_read_reg(adap, A_MPS_TRC_FILTER_MATCH_CTL_B + ofst);
3721
3722 if (is_t4(adap)) {
3723 *enabled = !!(ctla & F_TFEN);
3724 tp->port = G_TFPORT(ctla);
3700
3701 return 0;
3702}
3703
3704/**
3705 * t4_get_trace_filter - query one of the tracing filters
3706 * @adap: the adapter
3707 * @tp: the current trace filter parameters

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3718 u32 data_reg, mask_reg;
3719
3720 ctla = t4_read_reg(adap, A_MPS_TRC_FILTER_MATCH_CTL_A + ofst);
3721 ctlb = t4_read_reg(adap, A_MPS_TRC_FILTER_MATCH_CTL_B + ofst);
3722
3723 if (is_t4(adap)) {
3724 *enabled = !!(ctla & F_TFEN);
3725 tp->port = G_TFPORT(ctla);
3726 tp->invert = !!(ctla & F_TFINVERTMATCH);
3725 } else {
3726 *enabled = !!(ctla & F_T5_TFEN);
3727 tp->port = G_T5_TFPORT(ctla);
3727 } else {
3728 *enabled = !!(ctla & F_T5_TFEN);
3729 tp->port = G_T5_TFPORT(ctla);
3730 tp->invert = !!(ctla & F_T5_TFINVERTMATCH);
3728 }
3729 tp->snap_len = G_TFCAPTUREMAX(ctlb);
3730 tp->min_len = G_TFMINPKTSIZE(ctlb);
3731 tp->skip_ofst = G_TFOFFSET(ctla);
3732 tp->skip_len = G_TFLENGTH(ctla);
3731 }
3732 tp->snap_len = G_TFCAPTUREMAX(ctlb);
3733 tp->min_len = G_TFMINPKTSIZE(ctlb);
3734 tp->skip_ofst = G_TFOFFSET(ctla);
3735 tp->skip_len = G_TFLENGTH(ctla);
3733 tp->invert = !!(ctla & F_TFINVERTMATCH);
3734
3735 ofst = (A_MPS_TRC_FILTER1_MATCH - A_MPS_TRC_FILTER0_MATCH) * idx;
3736 data_reg = A_MPS_TRC_FILTER0_MATCH + ofst;
3737 mask_reg = A_MPS_TRC_FILTER0_DONT_CARE + ofst;
3738
3739 for (i = 0; i < TRACE_LEN / 4; i++, data_reg += 4, mask_reg += 4) {
3740 tp->mask[i] = ~t4_read_reg(adap, mask_reg);
3741 tp->data[i] = t4_read_reg(adap, data_reg) & tp->mask[i];

--- 1920 unchanged lines hidden ---
3736
3737 ofst = (A_MPS_TRC_FILTER1_MATCH - A_MPS_TRC_FILTER0_MATCH) * idx;
3738 data_reg = A_MPS_TRC_FILTER0_MATCH + ofst;
3739 mask_reg = A_MPS_TRC_FILTER0_DONT_CARE + ofst;
3740
3741 for (i = 0; i < TRACE_LEN / 4; i++, data_reg += 4, mask_reg += 4) {
3742 tp->mask[i] = ~t4_read_reg(adap, mask_reg);
3743 tp->data[i] = t4_read_reg(adap, data_reg) & tp->mask[i];

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