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cxgb_osdep.h (175339) cxgb_osdep.h (176472)
1/**************************************************************************
2
3Copyright (c) 2007, Chelsio Inc.
4All rights reserved.
5
6Redistribution and use in source and binary forms, with or without
7modification, are permitted provided that the following conditions are met:
8

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21CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
22SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
23INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
24CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
25ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
26POSSIBILITY OF SUCH DAMAGE.
27
28
1/**************************************************************************
2
3Copyright (c) 2007, Chelsio Inc.
4All rights reserved.
5
6Redistribution and use in source and binary forms, with or without
7modification, are permitted provided that the following conditions are met:
8

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21CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
22SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
23INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
24CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
25ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
26POSSIBILITY OF SUCH DAMAGE.
27
28
29$FreeBSD: head/sys/dev/cxgb/cxgb_osdep.h 175339 2008-01-15 03:21:02Z kmacy $
29$FreeBSD: head/sys/dev/cxgb/cxgb_osdep.h 176472 2008-02-23 01:06:17Z kmacy $
30
31***************************************************************************/
32
33#include <sys/param.h>
34#include <sys/systm.h>
35#include <sys/ctype.h>
36#include <sys/endian.h>
37#include <sys/bus.h>

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78 */
79#define m_set_toep(m, a) ((m)->m_pkthdr.header = (a))
80#define m_get_toep(m) ((m)->m_pkthdr.header)
81#define m_set_handler(m, handler) ((m)->m_pkthdr.header = (handler))
82
83#define m_set_socket(m, a) ((m)->m_pkthdr.header = (a))
84#define m_get_socket(m) ((m)->m_pkthdr.header)
85
30
31***************************************************************************/
32
33#include <sys/param.h>
34#include <sys/systm.h>
35#include <sys/ctype.h>
36#include <sys/endian.h>
37#include <sys/bus.h>

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78 */
79#define m_set_toep(m, a) ((m)->m_pkthdr.header = (a))
80#define m_get_toep(m) ((m)->m_pkthdr.header)
81#define m_set_handler(m, handler) ((m)->m_pkthdr.header = (handler))
82
83#define m_set_socket(m, a) ((m)->m_pkthdr.header = (a))
84#define m_get_socket(m) ((m)->m_pkthdr.header)
85
86#define KTR_CXGB KTR_SPARE2
87void cxgb_log_tcb(struct adapter *sc, unsigned int tid);
88
86#define MT_DONTFREE 128
87
88#if __FreeBSD_version > 700030
89#define INTR_FILTERS
90#define FIRMWARE_LATEST
91#endif
92
93#if ((__FreeBSD_version > 602103) && (__FreeBSD_version < 700000))

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333#define DBG(flag, msg) do { \
334 if ((flag & debug_flags)) \
335 printf msg; \
336} while (0)
337#else
338#define DBG(...)
339#endif
340
89#define MT_DONTFREE 128
90
91#if __FreeBSD_version > 700030
92#define INTR_FILTERS
93#define FIRMWARE_LATEST
94#endif
95
96#if ((__FreeBSD_version > 602103) && (__FreeBSD_version < 700000))

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336#define DBG(flag, msg) do { \
337 if ((flag & debug_flags)) \
338 printf msg; \
339} while (0)
340#else
341#define DBG(...)
342#endif
343
344#include <sys/syslog.h>
345
341#define promisc_rx_mode(rm) ((rm)->port->ifp->if_flags & IFF_PROMISC)
342#define allmulti_rx_mode(rm) ((rm)->port->ifp->if_flags & IFF_ALLMULTI)
343
346#define promisc_rx_mode(rm) ((rm)->port->ifp->if_flags & IFF_PROMISC)
347#define allmulti_rx_mode(rm) ((rm)->port->ifp->if_flags & IFF_ALLMULTI)
348
344#define CH_ERR(adap, fmt, ...)device_printf(adap->dev, fmt, ##__VA_ARGS__);
349#define CH_ERR(adap, fmt, ...) log(LOG_ERR, fmt, ##__VA_ARGS__)
350#define CH_WARN(adap, fmt, ...) log(LOG_WARNING, fmt, ##__VA_ARGS__)
351#define CH_ALERT(adap, fmt, ...) log(LOG_ALERT, fmt, ##__VA_ARGS__)
345
352
346#define CH_WARN(adap, fmt, ...) device_printf(adap->dev, fmt, ##__VA_ARGS__)
347#define CH_ALERT(adap, fmt, ...) device_printf(adap->dev, fmt, ##__VA_ARGS__)
348
349#define t3_os_sleep(x) DELAY((x) * 1000)
350
351#define test_and_clear_bit(bit, p) atomic_cmpset_int((p), ((*(p)) | (1<<bit)), ((*(p)) & ~(1<<bit)))
352
353#define max_t(type, a, b) (type)max((a), (b))
354#define net_device ifnet
355#define cpu_to_be32 htobe32
356

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365#define BMSR_LSTATUS BMSR_LINK
366#define BMSR_ANEGCOMPLETE BMSR_ACOMP
367
368#define MII_LPA MII_ANLPAR
369#define MII_ADVERTISE MII_ANAR
370#define MII_CTRL1000 MII_100T2CR
371
372#define ADVERTISE_PAUSE_CAP ANAR_FC
353#define t3_os_sleep(x) DELAY((x) * 1000)
354
355#define test_and_clear_bit(bit, p) atomic_cmpset_int((p), ((*(p)) | (1<<bit)), ((*(p)) & ~(1<<bit)))
356
357#define max_t(type, a, b) (type)max((a), (b))
358#define net_device ifnet
359#define cpu_to_be32 htobe32
360

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369#define BMSR_LSTATUS BMSR_LINK
370#define BMSR_ANEGCOMPLETE BMSR_ACOMP
371
372#define MII_LPA MII_ANLPAR
373#define MII_ADVERTISE MII_ANAR
374#define MII_CTRL1000 MII_100T2CR
375
376#define ADVERTISE_PAUSE_CAP ANAR_FC
373#define ADVERTISE_PAUSE_ASYM 0x0800
377#define ADVERTISE_PAUSE_ASYM ANAR_X_PAUSE_ASYM
378#define ADVERTISE_PAUSE ANAR_X_PAUSE_SYM
374#define ADVERTISE_1000HALF ANAR_X_HD
375#define ADVERTISE_1000FULL ANAR_X_FD
376#define ADVERTISE_10FULL ANAR_10_FD
377#define ADVERTISE_10HALF ANAR_10
378#define ADVERTISE_100FULL ANAR_TX_FD
379#define ADVERTISE_100HALF ANAR_TX
380
379#define ADVERTISE_1000HALF ANAR_X_HD
380#define ADVERTISE_1000FULL ANAR_X_FD
381#define ADVERTISE_10FULL ANAR_10_FD
382#define ADVERTISE_10HALF ANAR_10
383#define ADVERTISE_100FULL ANAR_TX_FD
384#define ADVERTISE_100HALF ANAR_TX
385
386
387#define ADVERTISE_1000XHALF ANAR_X_HD
388#define ADVERTISE_1000XFULL ANAR_X_FD
389#define ADVERTISE_1000XPSE_ASYM ANAR_X_PAUSE_ASYM
390#define ADVERTISE_1000XPAUSE ANAR_X_PAUSE_SYM
391
392
381/* Standard PCI Extended Capaibilities definitions */
382#define PCI_CAP_ID_VPD 0x03
383#define PCI_VPD_ADDR 2
384#define PCI_VPD_ADDR_F 0x8000
385#define PCI_VPD_DATA 4
386
387#define PCI_CAP_ID_EXP 0x10
388#define PCI_EXP_DEVCTL 8

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394 * Linux compatibility macros
395 */
396
397/* Some simple translations */
398#define __devinit
399#define udelay(x) DELAY(x)
400#define ARRAY_SIZE(x) (sizeof(x) / sizeof((x)[0]))
401#define le32_to_cpu(x) le32toh(x)
393/* Standard PCI Extended Capaibilities definitions */
394#define PCI_CAP_ID_VPD 0x03
395#define PCI_VPD_ADDR 2
396#define PCI_VPD_ADDR_F 0x8000
397#define PCI_VPD_DATA 4
398
399#define PCI_CAP_ID_EXP 0x10
400#define PCI_EXP_DEVCTL 8

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406 * Linux compatibility macros
407 */
408
409/* Some simple translations */
410#define __devinit
411#define udelay(x) DELAY(x)
412#define ARRAY_SIZE(x) (sizeof(x) / sizeof((x)[0]))
413#define le32_to_cpu(x) le32toh(x)
414#define le16_to_cpu(x) le16toh(x)
402#define cpu_to_le32(x) htole32(x)
403#define swab32(x) bswap32(x)
404#define simple_strtoul strtoul
405
406
415#define cpu_to_le32(x) htole32(x)
416#define swab32(x) bswap32(x)
417#define simple_strtoul strtoul
418
419
407typedef uint8_t u8;
408typedef uint16_t u16;
409typedef uint32_t u32;
410typedef uint64_t u64;
420#ifndef LINUX_TYPES_DEFINED
421typedef uint8_t u8;
422typedef uint16_t u16;
423typedef uint32_t u32;
424typedef uint64_t u64;
411
425
412typedef uint8_t __u8;
413typedef uint16_t __u16;
414typedef uint32_t __u32;
415typedef uint8_t __be8;
416typedef uint16_t __be16;
417typedef uint32_t __be32;
418typedef uint64_t __be64;
426typedef uint8_t __u8;
427typedef uint16_t __u16;
428typedef uint32_t __u32;
429typedef uint8_t __be8;
430typedef uint16_t __be16;
431typedef uint32_t __be32;
432typedef uint64_t __be64;
433#endif
419
420
421#if BYTE_ORDER == BIG_ENDIAN
422#define __BIG_ENDIAN_BITFIELD
423#elif BYTE_ORDER == LITTLE_ENDIAN
424#define __LITTLE_ENDIAN_BITFIELD
425#else
426#error "Must set BYTE_ORDER"

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435
436#if BYTE_ORDER == BIG_ENDIAN
437#define __BIG_ENDIAN_BITFIELD
438#elif BYTE_ORDER == LITTLE_ENDIAN
439#define __LITTLE_ENDIAN_BITFIELD
440#else
441#error "Must set BYTE_ORDER"

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