| cxgb_t3_cpl.h (175200) | cxgb_t3_cpl.h (176472) |
|---|---|
| 1/************************************************************************** 2 3Copyright (c) 2007, Chelsio Inc. 4All rights reserved. 5 6Redistribution and use in source and binary forms, with or without 7modification, are permitted provided that the following conditions are met: 8 --- 11 unchanged lines hidden (view full) --- 20LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 21CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 22SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 23INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 24CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 25ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 26POSSIBILITY OF SUCH DAMAGE. 27 | 1/************************************************************************** 2 3Copyright (c) 2007, Chelsio Inc. 4All rights reserved. 5 6Redistribution and use in source and binary forms, with or without 7modification, are permitted provided that the following conditions are met: 8 --- 11 unchanged lines hidden (view full) --- 20LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 21CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 22SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 23INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 24CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 25ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 26POSSIBILITY OF SUCH DAMAGE. 27 |
| 28$FreeBSD: head/sys/dev/cxgb/common/cxgb_t3_cpl.h 175200 2008-01-10 00:55:42Z kmacy $ | 28$FreeBSD: head/sys/dev/cxgb/common/cxgb_t3_cpl.h 176472 2008-02-23 01:06:17Z kmacy $ |
| 29 30***************************************************************************/ 31#ifndef T3_CPL_H 32#define T3_CPL_H 33 34enum CPL_opcode { 35 CPL_PASS_OPEN_REQ = 0x1, 36 CPL_PASS_ACCEPT_RPL = 0x2, --- 131 unchanged lines hidden (view full) --- 168 CONG_ALG_RENO, 169 CONG_ALG_TAHOE, 170 CONG_ALG_NEWRENO, 171 CONG_ALG_HIGHSPEED 172}; 173 174enum { /* RSS hash type */ 175 RSS_HASH_NONE = 0, | 29 30***************************************************************************/ 31#ifndef T3_CPL_H 32#define T3_CPL_H 33 34enum CPL_opcode { 35 CPL_PASS_OPEN_REQ = 0x1, 36 CPL_PASS_ACCEPT_RPL = 0x2, --- 131 unchanged lines hidden (view full) --- 168 CONG_ALG_RENO, 169 CONG_ALG_TAHOE, 170 CONG_ALG_NEWRENO, 171 CONG_ALG_HIGHSPEED 172}; 173 174enum { /* RSS hash type */ 175 RSS_HASH_NONE = 0, |
| 176 RSS_HASH_2_TUPLE = 1 << 0, 177 RSS_HASH_4_TUPLE = 1 << 1 | 176 RSS_HASH_2_TUPLE = 1, 177 RSS_HASH_4_TUPLE = 2, 178 RSS_HASH_TCPV6 = 3 |
| 178}; 179 180union opcode_tid { 181 __be32 opcode_tid; 182 __u8 opcode; 183}; 184 185#define S_OPCODE 24 --- 906 unchanged lines hidden (view full) --- 1092#define G_DDP_ULP_MODE(x) (((x) >> S_DDP_ULP_MODE) & M_DDP_ULP_MODE) 1093 1094/* cpl_rx_data_ddp.ddp_report fields */ 1095#define S_DDP_OFFSET 0 1096#define M_DDP_OFFSET 0x3FFFFF 1097#define V_DDP_OFFSET(x) ((x) << S_DDP_OFFSET) 1098#define G_DDP_OFFSET(x) (((x) >> S_DDP_OFFSET) & M_DDP_OFFSET) 1099 | 179}; 180 181union opcode_tid { 182 __be32 opcode_tid; 183 __u8 opcode; 184}; 185 186#define S_OPCODE 24 --- 906 unchanged lines hidden (view full) --- 1093#define G_DDP_ULP_MODE(x) (((x) >> S_DDP_ULP_MODE) & M_DDP_ULP_MODE) 1094 1095/* cpl_rx_data_ddp.ddp_report fields */ 1096#define S_DDP_OFFSET 0 1097#define M_DDP_OFFSET 0x3FFFFF 1098#define V_DDP_OFFSET(x) ((x) << S_DDP_OFFSET) 1099#define G_DDP_OFFSET(x) (((x) >> S_DDP_OFFSET) & M_DDP_OFFSET) 1100 |
| 1101#define S_DDP_DACK_MODE 22 1102#define M_DDP_DACK_MODE 0x3 1103#define V_DDP_DACK_MODE(x) ((x) << S_DDP_DACK_MODE) 1104#define G_DDP_DACK_MODE(x) (((x) >> S_DDP_DACK_MODE) & M_DDP_DACK_MODE) 1105 |
|
| 1100#define S_DDP_URG 24 1101#define V_DDP_URG(x) ((x) << S_DDP_URG) 1102#define F_DDP_URG V_DDP_URG(1U) 1103 1104#define S_DDP_PSH 25 1105#define V_DDP_PSH(x) ((x) << S_DDP_PSH) 1106#define F_DDP_PSH V_DDP_PSH(1U) 1107 --- 456 unchanged lines hidden --- | 1106#define S_DDP_URG 24 1107#define V_DDP_URG(x) ((x) << S_DDP_URG) 1108#define F_DDP_URG V_DDP_URG(1U) 1109 1110#define S_DDP_PSH 25 1111#define V_DDP_PSH(x) ((x) << S_DDP_PSH) 1112#define F_DDP_PSH V_DDP_PSH(1U) 1113 --- 456 unchanged lines hidden --- |