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cxgb_mv88e1xxx.c (170076) cxgb_mv88e1xxx.c (176472)
1/**************************************************************************
2
3Copyright (c) 2007, Chelsio Inc.
4All rights reserved.
5
6Redistribution and use in source and binary forms, with or without
7modification, are permitted provided that the following conditions are met:
8

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23INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
24CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
25ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
26POSSIBILITY OF SUCH DAMAGE.
27
28***************************************************************************/
29
30#include <sys/cdefs.h>
1/**************************************************************************
2
3Copyright (c) 2007, Chelsio Inc.
4All rights reserved.
5
6Redistribution and use in source and binary forms, with or without
7modification, are permitted provided that the following conditions are met:
8

--- 14 unchanged lines hidden (view full) ---

23INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
24CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
25ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
26POSSIBILITY OF SUCH DAMAGE.
27
28***************************************************************************/
29
30#include <sys/cdefs.h>
31__FBSDID("$FreeBSD: head/sys/dev/cxgb/common/cxgb_mv88e1xxx.c 170076 2007-05-28 22:57:27Z kmacy $");
31__FBSDID("$FreeBSD: head/sys/dev/cxgb/common/cxgb_mv88e1xxx.c 176472 2008-02-23 01:06:17Z kmacy $");
32
33#ifdef CONFIG_DEFINED
34#include <cxgb_include.h>
35#else
36#include <dev/cxgb/cxgb_include.h>
37#endif
38
39/* Marvell PHY interrupt status bits. */

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216 *speed = sp;
217 if (duplex)
218 *duplex = dplx;
219 if (fc)
220 *fc = pause;
221 return 0;
222}
223
32
33#ifdef CONFIG_DEFINED
34#include <cxgb_include.h>
35#else
36#include <dev/cxgb/cxgb_include.h>
37#endif
38
39/* Marvell PHY interrupt status bits. */

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216 *speed = sp;
217 if (duplex)
218 *duplex = dplx;
219 if (fc)
220 *fc = pause;
221 return 0;
222}
223
224static int mv88e1xxx_set_speed_duplex(struct cphy *phy, int speed, int duplex)
225{
226 int err = t3_set_phy_speed_duplex(phy, speed, duplex);
227
228 /* PHY needs reset for new settings to take effect */
229 if (!err)
230 err = mv88e1xxx_reset(phy, 0);
231 return err;
232}
233
224static int mv88e1xxx_downshift_set(struct cphy *cphy, int downshift_enable)
225{
226 /*
227 * Set the downshift counter to 2 so we try to establish Gb link
228 * twice before downshifting.
229 */
230 return t3_mdio_change_bits(cphy, 0, MV88E1XXX_EXT_SPECIFIC_CNTRL,
231 V_DOWNSHIFT_ENABLE | V_DOWNSHIFT_CNT(M_DOWNSHIFT_CNT),

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253 cphy_cause |= cphy_cause_link_change;
254 if (cause & MV_INTR_FIFO_OVER_UNDER)
255 cphy_cause |= cphy_cause_fifo_error;
256 return cphy_cause;
257}
258
259#ifdef C99_NOT_SUPPORTED
260static struct cphy_ops mv88e1xxx_ops = {
234static int mv88e1xxx_downshift_set(struct cphy *cphy, int downshift_enable)
235{
236 /*
237 * Set the downshift counter to 2 so we try to establish Gb link
238 * twice before downshifting.
239 */
240 return t3_mdio_change_bits(cphy, 0, MV88E1XXX_EXT_SPECIFIC_CNTRL,
241 V_DOWNSHIFT_ENABLE | V_DOWNSHIFT_CNT(M_DOWNSHIFT_CNT),

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263 cphy_cause |= cphy_cause_link_change;
264 if (cause & MV_INTR_FIFO_OVER_UNDER)
265 cphy_cause |= cphy_cause_fifo_error;
266 return cphy_cause;
267}
268
269#ifdef C99_NOT_SUPPORTED
270static struct cphy_ops mv88e1xxx_ops = {
261 NULL,
262 mv88e1xxx_reset,
263 mv88e1xxx_intr_enable,
264 mv88e1xxx_intr_disable,
265 mv88e1xxx_intr_clear,
266 mv88e1xxx_intr_handler,
267 mv88e1xxx_autoneg_enable,
268 mv88e1xxx_autoneg_restart,
269 t3_phy_advertise,
270 mv88e1xxx_set_loopback,
271 mv88e1xxx_reset,
272 mv88e1xxx_intr_enable,
273 mv88e1xxx_intr_disable,
274 mv88e1xxx_intr_clear,
275 mv88e1xxx_intr_handler,
276 mv88e1xxx_autoneg_enable,
277 mv88e1xxx_autoneg_restart,
278 t3_phy_advertise,
279 mv88e1xxx_set_loopback,
271 t3_set_phy_speed_duplex,
280 mv88e1xxx_set_speed_duplex,
272 mv88e1xxx_get_link_status,
273 mv88e1xxx_power_down,
274};
275#else
276static struct cphy_ops mv88e1xxx_ops = {
277 .reset = mv88e1xxx_reset,
278 .intr_enable = mv88e1xxx_intr_enable,
279 .intr_disable = mv88e1xxx_intr_disable,
280 .intr_clear = mv88e1xxx_intr_clear,
281 .intr_handler = mv88e1xxx_intr_handler,
282 .autoneg_enable = mv88e1xxx_autoneg_enable,
283 .autoneg_restart = mv88e1xxx_autoneg_restart,
284 .advertise = t3_phy_advertise,
285 .set_loopback = mv88e1xxx_set_loopback,
281 mv88e1xxx_get_link_status,
282 mv88e1xxx_power_down,
283};
284#else
285static struct cphy_ops mv88e1xxx_ops = {
286 .reset = mv88e1xxx_reset,
287 .intr_enable = mv88e1xxx_intr_enable,
288 .intr_disable = mv88e1xxx_intr_disable,
289 .intr_clear = mv88e1xxx_intr_clear,
290 .intr_handler = mv88e1xxx_intr_handler,
291 .autoneg_enable = mv88e1xxx_autoneg_enable,
292 .autoneg_restart = mv88e1xxx_autoneg_restart,
293 .advertise = t3_phy_advertise,
294 .set_loopback = mv88e1xxx_set_loopback,
286 .set_speed_duplex = t3_set_phy_speed_duplex,
295 .set_speed_duplex = mv88e1xxx_set_speed_duplex,
287 .get_link_status = mv88e1xxx_get_link_status,
288 .power_down = mv88e1xxx_power_down,
289};
290#endif
291
296 .get_link_status = mv88e1xxx_get_link_status,
297 .power_down = mv88e1xxx_power_down,
298};
299#endif
300
292void t3_mv88e1xxx_phy_prep(struct cphy *phy, adapter_t *adapter, int phy_addr,
301int t3_mv88e1xxx_phy_prep(struct cphy *phy, adapter_t *adapter, int phy_addr,
293 const struct mdio_ops *mdio_ops)
294{
302 const struct mdio_ops *mdio_ops)
303{
295 cphy_init(phy, adapter, phy_addr, &mv88e1xxx_ops, mdio_ops);
304 int err;
296
305
306 cphy_init(phy, adapter, phy_addr, &mv88e1xxx_ops, mdio_ops,
307 SUPPORTED_10baseT_Full | SUPPORTED_100baseT_Full |
308 SUPPORTED_1000baseT_Full | SUPPORTED_Autoneg | SUPPORTED_MII |
309 SUPPORTED_TP | SUPPORTED_IRQ, "10/100/1000BASE-T");
310
297 /* Configure copper PHY transmitter as class A to reduce EMI. */
311 /* Configure copper PHY transmitter as class A to reduce EMI. */
298 mdio_write(phy, 0, MV88E1XXX_EXTENDED_ADDR, 0xb);
299 mdio_write(phy, 0, MV88E1XXX_EXTENDED_DATA, 0x8004);
300
301 mv88e1xxx_downshift_set(phy, 1); /* Enable downshift */
312 err = mdio_write(phy, 0, MV88E1XXX_EXTENDED_ADDR, 0xb);
313
314 if (!err)
315 err = mdio_write(phy, 0, MV88E1XXX_EXTENDED_DATA, 0x8004);
316 if (!err)
317 err = mv88e1xxx_downshift_set(phy, 1); /* Enable downshift */
318 return err;
302}
319}