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cxgb_mc5.c (176472) cxgb_mc5.c (180583)
1/**************************************************************************
2
3Copyright (c) 2007, Chelsio Inc.
4All rights reserved.
5
6Redistribution and use in source and binary forms, with or without
7modification, are permitted provided that the following conditions are met:
8

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23INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
24CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
25ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
26POSSIBILITY OF SUCH DAMAGE.
27
28***************************************************************************/
29
30#include <sys/cdefs.h>
1/**************************************************************************
2
3Copyright (c) 2007, Chelsio Inc.
4All rights reserved.
5
6Redistribution and use in source and binary forms, with or without
7modification, are permitted provided that the following conditions are met:
8

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23INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
24CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
25ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
26POSSIBILITY OF SUCH DAMAGE.
27
28***************************************************************************/
29
30#include <sys/cdefs.h>
31__FBSDID("$FreeBSD: head/sys/dev/cxgb/common/cxgb_mc5.c 176472 2008-02-23 01:06:17Z kmacy $");
31__FBSDID("$FreeBSD: head/sys/dev/cxgb/common/cxgb_mc5.c 180583 2008-07-18 06:12:31Z kmacy $");
32
33#ifdef CONFIG_DEFINED
34#include <common/cxgb_common.h>
35#include <common/cxgb_regs.h>
36#else
37#include <dev/cxgb/common/cxgb_common.h>
38#include <dev/cxgb/common/cxgb_regs.h>
39#endif

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321
322/* Put MC5 in M-Bus mode. */
323static void mc5_dbgi_mode_disable(const struct mc5 *mc5)
324{
325 t3_set_reg_field(mc5->adapter, A_MC5_DB_CONFIG, F_DBGIEN,
326 V_PRTYEN(mc5->parity_enabled) | F_MBUSEN);
327}
328
32
33#ifdef CONFIG_DEFINED
34#include <common/cxgb_common.h>
35#include <common/cxgb_regs.h>
36#else
37#include <dev/cxgb/common/cxgb_common.h>
38#include <dev/cxgb/common/cxgb_regs.h>
39#endif

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321
322/* Put MC5 in M-Bus mode. */
323static void mc5_dbgi_mode_disable(const struct mc5 *mc5)
324{
325 t3_set_reg_field(mc5->adapter, A_MC5_DB_CONFIG, F_DBGIEN,
326 V_PRTYEN(mc5->parity_enabled) | F_MBUSEN);
327}
328
329/*
330 * Initialization that requires the OS and protocol layers to already
331 * be intialized goes here.
329/**
330 * t3_mc5_init - initialize MC5 and the TCAM
331 * @mc5: the MC5 handle
332 * @nservers: desired number the TCP servers (listening ports)
333 * @nfilters: desired number of HW filters (classifiers)
334 * @nroutes: desired number of routes
335 *
336 * Initialize MC5 and the TCAM and partition the TCAM for the requested
337 * number of servers, filters, and routes. The number of routes is
338 * typically 0 except for specialized uses of the T3 adapters.
332 */
333int t3_mc5_init(struct mc5 *mc5, unsigned int nservers, unsigned int nfilters,
334 unsigned int nroutes)
335{
336 int err;
337 unsigned int tcam_size = mc5->tcam_size;
338 unsigned int mode72 = mc5->mode == MC5_MODE_72_BIT;
339 adapter_t *adap = mc5->adapter;
340
341 if (!tcam_size)
342 return 0;
343
344 if (nroutes > MAX_ROUTES || nroutes + nservers + nfilters > tcam_size)
345 return -EINVAL;
346
339 */
340int t3_mc5_init(struct mc5 *mc5, unsigned int nservers, unsigned int nfilters,
341 unsigned int nroutes)
342{
343 int err;
344 unsigned int tcam_size = mc5->tcam_size;
345 unsigned int mode72 = mc5->mode == MC5_MODE_72_BIT;
346 adapter_t *adap = mc5->adapter;
347
348 if (!tcam_size)
349 return 0;
350
351 if (nroutes > MAX_ROUTES || nroutes + nservers + nfilters > tcam_size)
352 return -EINVAL;
353
347 if (nfilters && adap->params.rev < T3_REV_C)
354 if (nfilters)
348 mc5->parity_enabled = 0;
349
350 /* Reset the TCAM */
351 t3_set_reg_field(adap, A_MC5_DB_CONFIG, F_TMMODE | F_COMPEN,
352 V_COMPEN(mode72) | V_TMMODE(mode72) | F_TMRST);
353 if (t3_wait_op_done(adap, A_MC5_DB_CONFIG, F_TMRDY, 1, 500, 0)) {
354 CH_ERR(adap, "TCAM reset timed out\n");
355 return -1;

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415 err = -EIO;
416 break;
417 }
418 dbgi_rd_rsp3(adap, buf + 2, buf + 1, buf);
419 buf += 3;
420 }
421
422 mc5_dbgi_mode_disable(mc5);
355 mc5->parity_enabled = 0;
356
357 /* Reset the TCAM */
358 t3_set_reg_field(adap, A_MC5_DB_CONFIG, F_TMMODE | F_COMPEN,
359 V_COMPEN(mode72) | V_TMMODE(mode72) | F_TMRST);
360 if (t3_wait_op_done(adap, A_MC5_DB_CONFIG, F_TMRDY, 1, 500, 0)) {
361 CH_ERR(adap, "TCAM reset timed out\n");
362 return -1;

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422 err = -EIO;
423 break;
424 }
425 dbgi_rd_rsp3(adap, buf + 2, buf + 1, buf);
426 buf += 3;
427 }
428
429 mc5_dbgi_mode_disable(mc5);
423 return 0;
430 return err;
424}
425
426#define MC5_INT_FATAL (F_PARITYERR | F_REQQPARERR | F_DISPQPARERR)
427
428/**
429 * t3_mc5_intr_handler - MC5 interrupt handler
430 * @mc5: the MC5 handle
431 *

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460 if (cause & F_DELACTEMPTY)
461 mc5->stats.del_act_empty++;
462 if (cause & MC5_INT_FATAL)
463 t3_fatal_err(adap);
464
465 t3_write_reg(adap, A_MC5_DB_INT_CAUSE, cause);
466}
467
431}
432
433#define MC5_INT_FATAL (F_PARITYERR | F_REQQPARERR | F_DISPQPARERR)
434
435/**
436 * t3_mc5_intr_handler - MC5 interrupt handler
437 * @mc5: the MC5 handle
438 *

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467 if (cause & F_DELACTEMPTY)
468 mc5->stats.del_act_empty++;
469 if (cause & MC5_INT_FATAL)
470 t3_fatal_err(adap);
471
472 t3_write_reg(adap, A_MC5_DB_INT_CAUSE, cause);
473}
474
468
469/**
470 * t3_mc5_prep - initialize the SW state for MC5
471 * @adapter: the adapter
472 * @mc5: the MC5 handle
473 * @mode: whether the TCAM will be in 72- or 144-bit mode
474 *
475 * Initialize the SW state associated with MC5. Among other things
476 * this determines the size of the attached TCAM.

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475/**
476 * t3_mc5_prep - initialize the SW state for MC5
477 * @adapter: the adapter
478 * @mc5: the MC5 handle
479 * @mode: whether the TCAM will be in 72- or 144-bit mode
480 *
481 * Initialize the SW state associated with MC5. Among other things
482 * this determines the size of the attached TCAM.

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