cxgb_mc5.c (171471) | cxgb_mc5.c (176472) |
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1/************************************************************************** 2 3Copyright (c) 2007, Chelsio Inc. 4All rights reserved. 5 6Redistribution and use in source and binary forms, with or without 7modification, are permitted provided that the following conditions are met: 8 --- 14 unchanged lines hidden (view full) --- 23INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 24CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 25ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 26POSSIBILITY OF SUCH DAMAGE. 27 28***************************************************************************/ 29 30#include <sys/cdefs.h> | 1/************************************************************************** 2 3Copyright (c) 2007, Chelsio Inc. 4All rights reserved. 5 6Redistribution and use in source and binary forms, with or without 7modification, are permitted provided that the following conditions are met: 8 --- 14 unchanged lines hidden (view full) --- 23INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 24CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 25ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 26POSSIBILITY OF SUCH DAMAGE. 27 28***************************************************************************/ 29 30#include <sys/cdefs.h> |
31__FBSDID("$FreeBSD: head/sys/dev/cxgb/common/cxgb_mc5.c 171471 2007-07-17 06:50:35Z kmacy $"); | 31__FBSDID("$FreeBSD: head/sys/dev/cxgb/common/cxgb_mc5.c 176472 2008-02-23 01:06:17Z kmacy $"); |
32 33#ifdef CONFIG_DEFINED 34#include <common/cxgb_common.h> 35#include <common/cxgb_regs.h> 36#else 37#include <dev/cxgb/common/cxgb_common.h> 38#include <dev/cxgb/common/cxgb_regs.h> 39#endif --- 339 unchanged lines hidden (view full) --- 379 err = -EINVAL; 380 break; 381 } 382 383 mc5_dbgi_mode_disable(mc5); 384 return err; 385} 386 | 32 33#ifdef CONFIG_DEFINED 34#include <common/cxgb_common.h> 35#include <common/cxgb_regs.h> 36#else 37#include <dev/cxgb/common/cxgb_common.h> 38#include <dev/cxgb/common/cxgb_regs.h> 39#endif --- 339 unchanged lines hidden (view full) --- 379 err = -EINVAL; 380 break; 381 } 382 383 mc5_dbgi_mode_disable(mc5); 384 return err; 385} 386 |
387/* | 387/** |
388 * read_mc5_range - dump a part of the memory managed by MC5 389 * @mc5: the MC5 handle 390 * @start: the start address for the dump 391 * @n: number of 72-bit words to read 392 * @buf: result buffer 393 * 394 * Read n 72-bit words from MC5 memory from the given start location. 395 */ --- 24 unchanged lines hidden (view full) --- 420 } 421 422 mc5_dbgi_mode_disable(mc5); 423 return 0; 424} 425 426#define MC5_INT_FATAL (F_PARITYERR | F_REQQPARERR | F_DISPQPARERR) 427 | 388 * read_mc5_range - dump a part of the memory managed by MC5 389 * @mc5: the MC5 handle 390 * @start: the start address for the dump 391 * @n: number of 72-bit words to read 392 * @buf: result buffer 393 * 394 * Read n 72-bit words from MC5 memory from the given start location. 395 */ --- 24 unchanged lines hidden (view full) --- 420 } 421 422 mc5_dbgi_mode_disable(mc5); 423 return 0; 424} 425 426#define MC5_INT_FATAL (F_PARITYERR | F_REQQPARERR | F_DISPQPARERR) 427 |
428/* 429 * MC5 interrupt handler | 428/** 429 * t3_mc5_intr_handler - MC5 interrupt handler 430 * @mc5: the MC5 handle 431 * 432 * The MC5 interrupt handler. |
430 */ 431void t3_mc5_intr_handler(struct mc5 *mc5) 432{ 433 adapter_t *adap = mc5->adapter; 434 u32 cause = t3_read_reg(adap, A_MC5_DB_INT_CAUSE); 435 436 if ((cause & F_PARITYERR) && mc5->parity_enabled) { 437 CH_ALERT(adap, "MC5 parity error\n"); --- 19 unchanged lines hidden (view full) --- 457 if (cause & F_DELACTEMPTY) 458 mc5->stats.del_act_empty++; 459 if (cause & MC5_INT_FATAL) 460 t3_fatal_err(adap); 461 462 t3_write_reg(adap, A_MC5_DB_INT_CAUSE, cause); 463} 464 | 433 */ 434void t3_mc5_intr_handler(struct mc5 *mc5) 435{ 436 adapter_t *adap = mc5->adapter; 437 u32 cause = t3_read_reg(adap, A_MC5_DB_INT_CAUSE); 438 439 if ((cause & F_PARITYERR) && mc5->parity_enabled) { 440 CH_ALERT(adap, "MC5 parity error\n"); --- 19 unchanged lines hidden (view full) --- 460 if (cause & F_DELACTEMPTY) 461 mc5->stats.del_act_empty++; 462 if (cause & MC5_INT_FATAL) 463 t3_fatal_err(adap); 464 465 t3_write_reg(adap, A_MC5_DB_INT_CAUSE, cause); 466} 467 |
468 469/** 470 * t3_mc5_prep - initialize the SW state for MC5 471 * @adapter: the adapter 472 * @mc5: the MC5 handle 473 * @mode: whether the TCAM will be in 72- or 144-bit mode 474 * 475 * Initialize the SW state associated with MC5. Among other things 476 * this determines the size of the attached TCAM. 477 */ |
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465void __devinit t3_mc5_prep(adapter_t *adapter, struct mc5 *mc5, int mode) 466{ 467#define K * 1024 468 469 static unsigned int tcam_part_size[] = { /* in K 72-bit entries */ 470 64 K, 128 K, 256 K, 32 K 471 }; 472 --- 15 unchanged lines hidden --- | 478void __devinit t3_mc5_prep(adapter_t *adapter, struct mc5 *mc5, int mode) 479{ 480#define K * 1024 481 482 static unsigned int tcam_part_size[] = { /* in K 72-bit entries */ 483 64 K, 128 K, 256 K, 32 K 484 }; 485 --- 15 unchanged lines hidden --- |