| if_bgereg.h (92934) | if_bgereg.h (93751) |
|---|---|
| 1/* 2 * Copyright (c) 2001 Wind River Systems 3 * Copyright (c) 1997, 1998, 1999, 2001 4 * Bill Paul <wpaul@windriver.com>. All rights reserved. 5 * 6 * Redistribution and use in source and binary forms, with or without 7 * modification, are permitted provided that the following conditions 8 * are met: --- 16 unchanged lines hidden (view full) --- 25 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 26 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 27 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 28 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 29 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 30 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF 31 * THE POSSIBILITY OF SUCH DAMAGE. 32 * | 1/* 2 * Copyright (c) 2001 Wind River Systems 3 * Copyright (c) 1997, 1998, 1999, 2001 4 * Bill Paul <wpaul@windriver.com>. All rights reserved. 5 * 6 * Redistribution and use in source and binary forms, with or without 7 * modification, are permitted provided that the following conditions 8 * are met: --- 16 unchanged lines hidden (view full) --- 25 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 26 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 27 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 28 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 29 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 30 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF 31 * THE POSSIBILITY OF SUCH DAMAGE. 32 * |
| 33 * $FreeBSD: head/sys/dev/bge/if_bgereg.h 92934 2002-03-22 06:45:40Z wpaul $ | 33 * $FreeBSD: head/sys/dev/bge/if_bgereg.h 93751 2002-04-04 06:01:31Z wpaul $ |
| 34 */ 35 36/* 37 * BCM570x memory map. The internal memory layout varies somewhat 38 * depending on whether or not we have external SSRAM attached. 39 * The BCM5700 can have up to 16MB of external memory. The BCM5701 40 * is apparently not designed to use external SSRAM. The mappings 41 * up to the first 4 send rings are the same for both internal and --- 175 unchanged lines hidden (view full) --- 217#define BGE_ASICREV_BCM5700_B2 0x71030000 218#define BGE_ASICREV_BCM5700_ALTIMA 0x71040000 219#define BGE_ASICREV_BCM5700_C0 0x72000000 220#define BGE_ASICREV_BCM5701_A0 0x00000000 /* grrrr */ 221#define BGE_ASICREV_BCM5701_B0 0x01000000 222#define BGE_ASICREV_BCM5701_B2 0x01020000 223#define BGE_ASICREV_BCM5701_B5 0x01050000 224 | 34 */ 35 36/* 37 * BCM570x memory map. The internal memory layout varies somewhat 38 * depending on whether or not we have external SSRAM attached. 39 * The BCM5700 can have up to 16MB of external memory. The BCM5701 40 * is apparently not designed to use external SSRAM. The mappings 41 * up to the first 4 send rings are the same for both internal and --- 175 unchanged lines hidden (view full) --- 217#define BGE_ASICREV_BCM5700_B2 0x71030000 218#define BGE_ASICREV_BCM5700_ALTIMA 0x71040000 219#define BGE_ASICREV_BCM5700_C0 0x72000000 220#define BGE_ASICREV_BCM5701_A0 0x00000000 /* grrrr */ 221#define BGE_ASICREV_BCM5701_B0 0x01000000 222#define BGE_ASICREV_BCM5701_B2 0x01020000 223#define BGE_ASICREV_BCM5701_B5 0x01050000 224 |
| 225/* shorthand one */ 226#define BGE_ASICREV_BCM5700 0x71000000 227 |
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| 225/* PCI DMA Read/Write Control register */ 226#define BGE_PCIDMARWCTL_MINDMA 0x000000FF 227#define BGE_PCIDMARWCTL_RDADRR_BNDRY 0x00000700 228#define BGE_PCIDMARWCTL_WRADDR_BNDRY 0x00003800 229#define BGE_PCIDMARWCTL_ONEDMA_ATONCE 0x00004000 230#define BGE_PCIDMARWCTL_RD_WAT 0x00070000 231#define BGE_PCIDMARWCTL_WR_WAT 0x00380000 232#define BGE_PCIDMARWCTL_USE_MRM 0x00400000 --- 1577 unchanged lines hidden (view full) --- 1810#define ALTIMA_DEVICE_AC1000 0x03e8 1811 1812/* 1813 * Offset of MAC address inside EEPROM. 1814 */ 1815#define BGE_EE_MAC_OFFSET 0x7C 1816#define BGE_EE_HWCFG_OFFSET 0xC8 1817 | 228/* PCI DMA Read/Write Control register */ 229#define BGE_PCIDMARWCTL_MINDMA 0x000000FF 230#define BGE_PCIDMARWCTL_RDADRR_BNDRY 0x00000700 231#define BGE_PCIDMARWCTL_WRADDR_BNDRY 0x00003800 232#define BGE_PCIDMARWCTL_ONEDMA_ATONCE 0x00004000 233#define BGE_PCIDMARWCTL_RD_WAT 0x00070000 234#define BGE_PCIDMARWCTL_WR_WAT 0x00380000 235#define BGE_PCIDMARWCTL_USE_MRM 0x00400000 --- 1577 unchanged lines hidden (view full) --- 1813#define ALTIMA_DEVICE_AC1000 0x03e8 1814 1815/* 1816 * Offset of MAC address inside EEPROM. 1817 */ 1818#define BGE_EE_MAC_OFFSET 0x7C 1819#define BGE_EE_HWCFG_OFFSET 0xC8 1820 |
| 1821#define BGE_HWCFG_VOLTAGE 0x00000003 1822#define BGE_HWCFG_PHYLED_MODE 0x0000000C 1823#define BGE_HWCFG_MEDIA 0x00000030 1824 1825#define BGE_VOLTAGE_1POINT3 0x00000000 1826#define BGE_VOLTAGE_1POINT8 0x00000001 1827 1828#define BGE_PHYLEDMODE_UNSPEC 0x00000000 1829#define BGE_PHYLEDMODE_TRIPLELED 0x00000004 1830#define BGE_PHYLEDMODE_SINGLELED 0x00000008 1831 1832#define BGE_MEDIA_UNSPEC 0x00000000 1833#define BGE_MEDIA_COPPER 0x00000010 1834#define BGE_MEDIA_FIBER 0x00000020 1835 |
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| 1818#define BGE_PCI_READ_CMD 0x06000000 1819#define BGE_PCI_WRITE_CMD 0x70000000 1820 1821#define BGE_TICKS_PER_SEC 1000000 1822 1823/* 1824 * Ring size constants. 1825 */ --- 318 unchanged lines hidden --- | 1836#define BGE_PCI_READ_CMD 0x06000000 1837#define BGE_PCI_WRITE_CMD 0x70000000 1838 1839#define BGE_TICKS_PER_SEC 1000000 1840 1841/* 1842 * Ring size constants. 1843 */ --- 318 unchanged lines hidden --- |