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1/*-
2 * Copyright (c) 2001 Wind River Systems
3 * Copyright (c) 1997, 1998, 1999, 2001
4 * Bill Paul <wpaul@windriver.com>. All rights reserved.
5 *
6 * Redistribution and use in source and binary forms, with or without
7 * modification, are permitted provided that the following conditions
8 * are met:

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27 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
28 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
29 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
30 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF
31 * THE POSSIBILITY OF SUCH DAMAGE.
32 */
33
34#include <sys/cdefs.h>
35__FBSDID("$FreeBSD: head/sys/dev/bge/if_bge.c 153239 2005-12-08 16:11:45Z glebius $");
36
37/*
38 * Broadcom BCM570x family gigabit ethernet driver for FreeBSD.
39 *
40 * The Broadcom BCM5700 is based on technology originally developed by
41 * Alteon Networks as part of the Tigon I and Tigon II gigabit ethernet
42 * MAC chips. The BCM5700, sometimes refered to as the Tigon III, has
43 * two on-board MIPS R4000 CPUs and can have as much as 16MB of external

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74#include <sys/endian.h>
75#include <sys/systm.h>
76#include <sys/sockio.h>
77#include <sys/mbuf.h>
78#include <sys/malloc.h>
79#include <sys/kernel.h>
80#include <sys/module.h>
81#include <sys/socket.h>
82
83#include <net/if.h>
84#include <net/if_arp.h>
85#include <net/ethernet.h>
86#include <net/if_dl.h>
87#include <net/if_media.h>
88
89#include <net/bpf.h>

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231static void bge_ifmedia_sts (struct ifnet *, struct ifmediareq *);
232
233static u_int8_t bge_eeprom_getbyte (struct bge_softc *, int, u_int8_t *);
234static int bge_read_eeprom (struct bge_softc *, caddr_t, int, int);
235
236static void bge_setmulti (struct bge_softc *);
237
238static void bge_handle_events (struct bge_softc *);
239static int bge_newbuf_std (struct bge_softc *, int, struct mbuf *);
240static int bge_newbuf_jumbo (struct bge_softc *, int, struct mbuf *);
241static int bge_init_rx_ring_std (struct bge_softc *);
242static void bge_free_rx_ring_std (struct bge_softc *);
243static int bge_init_rx_ring_jumbo (struct bge_softc *);
244static void bge_free_rx_ring_jumbo (struct bge_softc *);
245static void bge_free_tx_ring (struct bge_softc *);
246static int bge_init_tx_ring (struct bge_softc *);

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438
439 d->bge_flags |= htole16(BGE_TXBDFLAG_END);
440 ctx->bge_maxsegs = nseg;
441 ctx->bge_idx = idx;
442
443 return;
444}
445
446#ifdef notdef
447static u_int8_t
448bge_vpd_readbyte(sc, addr)
449 struct bge_softc *sc;
450 int addr;
451{
452 int i;
453 device_t dev;

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736bge_handle_events(sc)
737 struct bge_softc *sc;
738{
739
740 return;
741}
742
743/*
744 * Intialize a standard receive ring descriptor.
745 */
746static int
747bge_newbuf_std(sc, i, m)
748 struct bge_softc *sc;
749 int i;
750 struct mbuf *m;
751{

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806 * a jumbo buffer from the pool managed internally by the driver.
807 */
808static int
809bge_newbuf_jumbo(sc, i, m)
810 struct bge_softc *sc;
811 int i;
812 struct mbuf *m;
813{
814 bus_dma_segment_t segs[BGE_NSEG_JUMBO];
815 struct bge_extrx_bd *r;
816 struct mbuf *m_new = NULL;
817 int nsegs;
818 int error;
819
820 if (m == NULL) {
821 MGETHDR(m_new, M_DONTWAIT, MT_DATA);
822 if (m_new == NULL)
823 return(ENOBUFS);
824
825 m_cljget(m_new, M_DONTWAIT, MJUM9BYTES);
826 if (!(m_new->m_flags & M_EXT)) {
827 m_freem(m_new);
828 return(ENOBUFS);
829 }
830 m_new->m_len = m_new->m_pkthdr.len = MJUM9BYTES;
831 } else {
832 m_new = m;
833 m_new->m_len = m_new->m_pkthdr.len = MJUM9BYTES;
834 m_new->m_data = m_new->m_ext.ext_buf;
835 }
836
837 if (!sc->bge_rx_alignment_bug)
838 m_adj(m_new, ETHER_ALIGN);
839
840 error = bus_dmamap_load_mbuf_sg(sc->bge_cdata.bge_mtag_jumbo,
841 sc->bge_cdata.bge_rx_jumbo_dmamap[i],
842 m_new, segs, &nsegs, BUS_DMA_NOWAIT);
843 if (error) {
844 if (m == NULL)
845 m_freem(m_new);
846 return(error);
847 }
848 KASSERT(nsegs == BGE_NSEG_JUMBO, ("%s: %d segments", __func__, nsegs));
849
850 sc->bge_cdata.bge_rx_jumbo_chain[i] = m_new;
851
852 /*
853 * Fill in the extended RX buffer descriptor.
854 */
855 r = &sc->bge_ldata.bge_rx_jumbo_ring[i];
856 r->bge_addr0.bge_addr_lo = htole32(BGE_ADDR_LO(segs[0].ds_addr));
857 r->bge_addr0.bge_addr_hi = htole32(BGE_ADDR_HI(segs[0].ds_addr));
858 r->bge_len0 = htole16(segs[0].ds_len);
859 r->bge_addr1.bge_addr_lo = htole32(BGE_ADDR_LO(segs[1].ds_addr));
860 r->bge_addr1.bge_addr_hi = htole32(BGE_ADDR_HI(segs[1].ds_addr));
861 r->bge_len1 = htole16(segs[1].ds_len);
862 r->bge_addr2.bge_addr_lo = htole32(BGE_ADDR_LO(segs[2].ds_addr));
863 r->bge_addr2.bge_addr_hi = htole32(BGE_ADDR_HI(segs[2].ds_addr));
864 r->bge_len2 = htole16(segs[2].ds_len);
865 r->bge_len3 = htole16(0);
866 r->bge_flags = htole16(BGE_RXBDFLAG_JUMBO_RING|BGE_RXBDFLAG_END);
867 r->bge_idx = htole16(i);
868
869 bus_dmamap_sync(sc->bge_cdata.bge_mtag,
870 sc->bge_cdata.bge_rx_jumbo_dmamap[i],
871 BUS_DMASYNC_PREREAD);
872
873 return (0);
874}
875
876/*
877 * The standard receive ring has 512 entries in it. At 2K per mbuf cluster,
878 * that's 1MB or memory, which is a lot. For now, we fill only the first
879 * 256 ring entries and hope that our CPU is fast enough to keep up with
880 * the NIC.
881 */

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919
920 return;
921}
922
923static int
924bge_init_rx_ring_jumbo(sc)
925 struct bge_softc *sc;
926{
927 struct bge_rcb *rcb;
928 int i;
929
930 for (i = 0; i < BGE_JUMBO_RX_RING_CNT; i++) {
931 if (bge_newbuf_jumbo(sc, i, NULL) == ENOBUFS)
932 return(ENOBUFS);
933 };
934
935 bus_dmamap_sync(sc->bge_cdata.bge_rx_jumbo_ring_tag,
936 sc->bge_cdata.bge_rx_jumbo_ring_map,
937 BUS_DMASYNC_PREREAD|BUS_DMASYNC_PREWRITE);
938
939 sc->bge_jumbo = i - 1;
940
941 rcb = &sc->bge_ldata.bge_info.bge_jumbo_rx_rcb;
942 rcb->bge_maxlen_flags = BGE_RCB_MAXLEN_FLAGS(0,
943 BGE_RCB_FLAG_USE_EXT_RX_BD);
944 CSR_WRITE_4(sc, BGE_RX_JUMBO_RCB_MAXLEN_FLAGS, rcb->bge_maxlen_flags);
945
946 CSR_WRITE_4(sc, BGE_MBX_RX_JUMBO_PROD_LO, sc->bge_jumbo);
947
948 return(0);
949}
950
951static void

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957 for (i = 0; i < BGE_JUMBO_RX_RING_CNT; i++) {
958 if (sc->bge_cdata.bge_rx_jumbo_chain[i] != NULL) {
959 m_freem(sc->bge_cdata.bge_rx_jumbo_chain[i]);
960 sc->bge_cdata.bge_rx_jumbo_chain[i] = NULL;
961 bus_dmamap_unload(sc->bge_cdata.bge_mtag_jumbo,
962 sc->bge_cdata.bge_rx_jumbo_dmamap[i]);
963 }
964 bzero((char *)&sc->bge_ldata.bge_rx_jumbo_ring[i],
965 sizeof(struct bge_extrx_bd));
966 }
967
968 return;
969}
970
971static void
972bge_free_tx_ring(sc)
973 struct bge_softc *sc;

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1308
1309 rcb->bge_hostaddr.bge_addr_lo =
1310 BGE_ADDR_LO(sc->bge_ldata.bge_rx_jumbo_ring_paddr);
1311 rcb->bge_hostaddr.bge_addr_hi =
1312 BGE_ADDR_HI(sc->bge_ldata.bge_rx_jumbo_ring_paddr);
1313 bus_dmamap_sync(sc->bge_cdata.bge_rx_jumbo_ring_tag,
1314 sc->bge_cdata.bge_rx_jumbo_ring_map,
1315 BUS_DMASYNC_PREREAD);
1316 rcb->bge_maxlen_flags = BGE_RCB_MAXLEN_FLAGS(0,
1317 BGE_RCB_FLAG_USE_EXT_RX_BD|BGE_RCB_FLAG_RING_DISABLED);
1318 if (sc->bge_extram)
1319 rcb->bge_nicaddr = BGE_EXT_JUMBO_RX_RINGS;
1320 else
1321 rcb->bge_nicaddr = BGE_JUMBO_RX_RINGS;
1322 CSR_WRITE_4(sc, BGE_RX_JUMBO_RCB_HADDR_HI,
1323 rcb->bge_hostaddr.bge_addr_hi);
1324 CSR_WRITE_4(sc, BGE_RX_JUMBO_RCB_HADDR_LO,
1325 rcb->bge_hostaddr.bge_addr_lo);

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1780 return;
1781}
1782
1783static int
1784bge_dma_alloc(dev)
1785 device_t dev;
1786{
1787 struct bge_softc *sc;
1788 int i, error;
1789 struct bge_dmamap_arg ctx;
1790
1791 sc = device_get_softc(dev);
1792
1793 /*
1794 * Allocate the parent bus DMA tag appropriate for PCI.
1795 */
1796 error = bus_dma_tag_create(NULL, /* parent */
1797 PAGE_SIZE, 0, /* alignment, boundary */
1798 BUS_SPACE_MAXADDR, /* lowaddr */
1799 BUS_SPACE_MAXADDR, /* highaddr */
1800 NULL, NULL, /* filter, filterarg */
1801 MAXBSIZE, BGE_NSEG_NEW, /* maxsize, nsegments */
1802 BUS_SPACE_MAXSIZE_32BIT,/* maxsegsize */
1803 0, /* flags */
1804 NULL, NULL, /* lockfunc, lockarg */
1805 &sc->bge_cdata.bge_parent_tag);
1806
1807 /*
1808 * Create tag for RX mbufs.
1809 */
1810 error = bus_dma_tag_create(sc->bge_cdata.bge_parent_tag, 1,
1811 0, BUS_SPACE_MAXADDR, BUS_SPACE_MAXADDR, NULL,
1812 NULL, MCLBYTES * BGE_NSEG_NEW, BGE_NSEG_NEW, MCLBYTES,
1813 BUS_DMA_ALLOCNOW, NULL, NULL, &sc->bge_cdata.bge_mtag);
1814
1815 if (error) {
1816 device_printf(dev, "could not allocate dma tag\n");
1817 return (ENOMEM);
1818 }
1819
1820 /* Create DMA maps for RX buffers */
1821

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1892 * a single segment. I think eventually the driver should
1893 * be changed so that it uses ordinary mbufs and cluster
1894 * buffers, i.e. jumbo frames can span multiple DMA
1895 * descriptors. But that's a project for another day.
1896 */
1897
1898 error = bus_dma_tag_create(sc->bge_cdata.bge_parent_tag,
1899 1, 0, BUS_SPACE_MAXADDR, BUS_SPACE_MAXADDR, NULL,
1900 NULL, MJUM9BYTES, BGE_NSEG_JUMBO, PAGE_SIZE,
1901 0, NULL, NULL, &sc->bge_cdata.bge_mtag_jumbo);
1902
1903 if (error) {
1904 device_printf(dev, "could not allocate dma tag\n");
1905 return (ENOMEM);
1906 }
1907
1908 /* Create tag for jumbo RX ring */
1909 error = bus_dma_tag_create(sc->bge_cdata.bge_parent_tag,
1910 PAGE_SIZE, 0, BUS_SPACE_MAXADDR, BUS_SPACE_MAXADDR, NULL,
1911 NULL, BGE_JUMBO_RX_RING_SZ, 1, BGE_JUMBO_RX_RING_SZ, 0,
1912 NULL, NULL, &sc->bge_cdata.bge_rx_jumbo_ring_tag);
1913
1914 if (error) {
1915 device_printf(dev, "could not allocate dma tag\n");
1916 return (ENOMEM);
1917 }
1918
1919 /* Allocate DMA'able memory for jumbo RX ring */
1920 error = bus_dmamem_alloc(sc->bge_cdata.bge_rx_jumbo_ring_tag,
1921 (void **)&sc->bge_ldata.bge_rx_jumbo_ring,
1922 BUS_DMA_NOWAIT | BUS_DMA_ZERO,
1923 &sc->bge_cdata.bge_rx_jumbo_ring_map);
1924 if (error)
1925 return (ENOMEM);
1926
1927 /* Load the address of the jumbo RX ring */
1928 ctx.bge_maxsegs = 1;
1929 ctx.sc = sc;
1930
1931 error = bus_dmamap_load(sc->bge_cdata.bge_rx_jumbo_ring_tag,
1932 sc->bge_cdata.bge_rx_jumbo_ring_map,
1933 sc->bge_ldata.bge_rx_jumbo_ring, BGE_JUMBO_RX_RING_SZ,
1934 bge_dma_map_addr, &ctx, BUS_DMA_NOWAIT);
1935

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2223 if (bge_dma_alloc(dev)) {
2224 printf ("bge%d: failed to allocate DMA resources\n",
2225 sc->bge_unit);
2226 bge_release_resources(sc);
2227 error = ENXIO;
2228 goto fail;
2229 }
2230
2231 /* Set default tuneable values. */
2232 sc->bge_stat_ticks = BGE_TICKS_PER_SEC;
2233 sc->bge_rx_coal_ticks = 150;
2234 sc->bge_tx_coal_ticks = 150;
2235 sc->bge_rx_max_coal_bds = 64;
2236 sc->bge_tx_max_coal_bds = 128;
2237
2238 /* Set up ifnet structure */

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2299 } else {
2300 /*
2301 * Do transceiver setup.
2302 */
2303 if (mii_phy_probe(dev, &sc->bge_miibus,
2304 bge_ifmedia_upd, bge_ifmedia_sts)) {
2305 printf("bge%d: MII without any PHY!\n", sc->bge_unit);
2306 bge_release_resources(sc);
2307 error = ENXIO;
2308 goto fail;
2309 }
2310 }
2311
2312 /*
2313 * When using the BCM5701 in PCI-X mode, data corruption has
2314 * been observed in the first few bytes of some received packets.

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2376 if (sc->bge_tbi) {
2377 ifmedia_removeall(&sc->bge_ifmedia);
2378 } else {
2379 bus_generic_detach(dev);
2380 device_delete_child(dev, sc->bge_miibus);
2381 }
2382
2383 bge_release_resources(sc);
2384
2385 return(0);
2386}
2387
2388static void
2389bge_release_resources(sc)
2390 struct bge_softc *sc;
2391{

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2550 return;
2551}
2552
2553/*
2554 * Frame reception handling. This is called if there's a frame
2555 * on the receive return list.
2556 *
2557 * Note: we have to be able to handle two possibilities here:
2558 * 1) the frame is from the jumbo receive ring
2559 * 2) the frame is from the standard receive ring
2560 */
2561
2562static void
2563bge_rxeof(sc)
2564 struct bge_softc *sc;
2565{
2566 struct ifnet *ifp;

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