| if_athvar.h (140432) | if_athvar.h (140438) |
|---|---|
| 1/*- 2 * Copyright (c) 2002-2005 Sam Leffler, Errno Consulting 3 * All rights reserved. 4 * 5 * Redistribution and use in source and binary forms, with or without 6 * modification, are permitted provided that the following conditions 7 * are met: 8 * 1. Redistributions of source code must retain the above copyright --- 19 unchanged lines hidden (view full) --- 28 * THE COPYRIGHT HOLDERS OR CONTRIBUTORS BE LIABLE FOR SPECIAL, EXEMPLARY, 29 * OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 30 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 31 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER 32 * IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 33 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF 34 * THE POSSIBILITY OF SUCH DAMAGES. 35 * | 1/*- 2 * Copyright (c) 2002-2005 Sam Leffler, Errno Consulting 3 * All rights reserved. 4 * 5 * Redistribution and use in source and binary forms, with or without 6 * modification, are permitted provided that the following conditions 7 * are met: 8 * 1. Redistributions of source code must retain the above copyright --- 19 unchanged lines hidden (view full) --- 28 * THE COPYRIGHT HOLDERS OR CONTRIBUTORS BE LIABLE FOR SPECIAL, EXEMPLARY, 29 * OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 30 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 31 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER 32 * IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 33 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF 34 * THE POSSIBILITY OF SUCH DAMAGES. 35 * |
| 36 * $FreeBSD: head/sys/dev/ath/if_athvar.h 140432 2005-01-18 19:03:04Z sam $ | 36 * $FreeBSD: head/sys/dev/ath/if_athvar.h 140438 2005-01-18 19:42:17Z sam $ |
| 37 */ 38 39/* 40 * Defintions for the Atheros Wireless LAN controller driver. 41 */ 42#ifndef _DEV_ATH_ATHVAR_H 43#define _DEV_ATH_ATHVAR_H 44 45#include <sys/taskqueue.h> 46 47#include <contrib/dev/ath/ah.h> 48#include <net80211/ieee80211_radiotap.h> 49#include <dev/ath/if_athioctl.h> 50#include <dev/ath/if_athrate.h> 51 52#define ATH_TIMEOUT 1000 53 54#define ATH_RXBUF 40 /* number of RX buffers */ | 37 */ 38 39/* 40 * Defintions for the Atheros Wireless LAN controller driver. 41 */ 42#ifndef _DEV_ATH_ATHVAR_H 43#define _DEV_ATH_ATHVAR_H 44 45#include <sys/taskqueue.h> 46 47#include <contrib/dev/ath/ah.h> 48#include <net80211/ieee80211_radiotap.h> 49#include <dev/ath/if_athioctl.h> 50#include <dev/ath/if_athrate.h> 51 52#define ATH_TIMEOUT 1000 53 54#define ATH_RXBUF 40 /* number of RX buffers */ |
| 55#define ATH_TXBUF 60 /* number of TX buffers */ 56#define ATH_TXDESC 8 /* number of descriptors per buffer */ | 55#define ATH_TXBUF 100 /* number of TX buffers */ 56#define ATH_TXDESC 10 /* number of descriptors per buffer */ |
| 57#define ATH_TXMAXTRY 11 /* max number of transmit attempts */ 58#define ATH_TXINTR_PERIOD 5 /* max number of batched tx descriptors */ 59 60/* driver-specific node state */ 61struct ath_node { 62 struct ieee80211_node an_node; /* base class */ 63 u_int8_t an_tx_mgtrate; /* h/w rate for management/ctl frames */ 64 u_int8_t an_tx_mgtratesp;/* short preamble h/w rate for " " */ --- 19 unchanged lines hidden (view full) --- 84 STAILQ_ENTRY(ath_buf) bf_list; 85 int bf_nseg; 86 struct ath_desc *bf_desc; /* virtual addr of desc */ 87 bus_addr_t bf_daddr; /* physical addr of desc */ 88 bus_dmamap_t bf_dmamap; /* DMA map for mbuf chain */ 89 struct mbuf *bf_m; /* mbuf for buf */ 90 struct ieee80211_node *bf_node; /* pointer to the node */ 91 bus_size_t bf_mapsize; | 57#define ATH_TXMAXTRY 11 /* max number of transmit attempts */ 58#define ATH_TXINTR_PERIOD 5 /* max number of batched tx descriptors */ 59 60/* driver-specific node state */ 61struct ath_node { 62 struct ieee80211_node an_node; /* base class */ 63 u_int8_t an_tx_mgtrate; /* h/w rate for management/ctl frames */ 64 u_int8_t an_tx_mgtratesp;/* short preamble h/w rate for " " */ --- 19 unchanged lines hidden (view full) --- 84 STAILQ_ENTRY(ath_buf) bf_list; 85 int bf_nseg; 86 struct ath_desc *bf_desc; /* virtual addr of desc */ 87 bus_addr_t bf_daddr; /* physical addr of desc */ 88 bus_dmamap_t bf_dmamap; /* DMA map for mbuf chain */ 89 struct mbuf *bf_m; /* mbuf for buf */ 90 struct ieee80211_node *bf_node; /* pointer to the node */ 91 bus_size_t bf_mapsize; |
| 92#define ATH_MAX_SCATTER 64 | 92#define ATH_MAX_SCATTER ATH_TXDESC /* max(tx,rx,beacon) desc's */ |
| 93 bus_dma_segment_t bf_segs[ATH_MAX_SCATTER]; 94}; 95typedef STAILQ_HEAD(, ath_buf) ath_bufhead; 96 97/* 98 * DMA state for tx/rx descriptors. 99 */ 100struct ath_descdma { --- 394 unchanged lines hidden --- | 93 bus_dma_segment_t bf_segs[ATH_MAX_SCATTER]; 94}; 95typedef STAILQ_HEAD(, ath_buf) ath_bufhead; 96 97/* 98 * DMA state for tx/rx descriptors. 99 */ 100struct ath_descdma { --- 394 unchanged lines hidden --- |