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ata-siliconimage.c (188765) ata-siliconimage.c (188769)
1/*-
2 * Copyright (c) 1998 - 2008 S�ren Schmidt <sos@FreeBSD.org>
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions
7 * are met:
8 * 1. Redistributions of source code must retain the above copyright

--- 11 unchanged lines hidden (view full) ---

20 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
21 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
22 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
23 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
24 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
25 */
26
27#include <sys/cdefs.h>
1/*-
2 * Copyright (c) 1998 - 2008 S�ren Schmidt <sos@FreeBSD.org>
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions
7 * are met:
8 * 1. Redistributions of source code must retain the above copyright

--- 11 unchanged lines hidden (view full) ---

20 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
21 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
22 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
23 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
24 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
25 */
26
27#include <sys/cdefs.h>
28__FBSDID("$FreeBSD: head/sys/dev/ata/chipsets/ata-siliconimage.c 188765 2009-02-18 22:17:48Z mav $");
28__FBSDID("$FreeBSD: head/sys/dev/ata/chipsets/ata-siliconimage.c 188769 2009-02-19 00:32:55Z mav $");
29
30#include "opt_ata.h"
31#include <sys/param.h>
32#include <sys/module.h>
33#include <sys/systm.h>
34#include <sys/kernel.h>
35#include <sys/ata.h>
36#include <sys/bus.h>

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51#include <dev/ata/ata-pci.h>
52#include <ata_if.h>
53
54/* local prototypes */
55static int ata_cmd_ch_attach(device_t dev);
56static int ata_cmd_status(device_t dev);
57static void ata_cmd_setmode(device_t dev, int mode);
58static int ata_sii_ch_attach(device_t dev);
29
30#include "opt_ata.h"
31#include <sys/param.h>
32#include <sys/module.h>
33#include <sys/systm.h>
34#include <sys/kernel.h>
35#include <sys/ata.h>
36#include <sys/bus.h>

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51#include <dev/ata/ata-pci.h>
52#include <ata_if.h>
53
54/* local prototypes */
55static int ata_cmd_ch_attach(device_t dev);
56static int ata_cmd_status(device_t dev);
57static void ata_cmd_setmode(device_t dev, int mode);
58static int ata_sii_ch_attach(device_t dev);
59static int ata_sii_ch_detach(device_t dev);
59static int ata_sii_status(device_t dev);
60static void ata_sii_reset(device_t dev);
61static void ata_sii_setmode(device_t dev, int mode);
62static int ata_siiprb_ch_attach(device_t dev);
60static int ata_sii_status(device_t dev);
61static void ata_sii_reset(device_t dev);
62static void ata_sii_setmode(device_t dev, int mode);
63static int ata_siiprb_ch_attach(device_t dev);
64static int ata_siiprb_ch_detach(device_t dev);
63static int ata_siiprb_status(device_t dev);
64static int ata_siiprb_begin_transaction(struct ata_request *request);
65static int ata_siiprb_end_transaction(struct ata_request *request);
66static int ata_siiprb_pm_read(device_t dev, int port, int reg, u_int32_t *result);
67static int ata_siiprb_pm_write(device_t dev, int port, int reg, u_int32_t result);
68static u_int32_t ata_siiprb_softreset(device_t dev, int port);
69static void ata_siiprb_reset(device_t dev);
70static void ata_siiprb_dmasetprd(void *xsc, bus_dma_segment_t *segs, int nsegs, int error);

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134 ctlr->r_rid2 = PCIR_BAR(2);
135 ctlr->r_type2 = SYS_RES_MEMORY;
136 if (!(ctlr->r_res2 = bus_alloc_resource_any(dev, ctlr->r_type2,
137 &ctlr->r_rid2, RF_ACTIVE))){
138 bus_release_resource(dev, ctlr->r_type1, ctlr->r_rid1,ctlr->r_res1);
139 return ENXIO;
140 }
141 ctlr->ch_attach = ata_siiprb_ch_attach;
65static int ata_siiprb_status(device_t dev);
66static int ata_siiprb_begin_transaction(struct ata_request *request);
67static int ata_siiprb_end_transaction(struct ata_request *request);
68static int ata_siiprb_pm_read(device_t dev, int port, int reg, u_int32_t *result);
69static int ata_siiprb_pm_write(device_t dev, int port, int reg, u_int32_t result);
70static u_int32_t ata_siiprb_softreset(device_t dev, int port);
71static void ata_siiprb_reset(device_t dev);
72static void ata_siiprb_dmasetprd(void *xsc, bus_dma_segment_t *segs, int nsegs, int error);

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136 ctlr->r_rid2 = PCIR_BAR(2);
137 ctlr->r_type2 = SYS_RES_MEMORY;
138 if (!(ctlr->r_res2 = bus_alloc_resource_any(dev, ctlr->r_type2,
139 &ctlr->r_rid2, RF_ACTIVE))){
140 bus_release_resource(dev, ctlr->r_type1, ctlr->r_rid1,ctlr->r_res1);
141 return ENXIO;
142 }
143 ctlr->ch_attach = ata_siiprb_ch_attach;
144 ctlr->ch_detach = ata_siiprb_ch_detach;
142 ctlr->reset = ata_siiprb_reset;
143 ctlr->setmode = ata_sata_setmode;
144 ctlr->channels = (ctlr->chip->cfg2 == SII_4CH) ? 4 : 2;
145
146 /* reset controller */
147 ATA_OUTL(ctlr->r_res1, 0x0040, 0x80000000);
148 DELAY(10000);
149 ATA_OUTL(ctlr->r_res1, 0x0040, 0x0000000f);

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180
181 /* dont block interrupts from any channel */
182 pci_write_config(dev, 0x48,
183 (pci_read_config(dev, 0x48, 4) & ~0x03c00000), 4);
184
185 /* enable PCI interrupt as BIOS might not */
186 pci_write_config(dev, 0x8a, (pci_read_config(dev, 0x8a, 1) & 0x3f), 1);
187
145 ctlr->reset = ata_siiprb_reset;
146 ctlr->setmode = ata_sata_setmode;
147 ctlr->channels = (ctlr->chip->cfg2 == SII_4CH) ? 4 : 2;
148
149 /* reset controller */
150 ATA_OUTL(ctlr->r_res1, 0x0040, 0x80000000);
151 DELAY(10000);
152 ATA_OUTL(ctlr->r_res1, 0x0040, 0x0000000f);

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183
184 /* dont block interrupts from any channel */
185 pci_write_config(dev, 0x48,
186 (pci_read_config(dev, 0x48, 4) & ~0x03c00000), 4);
187
188 /* enable PCI interrupt as BIOS might not */
189 pci_write_config(dev, 0x8a, (pci_read_config(dev, 0x8a, 1) & 0x3f), 1);
190
188 if (ctlr->r_res2)
191 if (ctlr->r_res2) {
189 ctlr->ch_attach = ata_sii_ch_attach;
192 ctlr->ch_attach = ata_sii_ch_attach;
193 ctlr->ch_detach = ata_sii_ch_detach;
194 }
190
191 if (ctlr->chip->max_dma >= ATA_SA150) {
192 ctlr->reset = ata_sii_reset;
193 ctlr->setmode = ata_sata_setmode;
194 }
195 else
196 ctlr->setmode = ata_sii_setmode;
197 break;
198
199 default:
200 if ((pci_read_config(dev, 0x51, 1) & 0x08) != 0x08) {
201 device_printf(dev, "HW has secondary channel disabled\n");
202 ctlr->channels = 1;
203 }
204
205 /* enable interrupt as BIOS might not */
206 pci_write_config(dev, 0x71, 0x01, 1);
207
208 ctlr->ch_attach = ata_cmd_ch_attach;
195
196 if (ctlr->chip->max_dma >= ATA_SA150) {
197 ctlr->reset = ata_sii_reset;
198 ctlr->setmode = ata_sata_setmode;
199 }
200 else
201 ctlr->setmode = ata_sii_setmode;
202 break;
203
204 default:
205 if ((pci_read_config(dev, 0x51, 1) & 0x08) != 0x08) {
206 device_printf(dev, "HW has secondary channel disabled\n");
207 ctlr->channels = 1;
208 }
209
210 /* enable interrupt as BIOS might not */
211 pci_write_config(dev, 0x71, 0x01, 1);
212
213 ctlr->ch_attach = ata_cmd_ch_attach;
214 ctlr->ch_detach = ata_pci_ch_detach;
209 ctlr->setmode = ata_cmd_setmode;
210 break;
211 }
212 return 0;
213}
214
215static int
216ata_cmd_ch_attach(device_t dev)

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301static int
302ata_sii_ch_attach(device_t dev)
303{
304 struct ata_pci_controller *ctlr = device_get_softc(device_get_parent(dev));
305 struct ata_channel *ch = device_get_softc(dev);
306 int unit01 = (ch->unit & 1), unit10 = (ch->unit & 2);
307 int i;
308
215 ctlr->setmode = ata_cmd_setmode;
216 break;
217 }
218 return 0;
219}
220
221static int
222ata_cmd_ch_attach(device_t dev)

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307static int
308ata_sii_ch_attach(device_t dev)
309{
310 struct ata_pci_controller *ctlr = device_get_softc(device_get_parent(dev));
311 struct ata_channel *ch = device_get_softc(dev);
312 int unit01 = (ch->unit & 1), unit10 = (ch->unit & 2);
313 int i;
314
315 ata_pci_dmainit(dev);
316
309 for (i = ATA_DATA; i <= ATA_COMMAND; i++) {
310 ch->r_io[i].res = ctlr->r_res2;
311 ch->r_io[i].offset = 0x80 + i + (unit01 << 6) + (unit10 << 8);
312 }
313 ch->r_io[ATA_CONTROL].res = ctlr->r_res2;
314 ch->r_io[ATA_CONTROL].offset = 0x8a + (unit01 << 6) + (unit10 << 8);
315 ch->r_io[ATA_IDX_ADDR].res = ctlr->r_res2;
316 ata_default_registers(dev);

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342 }
343
344 ata_pci_hw(dev);
345 ch->hw.status = ata_sii_status;
346 return 0;
347}
348
349static int
317 for (i = ATA_DATA; i <= ATA_COMMAND; i++) {
318 ch->r_io[i].res = ctlr->r_res2;
319 ch->r_io[i].offset = 0x80 + i + (unit01 << 6) + (unit10 << 8);
320 }
321 ch->r_io[ATA_CONTROL].res = ctlr->r_res2;
322 ch->r_io[ATA_CONTROL].offset = 0x8a + (unit01 << 6) + (unit10 << 8);
323 ch->r_io[ATA_IDX_ADDR].res = ctlr->r_res2;
324 ata_default_registers(dev);

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350 }
351
352 ata_pci_hw(dev);
353 ch->hw.status = ata_sii_status;
354 return 0;
355}
356
357static int
358ata_sii_ch_detach(device_t dev)
359{
360
361 ata_pci_dmafini(dev);
362 return (0);
363}
364
365static int
350ata_sii_status(device_t dev)
351{
352 struct ata_pci_controller *ctlr = device_get_softc(device_get_parent(dev));
353 struct ata_channel *ch = device_get_softc(dev);
354 int offset0 = ((ch->unit & 1) << 3) + ((ch->unit & 2) << 8);
355 int offset1 = ((ch->unit & 1) << 6) + ((ch->unit & 2) << 8);
356
357 /* do we have any PHY events ? */

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491 ch->hw.softreset = ata_siiprb_softreset;
492 ch->hw.pm_read = ata_siiprb_pm_read;
493 ch->hw.pm_write = ata_siiprb_pm_write;
494
495 return 0;
496}
497
498static int
366ata_sii_status(device_t dev)
367{
368 struct ata_pci_controller *ctlr = device_get_softc(device_get_parent(dev));
369 struct ata_channel *ch = device_get_softc(dev);
370 int offset0 = ((ch->unit & 1) << 3) + ((ch->unit & 2) << 8);
371 int offset1 = ((ch->unit & 1) << 6) + ((ch->unit & 2) << 8);
372
373 /* do we have any PHY events ? */

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507 ch->hw.softreset = ata_siiprb_softreset;
508 ch->hw.pm_read = ata_siiprb_pm_read;
509 ch->hw.pm_write = ata_siiprb_pm_write;
510
511 return 0;
512}
513
514static int
515ata_siiprb_ch_detach(device_t dev)
516{
517
518 ata_dmafini(dev);
519 return 0;
520}
521
522static int
499ata_siiprb_status(device_t dev)
500{
501 struct ata_pci_controller *ctlr = device_get_softc(device_get_parent(dev));
502 struct ata_channel *ch = device_get_softc(dev);
503 u_int32_t action = ATA_INL(ctlr->r_res1, 0x0044);
504 int offset = ch->unit * 0x2000;
505
506 if (action & (1 << ch->unit)) {

--- 385 unchanged lines hidden --- 		523ata_siiprb_status(device_t dev)
524{
525 struct ata_pci_controller *ctlr = device_get_softc(device_get_parent(dev));
526 struct ata_channel *ch = device_get_softc(dev);
527 u_int32_t action = ATA_INL(ctlr->r_res1, 0x0044);
528 int offset = ch->unit * 0x2000;
529
530 if (action & (1 << ch->unit)) {

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