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ata-promise.c (188765) ata-promise.c (188769)
1/*-
2 * Copyright (c) 1998 - 2008 S�ren Schmidt <sos@FreeBSD.org>
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions
7 * are met:
8 * 1. Redistributions of source code must retain the above copyright

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20 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
21 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
22 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
23 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
24 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
25 */
26
27#include <sys/cdefs.h>
1/*-
2 * Copyright (c) 1998 - 2008 S�ren Schmidt <sos@FreeBSD.org>
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions
7 * are met:
8 * 1. Redistributions of source code must retain the above copyright

--- 11 unchanged lines hidden (view full) ---

20 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
21 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
22 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
23 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
24 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
25 */
26
27#include <sys/cdefs.h>
28__FBSDID("$FreeBSD: head/sys/dev/ata/chipsets/ata-promise.c 188765 2009-02-18 22:17:48Z mav $");
28__FBSDID("$FreeBSD: head/sys/dev/ata/chipsets/ata-promise.c 188769 2009-02-19 00:32:55Z mav $");
29
30#include "opt_ata.h"
31#include <sys/param.h>
32#include <sys/module.h>
33#include <sys/systm.h>
34#include <sys/kernel.h>
35#include <sys/ata.h>
36#include <sys/bus.h>

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53
54/* local prototypes */
55static int ata_promise_chipinit(device_t dev);
56static int ata_promise_ch_attach(device_t dev);
57static int ata_promise_status(device_t dev);
58static int ata_promise_dmastart(struct ata_request *request);
59static int ata_promise_dmastop(struct ata_request *request);
60static void ata_promise_dmareset(device_t dev);
29
30#include "opt_ata.h"
31#include <sys/param.h>
32#include <sys/module.h>
33#include <sys/systm.h>
34#include <sys/kernel.h>
35#include <sys/ata.h>
36#include <sys/bus.h>

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53
54/* local prototypes */
55static int ata_promise_chipinit(device_t dev);
56static int ata_promise_ch_attach(device_t dev);
57static int ata_promise_status(device_t dev);
58static int ata_promise_dmastart(struct ata_request *request);
59static int ata_promise_dmastop(struct ata_request *request);
60static void ata_promise_dmareset(device_t dev);
61static void ata_promise_dmainit(device_t dev);
62static void ata_promise_setmode(device_t dev, int mode);
63static int ata_promise_tx2_ch_attach(device_t dev);
64static int ata_promise_tx2_status(device_t dev);
65static int ata_promise_mio_ch_attach(device_t dev);
61static void ata_promise_setmode(device_t dev, int mode);
62static int ata_promise_tx2_ch_attach(device_t dev);
63static int ata_promise_tx2_status(device_t dev);
64static int ata_promise_mio_ch_attach(device_t dev);
65static int ata_promise_mio_ch_detach(device_t dev);
66static void ata_promise_mio_intr(void *data);
67static int ata_promise_mio_status(device_t dev);
68static int ata_promise_mio_command(struct ata_request *request);
69static void ata_promise_mio_reset(device_t dev);
70static int ata_promise_mio_pm_read(device_t dev, int port, int reg, u_int32_t *result);
71static int ata_promise_mio_pm_write(device_t dev, int port, int reg, u_int32_t result);
72static u_int32_t ata_promise_mio_softreset(device_t dev, int port);
73static void ata_promise_mio_dmainit(device_t dev);

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227 /* setup clocks */
228 ATA_OUTB(ctlr->r_res1, 0x11, ATA_INB(ctlr->r_res1, 0x11) | 0x0a);
229 /* FALLTHROUGH */
230
231 case PR_OLD:
232 /* enable burst mode */
233 ATA_OUTB(ctlr->r_res1, 0x1f, ATA_INB(ctlr->r_res1, 0x1f) | 0x01);
234 ctlr->ch_attach = ata_promise_ch_attach;
66static void ata_promise_mio_intr(void *data);
67static int ata_promise_mio_status(device_t dev);
68static int ata_promise_mio_command(struct ata_request *request);
69static void ata_promise_mio_reset(device_t dev);
70static int ata_promise_mio_pm_read(device_t dev, int port, int reg, u_int32_t *result);
71static int ata_promise_mio_pm_write(device_t dev, int port, int reg, u_int32_t result);
72static u_int32_t ata_promise_mio_softreset(device_t dev, int port);
73static void ata_promise_mio_dmainit(device_t dev);

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227 /* setup clocks */
228 ATA_OUTB(ctlr->r_res1, 0x11, ATA_INB(ctlr->r_res1, 0x11) | 0x0a);
229 /* FALLTHROUGH */
230
231 case PR_OLD:
232 /* enable burst mode */
233 ATA_OUTB(ctlr->r_res1, 0x1f, ATA_INB(ctlr->r_res1, 0x1f) | 0x01);
234 ctlr->ch_attach = ata_promise_ch_attach;
235 ctlr->ch_detach = ata_pci_ch_detach;
235 ctlr->setmode = ata_promise_setmode;
236 return 0;
237
238 case PR_TX:
239 ctlr->ch_attach = ata_promise_tx2_ch_attach;
236 ctlr->setmode = ata_promise_setmode;
237 return 0;
238
239 case PR_TX:
240 ctlr->ch_attach = ata_promise_tx2_ch_attach;
241 ctlr->ch_detach = ata_pci_ch_detach;
240 ctlr->setmode = ata_promise_setmode;
241 return 0;
242
243 case PR_MIO:
244 ctlr->r_type1 = SYS_RES_MEMORY;
245 ctlr->r_rid1 = PCIR_BAR(4);
246 if (!(ctlr->r_res1 = bus_alloc_resource_any(dev, ctlr->r_type1,
247 &ctlr->r_rid1, RF_ACTIVE)))

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278 /* setup host packet controls */
279 hpkt = malloc(sizeof(struct ata_promise_sx4),
280 M_TEMP, M_NOWAIT | M_ZERO);
281 mtx_init(&hpkt->mtx, "ATA promise HPKT lock", NULL, MTX_DEF);
282 TAILQ_INIT(&hpkt->queue);
283 hpkt->busy = 0;
284 device_set_ivars(dev, hpkt);
285 ctlr->ch_attach = ata_promise_mio_ch_attach;
242 ctlr->setmode = ata_promise_setmode;
243 return 0;
244
245 case PR_MIO:
246 ctlr->r_type1 = SYS_RES_MEMORY;
247 ctlr->r_rid1 = PCIR_BAR(4);
248 if (!(ctlr->r_res1 = bus_alloc_resource_any(dev, ctlr->r_type1,
249 &ctlr->r_rid1, RF_ACTIVE)))

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280 /* setup host packet controls */
281 hpkt = malloc(sizeof(struct ata_promise_sx4),
282 M_TEMP, M_NOWAIT | M_ZERO);
283 mtx_init(&hpkt->mtx, "ATA promise HPKT lock", NULL, MTX_DEF);
284 TAILQ_INIT(&hpkt->queue);
285 hpkt->busy = 0;
286 device_set_ivars(dev, hpkt);
287 ctlr->ch_attach = ata_promise_mio_ch_attach;
288 ctlr->ch_detach = ata_promise_mio_ch_detach;
286 ctlr->reset = ata_promise_mio_reset;
287 ctlr->setmode = ata_promise_setmode;
288 ctlr->channels = 4;
289 return 0;
290 }
291
292 /* mio type controllers need an interrupt intercept */
293 if (bus_teardown_intr(dev, ctlr->r_irq, ctlr->handle) ||

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330 /* clear SATA status and unmask interrupts */
331 ATA_OUTL(ctlr->r_res2, stat_reg, 0x000000ff);
332
333 /* enable "long burst length" on gen2 chips */
334 if ((ctlr->chip->cfg2 == PR_SATA2) || (ctlr->chip->cfg2 == PR_CMBO2))
335 ATA_OUTL(ctlr->r_res2, 0x44, ATA_INL(ctlr->r_res2, 0x44) | 0x2000);
336
337 ctlr->ch_attach = ata_promise_mio_ch_attach;
289 ctlr->reset = ata_promise_mio_reset;
290 ctlr->setmode = ata_promise_setmode;
291 ctlr->channels = 4;
292 return 0;
293 }
294
295 /* mio type controllers need an interrupt intercept */
296 if (bus_teardown_intr(dev, ctlr->r_irq, ctlr->handle) ||

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333 /* clear SATA status and unmask interrupts */
334 ATA_OUTL(ctlr->r_res2, stat_reg, 0x000000ff);
335
336 /* enable "long burst length" on gen2 chips */
337 if ((ctlr->chip->cfg2 == PR_SATA2) || (ctlr->chip->cfg2 == PR_CMBO2))
338 ATA_OUTL(ctlr->r_res2, 0x44, ATA_INL(ctlr->r_res2, 0x44) | 0x2000);
339
340 ctlr->ch_attach = ata_promise_mio_ch_attach;
341 ctlr->ch_detach = ata_promise_mio_ch_detach;
338 ctlr->reset = ata_promise_mio_reset;
339 ctlr->setmode = ata_promise_mio_setmode;
340
341 return 0;
342 }
343
344failnfree:
345 if (ctlr->r_res2)

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350}
351
352static int
353ata_promise_ch_attach(device_t dev)
354{
355 struct ata_pci_controller *ctlr = device_get_softc(device_get_parent(dev));
356 struct ata_channel *ch = device_get_softc(dev);
357
342 ctlr->reset = ata_promise_mio_reset;
343 ctlr->setmode = ata_promise_mio_setmode;
344
345 return 0;
346 }
347
348failnfree:
349 if (ctlr->r_res2)

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354}
355
356static int
357ata_promise_ch_attach(device_t dev)
358{
359 struct ata_pci_controller *ctlr = device_get_softc(device_get_parent(dev));
360 struct ata_channel *ch = device_get_softc(dev);
361
358 if (ctlr->chip->cfg1 == PR_NEW)
359 ata_promise_dmainit(dev);
360
361 if (ata_pci_ch_attach(dev))
362 return ENXIO;
363
362 if (ata_pci_ch_attach(dev))
363 return ENXIO;
364
365 if (ctlr->chip->cfg1 == PR_NEW) {
366 ch->dma.start = ata_promise_dmastart;
367 ch->dma.stop = ata_promise_dmastop;
368 ch->dma.reset = ata_promise_dmareset;
369 }
370
364 ch->hw.status = ata_promise_status;
365 return 0;
366}
367
368static int
369ata_promise_status(device_t dev)
370{
371 struct ata_pci_controller *ctlr = device_get_softc(device_get_parent(dev));

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429
430 ATA_IDX_OUTB(ch, ATA_BMCMD_PORT,
431 ATA_IDX_INB(ch, ATA_BMCMD_PORT) & ~ATA_BMCMD_START_STOP);
432 ATA_IDX_OUTB(ch, ATA_BMSTAT_PORT, ATA_BMSTAT_INTERRUPT | ATA_BMSTAT_ERROR);
433 ch->flags &= ~ATA_DMA_ACTIVE;
434}
435
436static void
371 ch->hw.status = ata_promise_status;
372 return 0;
373}
374
375static int
376ata_promise_status(device_t dev)
377{
378 struct ata_pci_controller *ctlr = device_get_softc(device_get_parent(dev));

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436
437 ATA_IDX_OUTB(ch, ATA_BMCMD_PORT,
438 ATA_IDX_INB(ch, ATA_BMCMD_PORT) & ~ATA_BMCMD_START_STOP);
439 ATA_IDX_OUTB(ch, ATA_BMSTAT_PORT, ATA_BMSTAT_INTERRUPT | ATA_BMSTAT_ERROR);
440 ch->flags &= ~ATA_DMA_ACTIVE;
441}
442
443static void
437ata_promise_dmainit(device_t dev)
438{
439 struct ata_channel *ch = device_get_softc(dev);
440
441 ata_dmainit(dev);
442 ch->dma.start = ata_promise_dmastart;
443 ch->dma.stop = ata_promise_dmastop;
444 ch->dma.reset = ata_promise_dmareset;
445}
446
447static void
448ata_promise_setmode(device_t dev, int mode)
449{
450 device_t gparent = GRANDPARENT(dev);
451 struct ata_pci_controller *ctlr = device_get_softc(gparent);
452 struct ata_channel *ch = device_get_softc(device_get_parent(dev));
453 struct ata_device *atadev = device_get_softc(dev);
454 int devno = (ch->unit << 1) + atadev->unit;
455 int error;

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583 ch->hw.status = ata_promise_mio_status;
584 ch->hw.softreset = ata_promise_mio_softreset;
585 ch->hw.pm_read = ata_promise_mio_pm_read;
586 ch->hw.pm_write = ata_promise_mio_pm_write;
587 }
588 return 0;
589}
590
444ata_promise_setmode(device_t dev, int mode)
445{
446 device_t gparent = GRANDPARENT(dev);
447 struct ata_pci_controller *ctlr = device_get_softc(gparent);
448 struct ata_channel *ch = device_get_softc(device_get_parent(dev));
449 struct ata_device *atadev = device_get_softc(dev);
450 int devno = (ch->unit << 1) + atadev->unit;
451 int error;

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579 ch->hw.status = ata_promise_mio_status;
580 ch->hw.softreset = ata_promise_mio_softreset;
581 ch->hw.pm_read = ata_promise_mio_pm_read;
582 ch->hw.pm_write = ata_promise_mio_pm_write;
583 }
584 return 0;
585}
586
587static int
588ata_promise_mio_ch_detach(device_t dev)
589{
590
591 ata_dmafini(dev);
592 return (0);
593}
594
591static void
592ata_promise_mio_intr(void *data)
593{
594 struct ata_pci_controller *ctlr = data;
595 struct ata_channel *ch;
596 u_int32_t vector;
597 int unit, fake_reg;
598

--- 654 unchanged lines hidden --- 		595static void
596ata_promise_mio_intr(void *data)
597{
598 struct ata_pci_controller *ctlr = data;
599 struct ata_channel *ch;
600 u_int32_t vector;
601 int unit, fake_reg;
602

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