aic7xxx.reg (58258) | aic7xxx.reg (63457) |
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1/* 2 * Aic7xxx register and scratch ram definitions. 3 * 4 * Copyright (c) 1994-2000 Justin Gibbs. 5 * All rights reserved. 6 * 7 * Redistribution and use in source and binary forms, with or without 8 * modification, are permitted provided that the following conditions 9 * are met: 10 * 1. Redistributions of source code must retain the above copyright 11 * notice, this list of conditions, and the following disclaimer, 12 * without modification. 13 * 2. The name of the author may not be used to endorse or promote products 14 * derived from this software without specific prior written permission. 15 * 16 * Alternatively, this software may be distributed under the terms of the | 1/* 2 * Aic7xxx register and scratch ram definitions. 3 * 4 * Copyright (c) 1994-2000 Justin Gibbs. 5 * All rights reserved. 6 * 7 * Redistribution and use in source and binary forms, with or without 8 * modification, are permitted provided that the following conditions 9 * are met: 10 * 1. Redistributions of source code must retain the above copyright 11 * notice, this list of conditions, and the following disclaimer, 12 * without modification. 13 * 2. The name of the author may not be used to endorse or promote products 14 * derived from this software without specific prior written permission. 15 * 16 * Alternatively, this software may be distributed under the terms of the |
17 * the GNU Public License ("GPL"). | 17 * GNU Public License ("GPL"). |
18 * 19 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND 20 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 21 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 22 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE FOR 23 * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 24 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 25 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 26 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 27 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 28 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 29 * SUCH DAMAGE. 30 * | 18 * 19 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND 20 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 21 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 22 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE FOR 23 * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 24 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 25 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 26 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 27 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 28 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 29 * SUCH DAMAGE. 30 * |
31 * $FreeBSD: head/sys/dev/aic7xxx/aic7xxx.reg 58258 2000-03-18 22:28:20Z gibbs $ | 31 * $FreeBSD: head/sys/dev/aic7xxx/aic7xxx.reg 63457 2000-07-18 20:12:14Z gibbs $ |
32 */ 33 34/* 35 * This file is processed by the aic7xxx_asm utility for use in assembling 36 * firmware for the aic7xxx family of SCSI host adapters as well as to generate 37 * a C header file for use in the kernel portion of the Aic7xxx driver. 38 * 39 * All page numbers refer to the Adaptec AIC-7770 Data Book available from --- 127 unchanged lines hidden (view full) --- 167 * SCSI ID (p. 3-18). 168 * Contains the ID of the board and the current target on the 169 * selected channel. 170 */ 171register SCSIID { 172 address 0x005 173 access_mode RW 174 mask TID 0xf0 /* Target ID mask */ | 32 */ 33 34/* 35 * This file is processed by the aic7xxx_asm utility for use in assembling 36 * firmware for the aic7xxx family of SCSI host adapters as well as to generate 37 * a C header file for use in the kernel portion of the Aic7xxx driver. 38 * 39 * All page numbers refer to the Adaptec AIC-7770 Data Book available from --- 127 unchanged lines hidden (view full) --- 167 * SCSI ID (p. 3-18). 168 * Contains the ID of the board and the current target on the 169 * selected channel. 170 */ 171register SCSIID { 172 address 0x005 173 access_mode RW 174 mask TID 0xf0 /* Target ID mask */ |
175 mask TWIN_TID 0x70 176 bit TWIN_CHNLB 0x80 |
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175 mask OID 0x0f /* Our ID mask */ 176 /* 177 * SCSI Maximum Offset (p. 4-61 aic7890/91 Data Book) 178 * The aic7890/91 allow an offset of up to 127 transfers in both wide 179 * and narrow mode. 180 */ 181 alias SCSIOFFSET 182 mask SOFS_ULTRA2 0x7f /* Sync offset U2 chips */ --- 516 unchanged lines hidden (view full) --- 699 mask DFTHRSH_100 0xc0 700} 701 702/* aic7890/91/96/97 only */ 703register HS_MAILBOX { 704 address 0x086 705 mask HOST_MAILBOX 0xF0 706 mask SEQ_MAILBOX 0x0F | 177 mask OID 0x0f /* Our ID mask */ 178 /* 179 * SCSI Maximum Offset (p. 4-61 aic7890/91 Data Book) 180 * The aic7890/91 allow an offset of up to 127 transfers in both wide 181 * and narrow mode. 182 */ 183 alias SCSIOFFSET 184 mask SOFS_ULTRA2 0x7f /* Sync offset U2 chips */ --- 516 unchanged lines hidden (view full) --- 701 mask DFTHRSH_100 0xc0 702} 703 704/* aic7890/91/96/97 only */ 705register HS_MAILBOX { 706 address 0x086 707 mask HOST_MAILBOX 0xF0 708 mask SEQ_MAILBOX 0x0F |
707 mask HOST_REQ_INT 0x10 | |
708 mask HOST_TQINPOS 0x80 /* Boundary at either 0 or 128 */ 709} 710 711const HOST_MAILBOX_SHIFT 4 712const SEQ_MAILBOX_SHIFT 0 713 714/* 715 * Host Control (p. 3-47) R/W --- 25 unchanged lines hidden (view full) --- 741register HCNT { 742 address 0x08c 743 size 3 744 access_mode RW 745} 746 747/* 748 * SCB Pointer (p. 3-49) | 709 mask HOST_TQINPOS 0x80 /* Boundary at either 0 or 128 */ 710} 711 712const HOST_MAILBOX_SHIFT 4 713const SEQ_MAILBOX_SHIFT 0 714 715/* 716 * Host Control (p. 3-47) R/W --- 25 unchanged lines hidden (view full) --- 742register HCNT { 743 address 0x08c 744 size 3 745 access_mode RW 746} 747 748/* 749 * SCB Pointer (p. 3-49) |
749 * Gate one of the four SCBs into the SCBARRAY window. | 750 * Gate one of the SCBs into the SCBARRAY window. |
750 */ 751register SCBPTR { 752 address 0x090 753 access_mode RW 754} 755 756/* 757 * Interrupt Status (p. 3-50) --- 5 unchanged lines hidden (view full) --- 763 bit BRKADRINT 0x08 764 bit SCSIINT 0x04 765 bit CMDCMPLT 0x02 766 bit SEQINT 0x01 767 mask BAD_PHASE SEQINT /* unknown scsi bus phase */ 768 mask SEND_REJECT 0x10|SEQINT /* sending a message reject */ 769 mask NO_IDENT 0x20|SEQINT /* no IDENTIFY after reconnect*/ 770 mask NO_MATCH 0x30|SEQINT /* no cmd match for reconnect */ | 751 */ 752register SCBPTR { 753 address 0x090 754 access_mode RW 755} 756 757/* 758 * Interrupt Status (p. 3-50) --- 5 unchanged lines hidden (view full) --- 764 bit BRKADRINT 0x08 765 bit SCSIINT 0x04 766 bit CMDCMPLT 0x02 767 bit SEQINT 0x01 768 mask BAD_PHASE SEQINT /* unknown scsi bus phase */ 769 mask SEND_REJECT 0x10|SEQINT /* sending a message reject */ 770 mask NO_IDENT 0x20|SEQINT /* no IDENTIFY after reconnect*/ 771 mask NO_MATCH 0x30|SEQINT /* no cmd match for reconnect */ |
771 mask UPDATE_TMSG_REQ 0x60|SEQINT /* Update TMSG_REQ values */ | 772 mask IGN_WIDE_RES 0x40|SEQINT /* Complex IGN Wide Res Msg */ |
772 mask BAD_STATUS 0x70|SEQINT /* Bad status from target */ 773 mask RESIDUAL 0x80|SEQINT /* Residual byte count != 0 */ | 773 mask BAD_STATUS 0x70|SEQINT /* Bad status from target */ 774 mask RESIDUAL 0x80|SEQINT /* Residual byte count != 0 */ |
774 mask TRACE_POINT 0x90|SEQINT | 775 mask TRACEPOINT2 0x90|SEQINT |
775 mask HOST_MSG_LOOP 0xa0|SEQINT /* 776 * The bus is ready for the 777 * host to perform another 778 * message transaction. This 779 * mechanism is used for things 780 * like sync/wide negotiation 781 * that require a kernel based 782 * message state engine. 783 */ 784 mask PERR_DETECTED 0xb0|SEQINT /* 785 * Either the phase_lock 786 * or inb_next routine has 787 * noticed a parity error. 788 */ 789 mask TRACEPOINT 0xd0|SEQINT | 776 mask HOST_MSG_LOOP 0xa0|SEQINT /* 777 * The bus is ready for the 778 * host to perform another 779 * message transaction. This 780 * mechanism is used for things 781 * like sync/wide negotiation 782 * that require a kernel based 783 * message state engine. 784 */ 785 mask PERR_DETECTED 0xb0|SEQINT /* 786 * Either the phase_lock 787 * or inb_next routine has 788 * noticed a parity error. 789 */ 790 mask TRACEPOINT 0xd0|SEQINT |
790 mask MSGIN_PHASEMIS 0xe0|SEQINT /* 791 * Target changed phase on us 792 * when we were expecting 793 * another msgin byte. 794 */ | |
795 mask DATA_OVERRUN 0xf0|SEQINT /* 796 * Target attempted to write 797 * beyond the bounds of its 798 * command. 799 */ 800 801 mask SEQINT_MASK 0xf0|SEQINT /* SEQINT Status Codes */ 802 mask INT_PEND (BRKADRINT|SEQINT|SCSIINT|CMDCMPLT) --- 154 unchanged lines hidden (view full) --- 957 958/* 959 * SCB Definition (p. 5-4) 960 */ 961scb { 962 address 0x0a0 963 SCB_CONTROL { 964 size 1 | 791 mask DATA_OVERRUN 0xf0|SEQINT /* 792 * Target attempted to write 793 * beyond the bounds of its 794 * command. 795 */ 796 797 mask SEQINT_MASK 0xf0|SEQINT /* SEQINT Status Codes */ 798 mask INT_PEND (BRKADRINT|SEQINT|SCSIINT|CMDCMPLT) --- 154 unchanged lines hidden (view full) --- 953 954/* 955 * SCB Definition (p. 5-4) 956 */ 957scb { 958 address 0x0a0 959 SCB_CONTROL { 960 size 1 |
965 bit TARGET_SCB 0x80 966 bit DISCENB 0x40 967 bit TAG_ENB 0x20 968 bit MK_MESSAGE 0x10 969 bit ULTRAENB 0x08 970 bit DISCONNECTED 0x04 971 mask SCB_TAG_TYPE 0x03 | 961 bit TARGET_SCB 0x80 962 bit DISCENB 0x40 963 bit TAG_ENB 0x20 964 bit MK_MESSAGE 0x10 965 bit ULTRAENB 0x08 966 bit DISCONNECTED 0x04 967 mask SCB_TAG_TYPE 0x03 |
972 } | 968 } |
973 SCB_TCL { | 969 SCB_SCSIID { |
974 size 1 | 970 size 1 |
975 bit SELBUSB 0x08 976 mask TID 0xf0 977 mask LID 0x07 | 971 bit TWIN_CHNLB 0x80 972 mask TWIN_TID 0x70 973 mask TID 0xf0 974 mask OID 0x0f |
978 } | 975 } |
979 SCB_TARGET_STATUS { | 976 SCB_LUN { 977 mask LID 0xff |
980 size 1 981 } | 978 size 1 979 } |
982 SCB_SGCOUNT { | 980 SCB_CDB_LEN { |
983 size 1 984 } | 981 size 1 982 } |
985 SCB_SGPTR { | 983 SCB_CDB_PTR { |
986 size 4 | 984 size 4 |
985 alias SCB_RESIDUAL_DATACNT 986 alias SCB_CDB_STORE 987 alias SCB_TARGET_INFO |
|
987 } | 988 } |
988 SCB_RESID_SGCNT { | 989 SCB_RESIDUAL_SGPTR { 990 size 4 991 } 992 SCB_SCSI_STATUS { |
989 size 1 990 } | 993 size 1 994 } |
991 SCB_RESID_DCNT { | 995 SCB_CDB_STORE_PAD { |
992 size 3 993 } 994 SCB_DATAPTR { 995 size 4 996 } 997 SCB_DATACNT { 998 /* | 996 size 3 997 } 998 SCB_DATAPTR { 999 size 4 1000 } 1001 SCB_DATACNT { 1002 /* |
999 * Really only 3 bytes, but padded to make 1000 * the kernel's job easier. | 1003 * The last byte is really the high address bits for 1004 * the data address. |
1001 */ 1002 size 4 | 1005 */ 1006 size 4 |
1007 bit SG_LAST_SEG 0x80 /* In the fourth byte */ 1008 mask SG_HIGH_ADDR_BITS 0x7F /* In the fourth byte */ |
|
1003 } | 1009 } |
1004 SCB_CMDPTR { 1005 alias SCB_TARGET_PHASES 1006 bit TARGET_DATA_IN 0x1 /* In the second byte */ | 1010 SCB_SGPTR { |
1007 size 4 | 1011 size 4 |
1012 bit SG_RESID_VALID 0x04 /* In the first byte */ 1013 bit SG_FULL_RESID 0x02 /* In the first byte */ 1014 bit SG_LIST_NULL 0x01 /* In the first byte */ |
|
1008 } | 1015 } |
1009 SCB_CMDLEN { 1010 alias SCB_INITIATOR_TAG 1011 size 1 1012 } | |
1013 SCB_TAG { 1014 size 1 1015 } | 1016 SCB_TAG { 1017 size 1 1018 } |
1016 SCB_NEXT { 1017 size 1 1018 } | |
1019 SCB_SCSIRATE { 1020 size 1 1021 } 1022 SCB_SCSIOFFSET { 1023 size 1 1024 } | 1019 SCB_SCSIRATE { 1020 size 1 1021 } 1022 SCB_SCSIOFFSET { 1023 size 1 1024 } |
1025 SCB_SPARE { 1026 size 3 | 1025 SCB_NEXT { 1026 size 1 |
1027 } | 1027 } |
1028 SCB_CMDSTORE { | 1028 SCB_64_BTT { |
1029 size 16 1030 } | 1029 size 16 1030 } |
1031 SCB_CMDSTORE_BUSADDR { 1032 size 4 | 1031 SCB_64_SPARE { 1032 size 16 |
1033 } | 1033 } |
1034 SCB_64BYTE_SPARE { 1035 size 12 1036 } | |
1037} 1038 | 1034} 1035 |
1039const SCB_32BYTE_SIZE 28 1040const SCB_64BYTE_SIZE 48 | 1036const SCB_32BYTE_SIZE 30 /* Cards supporting 32byte scbs */ 1037const SCB_64BYTE_SIZE 32 /* Cards supporting 64byte scbs */ |
1041 1042const SG_SIZEOF 0x08 /* sizeof(struct ahc_dma) */ 1043 1044/* --------------------- AHA-2840-only definitions -------------------- */ 1045 1046register SEECTL_2840 { 1047 address 0x0c0 1048 access_mode RW --- 29 unchanged lines hidden (view full) --- 1078register CCSGADDR { 1079 address 0x0EA 1080} 1081 1082register CCSGCTL { 1083 address 0x0EB 1084 bit CCSGDONE 0x80 1085 bit CCSGEN 0x08 | 1038 1039const SG_SIZEOF 0x08 /* sizeof(struct ahc_dma) */ 1040 1041/* --------------------- AHA-2840-only definitions -------------------- */ 1042 1043register SEECTL_2840 { 1044 address 0x0c0 1045 access_mode RW --- 29 unchanged lines hidden (view full) --- 1075register CCSGADDR { 1076 address 0x0EA 1077} 1078 1079register CCSGCTL { 1080 address 0x0EB 1081 bit CCSGDONE 0x80 1082 bit CCSGEN 0x08 |
1086 bit FLAG 0x02 | 1083 bit SG_FETCH_NEEDED 0x02 /* Bit used for software state */ |
1087 bit CCSGRESET 0x01 1088} 1089 1090register CCSCBCNT { 1091 address 0xEF 1092} 1093 1094register CCSCBCTL { --- 64 unchanged lines hidden (view full) --- 1159 mask WR_DFTHRSH_50 0x20 1160 mask WR_DFTHRSH_63 0x30 1161 mask WR_DFTHRSH_75 0x40 1162 mask WR_DFTHRSH_85 0x50 1163 mask WR_DFTHRSH_90 0x60 1164 mask WR_DFTHRSH_MAX 0x70 1165} 1166 | 1084 bit CCSGRESET 0x01 1085} 1086 1087register CCSCBCNT { 1088 address 0xEF 1089} 1090 1091register CCSCBCTL { --- 64 unchanged lines hidden (view full) --- 1156 mask WR_DFTHRSH_50 0x20 1157 mask WR_DFTHRSH_63 0x30 1158 mask WR_DFTHRSH_75 0x40 1159 mask WR_DFTHRSH_85 0x50 1160 mask WR_DFTHRSH_90 0x60 1161 mask WR_DFTHRSH_MAX 0x70 1162} 1163 |
1167register SG_CACHEPTR { 1168 access_mode RW | 1164register SG_CACHE_PRE { 1165 access_mode WO |
1169 address 0x0fc | 1166 address 0x0fc |
1170 mask SG_USER_DATA 0xfc | 1167 mask SG_ADDR_MASK 0xf8 1168 bit ODD_SEG 0x04 |
1171 bit LAST_SEG 0x02 1172 bit LAST_SEG_DONE 0x01 1173} 1174 | 1169 bit LAST_SEG 0x02 1170 bit LAST_SEG_DONE 0x01 1171} 1172 |
1173register SG_CACHE_SHADOW { 1174 access_mode RO 1175 address 0x0fc 1176 mask SG_ADDR_MASK 0xf8 1177 bit ODD_SEG 0x04 1178 bit LAST_SEG 0x02 1179 bit LAST_SEG_DONE 0x01 1180} |
|
1175/* ---------------------- Scratch RAM Offsets ------------------------- */ 1176/* These offsets are either to values that are initialized by the board's 1177 * BIOS or are specified by the sequencer code. 1178 * 1179 * The host adapter card (at least the BIOS) uses 20-2f for SCSI 1180 * device information, 32-33 and 5a-5f as well. As it turns out, the 1181 * BIOS trashes 20-2f, writing the synchronous negotiation results 1182 * on top of the BIOS values, so we re-use those for our per-target --- 5 unchanged lines hidden (view full) --- 1188 */ 1189 1190scratch_ram { 1191 address 0x020 1192 1193 /* 1194 * 1 byte per target starting at this address for configuration values 1195 */ | 1181/* ---------------------- Scratch RAM Offsets ------------------------- */ 1182/* These offsets are either to values that are initialized by the board's 1183 * BIOS or are specified by the sequencer code. 1184 * 1185 * The host adapter card (at least the BIOS) uses 20-2f for SCSI 1186 * device information, 32-33 and 5a-5f as well. As it turns out, the 1187 * BIOS trashes 20-2f, writing the synchronous negotiation results 1188 * on top of the BIOS values, so we re-use those for our per-target --- 5 unchanged lines hidden (view full) --- 1194 */ 1195 1196scratch_ram { 1197 address 0x020 1198 1199 /* 1200 * 1 byte per target starting at this address for configuration values 1201 */ |
1196 TARG_SCSIRATE { 1197 alias CMDSIZE_TABLE | 1202 CMDSIZE_TABLE { 1203 alias TARG_SCSIRATE 1204 size 8 1205 } 1206 BUSY_TARGETS { |
1198 size 16 1199 } 1200 /* 1201 * Bit vector of targets that have ULTRA enabled. 1202 */ 1203 ULTRA_ENB { 1204 size 2 1205 } --- 23 unchanged lines hidden (view full) --- 1229 bit DIRECTION 0x04 1230 bit FIFOFLUSH 0x02 1231 bit FIFORESET 0x01 1232 } 1233 SEQ_FLAGS { 1234 size 1 1235 bit IDENTIFY_SEEN 0x80 1236 bit SCBPTR_VALID 0x40 | 1207 size 16 1208 } 1209 /* 1210 * Bit vector of targets that have ULTRA enabled. 1211 */ 1212 ULTRA_ENB { 1213 size 2 1214 } --- 23 unchanged lines hidden (view full) --- 1238 bit DIRECTION 0x04 1239 bit FIFOFLUSH 0x02 1240 bit FIFORESET 0x01 1241 } 1242 SEQ_FLAGS { 1243 size 1 1244 bit IDENTIFY_SEEN 0x80 1245 bit SCBPTR_VALID 0x40 |
1246 bit TARGET_CMD_IS_TAGGED 0x40 |
|
1237 bit DPHASE 0x20 1238 /* Target flags */ 1239 bit TARG_CMD_PENDING 0x10 1240 bit CMDPHASE_PENDING 0x08 1241 bit DPHASE_PENDING 0x04 1242 bit SPHASE_PENDING 0x02 1243 bit NO_DISCONNECT 0x01 1244 } 1245 /* 1246 * Temporary storage for the 1247 * target/channel/lun of a 1248 * reconnecting target 1249 */ | 1247 bit DPHASE 0x20 1248 /* Target flags */ 1249 bit TARG_CMD_PENDING 0x10 1250 bit CMDPHASE_PENDING 0x08 1251 bit DPHASE_PENDING 0x04 1252 bit SPHASE_PENDING 0x02 1253 bit NO_DISCONNECT 0x01 1254 } 1255 /* 1256 * Temporary storage for the 1257 * target/channel/lun of a 1258 * reconnecting target 1259 */ |
1250 SAVED_TCL { | 1260 SAVED_SCSIID { |
1251 size 1 1252 } | 1261 size 1 1262 } |
1253 /* Working value of the number of SG segments left */ 1254 SG_COUNT { | 1263 SAVED_LUN { |
1255 size 1 1256 } | 1264 size 1 1265 } |
1257 /* Working value of SG pointer */ 1258 SG_NEXT { 1259 size 4 1260 } | |
1261 /* 1262 * The last bus phase as seen by the sequencer. 1263 */ 1264 LASTPHASE { 1265 size 1 1266 bit CDI 0x80 1267 bit IOI 0x40 1268 bit MSGI 0x20 --- 30 unchanged lines hidden (view full) --- 1299 } 1300 /* 1301 * Address of the hardware scb array in the host. 1302 */ 1303 HSCB_ADDR { 1304 size 4 1305 } 1306 /* | 1266 /* 1267 * The last bus phase as seen by the sequencer. 1268 */ 1269 LASTPHASE { 1270 size 1 1271 bit CDI 0x80 1272 bit IOI 0x40 1273 bit MSGI 0x20 --- 30 unchanged lines hidden (view full) --- 1304 } 1305 /* 1306 * Address of the hardware scb array in the host. 1307 */ 1308 HSCB_ADDR { 1309 size 4 1310 } 1311 /* |
1307 * Address of the 256 byte array storing the SCBID of outstanding 1308 * untagged SCBs indexed by TCL. | 1312 * Base address of our shared data with the kernel driver in host 1313 * memory. This includes the qinfifo, qoutfifo, and target mode 1314 * incoming command queue. |
1309 */ | 1315 */ |
1310 SCBID_ADDR { | 1316 SHARED_DATA_ADDR { |
1311 size 4 1312 } | 1317 size 4 1318 } |
1313 /* 1314 * Address of the array of command descriptors used to store 1315 * information about incoming selections. 1316 */ 1317 TMODE_CMDADDR { 1318 size 4 1319 } | |
1320 KERNEL_QINPOS { 1321 size 1 1322 } 1323 QINPOS { 1324 size 1 1325 } 1326 QOUTPOS { 1327 size 1 --- 28 unchanged lines hidden (view full) --- 1356 /* 1357 * Snapshot of MSG_OUT taken after each message is sent. 1358 */ 1359 LAST_MSG { 1360 size 1 1361 } 1362 1363 /* | 1319 KERNEL_QINPOS { 1320 size 1 1321 } 1322 QINPOS { 1323 size 1 1324 } 1325 QOUTPOS { 1326 size 1 --- 28 unchanged lines hidden (view full) --- 1355 /* 1356 * Snapshot of MSG_OUT taken after each message is sent. 1357 */ 1358 LAST_MSG { 1359 size 1 1360 } 1361 1362 /* |
1364 * Number of times we have filled the CCSGRAM with prefetched 1365 * SG elements. 1366 */ 1367 PREFETCH_CNT { 1368 size 1 1369 } 1370 1371 /* | |
1372 * Interrupt kernel for a message to this target on 1373 * the next transaction. This is usually used for 1374 * negotiation requests. 1375 */ 1376 TARGET_MSG_REQUEST { 1377 size 2 1378 } 1379 --- 56 unchanged lines hidden (view full) --- 1436 * Per target SCSI offset values for Ultra2 controllers. 1437 */ 1438 TARG_OFFSET { 1439 address 0x070 1440 size 16 1441 } 1442} 1443 | 1363 * Interrupt kernel for a message to this target on 1364 * the next transaction. This is usually used for 1365 * negotiation requests. 1366 */ 1367 TARGET_MSG_REQUEST { 1368 size 2 1369 } 1370 --- 56 unchanged lines hidden (view full) --- 1427 * Per target SCSI offset values for Ultra2 controllers. 1428 */ 1429 TARG_OFFSET { 1430 address 0x070 1431 size 16 1432 } 1433} 1434 |
1435const TID_SHIFT 4 |
|
1444const SCB_LIST_NULL 0xff 1445const TARGET_CMD_CMPLT 0xfe 1446 1447const CCSGADDR_MAX 0x80 1448const CCSGRAM_MAXSEGS 16 1449 | 1436const SCB_LIST_NULL 0xff 1437const TARGET_CMD_CMPLT 0xfe 1438 1439const CCSGADDR_MAX 0x80 1440const CCSGRAM_MAXSEGS 16 1441 |
1450/* Offsets into the SCBID array where different data is stored */ 1451const QOUTFIFO_OFFSET 0 1452const QINFIFO_OFFSET 1 1453const UNTAGGEDSCB_OFFSET 2 1454 | |
1455/* WDTR Message values */ 1456const BUS_8_BIT 0x00 1457const BUS_16_BIT 0x01 1458const BUS_32_BIT 0x02 1459 1460/* Offset maximums */ 1461const MAX_OFFSET_8BIT 0x0f 1462const MAX_OFFSET_16BIT 0x08 1463const MAX_OFFSET_ULTRA2 0x7f 1464const HOST_MSG 0xff 1465 1466/* Target mode command processing constants */ 1467const CMD_GROUP_CODE_SHIFT 0x05 1468 | 1442/* WDTR Message values */ 1443const BUS_8_BIT 0x00 1444const BUS_16_BIT 0x01 1445const BUS_32_BIT 0x02 1446 1447/* Offset maximums */ 1448const MAX_OFFSET_8BIT 0x0f 1449const MAX_OFFSET_16BIT 0x08 1450const MAX_OFFSET_ULTRA2 0x7f 1451const HOST_MSG 0xff 1452 1453/* Target mode command processing constants */ 1454const CMD_GROUP_CODE_SHIFT 0x05 1455 |
1469const TCL_TARGET_SHIFT 4 1470 | |
1471const STATUS_BUSY 0x08 | 1456const STATUS_BUSY 0x08 |
1472const STATUS_QUEUE_FULL 0x28 | 1457const STATUS_QUEUE_FULL 0x28 1458const SCB_TARGET_PHASES 0 1459const SCB_TARGET_DATA_DIR 1 1460const SCB_TARGET_STATUS 2 1461const SCB_INITIATOR_TAG 3 1462const TARGET_DATA_IN 1 |
1473 1474/* 1475 * Downloaded (kernel inserted) constants 1476 */ | 1463 1464/* 1465 * Downloaded (kernel inserted) constants 1466 */ |
1477 1478/* 1479 * Number of command descriptors in the command descriptor array. 1480 * No longer used, but left here as an example for how downloaded 1481 * constantants can be defined. 1482const TMODE_NUMCMDS download 1483 */ | 1467/* Offsets into the SCBID array where different data is stored */ 1468const QOUTFIFO_OFFSET download 1469const QINFIFO_OFFSET download |