| ixp425reg.h (186352) | ixp425reg.h (186418) |
|---|---|
| 1/* $NetBSD: ixp425reg.h,v 1.19 2005/12/11 12:16:51 christos Exp $ */ 2/* 3 * Copyright (c) 2003 4 * Ichiro FUKUHARA <ichiro@ichiro.org>. 5 * All rights reserved. 6 * 7 * Redistribution and use in source and binary forms, with or without 8 * modification, are permitted provided that the following conditions --- 17 unchanged lines hidden (view full) --- 26 * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 27 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 28 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 29 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 30 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 31 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 32 * SUCH DAMAGE. 33 * | 1/* $NetBSD: ixp425reg.h,v 1.19 2005/12/11 12:16:51 christos Exp $ */ 2/* 3 * Copyright (c) 2003 4 * Ichiro FUKUHARA <ichiro@ichiro.org>. 5 * All rights reserved. 6 * 7 * Redistribution and use in source and binary forms, with or without 8 * modification, are permitted provided that the following conditions --- 17 unchanged lines hidden (view full) --- 26 * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 27 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 28 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 29 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 30 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 31 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 32 * SUCH DAMAGE. 33 * |
| 34 * $FreeBSD: head/sys/arm/xscale/ixp425/ixp425reg.h 186352 2008-12-20 03:26:09Z sam $ | 34 * $FreeBSD: head/sys/arm/xscale/ixp425/ixp425reg.h 186418 2008-12-23 04:48:27Z sam $ |
| 35 * 36 */ 37 38#ifndef _IXP425REG_H_ 39#define _IXP425REG_H_ 40 41/* 42 * Physical memory map for the Intel IXP425 --- 349 unchanged lines hidden (view full) --- 392#define EXP_CNFG0_PCI_66MHZ (1 << 4) 393#define EXP_CNFG0_MEM_MAP (1 << 31) 394 395/* EXP_CNFG1 bits */ 396#define EXP_CNFG1_SW_INT0 (1 << 0) 397#define EXP_CNFG1_SW_INT1 (1 << 1) 398 399#define EXP_FCTRL_RCOMP (1<<0) | 35 * 36 */ 37 38#ifndef _IXP425REG_H_ 39#define _IXP425REG_H_ 40 41/* 42 * Physical memory map for the Intel IXP425 --- 349 unchanged lines hidden (view full) --- 392#define EXP_CNFG0_PCI_66MHZ (1 << 4) 393#define EXP_CNFG0_MEM_MAP (1 << 31) 394 395/* EXP_CNFG1 bits */ 396#define EXP_CNFG1_SW_INT0 (1 << 0) 397#define EXP_CNFG1_SW_INT1 (1 << 1) 398 399#define EXP_FCTRL_RCOMP (1<<0) |
| 400#define EXP_FCTRL_USB (1<<1) | 400#define EXP_FCTRL_USB_DEVICE (1<<1) |
| 401#define EXP_FCTRL_HASH (1<<2) 402#define EXP_FCTRL_AES (1<<3) 403#define EXP_FCTRL_DES (1<<4) 404#define EXP_FCTRL_HDLC (1<<5) 405#define EXP_FCTRL_AAL (1<<6) 406#define EXP_FCTRL_HSS (1<<7) 407#define EXP_FCTRL_UTOPIA (1<<8) 408#define EXP_FCTRL_ETH0 (1<<9) 409#define EXP_FCTRL_ETH1 (1<<10) | 401#define EXP_FCTRL_HASH (1<<2) 402#define EXP_FCTRL_AES (1<<3) 403#define EXP_FCTRL_DES (1<<4) 404#define EXP_FCTRL_HDLC (1<<5) 405#define EXP_FCTRL_AAL (1<<6) 406#define EXP_FCTRL_HSS (1<<7) 407#define EXP_FCTRL_UTOPIA (1<<8) 408#define EXP_FCTRL_ETH0 (1<<9) 409#define EXP_FCTRL_ETH1 (1<<10) |
| 410#define EXP_FCTRL_NPEA (1<<11) 411#define EXP_FCTRL_NPEB (1<<12) 412#define EXP_FCTRL_NPEC (1<<13) | 410#define EXP_FCTRL_NPEA (1<<11) /* reset */ 411#define EXP_FCTRL_NPEB (1<<12) /* reset */ 412#define EXP_FCTRL_NPEC (1<<13) /* reset */ |
| 413#define EXP_FCTRL_PCI (1<<14) | 413#define EXP_FCTRL_PCI (1<<14) |
| 414/* XXX more stuff we don't care about */ | 414#define EXP_FCTRL_ECC_TIMESYNC (1<<15) 415#define EXP_FCTRL_UTOPIA_PHY (3<<16) /* PHY limit */ 416#define EXP_FCTRL_USB_HOST (1<<18) 417#define EXP_FCTRL_NPEA_ETH (1<<19) 418#define EXP_FCTRL_NPEB_ETH (1<<20) 419#define EXP_FCTRL_RSA (1<<21) 420#define EXP_FCTRL_MAXFREQ (3<<22) /* XScale frequency */ 421#define EXP_FCTRL_RESVD (0xff<<24) |
| 415 | 422 |
| 423#define EXP_FCTRL_IXP46X_ONLY \ 424 (EXP_FCTRL_ECC_TIMESYNC | EXP_FCTRL_USB_HOST | EXP_FCTRL_NPEA_ETH | \ 425 EXP_FCTRL_NPEB_ETH | EXP_FCTRL_RSA | EXP_FCTRL_MAXFREQ) 426 427#define EXP_FCTRL_BITS \ 428 "\20\1RCOMP\2USB\3HASH\4AES\5DES\6HDLC\7AAL\10HSS\11UTOPIA\12ETH0" \ 429 "\13ETH1\17PCI\20ECC\23USB_HOST\24NPEA_ETH\25NPEB_ETH\26RSA" 430 |
|
| 416/* 417 * PCI 418 */ 419#define IXP425_PCI_HWBASE 0xc0000000 420#define IXP425_PCI_VBASE (IXP425_EXP_VBASE + IXP425_EXP_SIZE) 421 /* 0xf0011000 */ 422#define IXP425_PCI_SIZE IXP425_REG_SIZE /* 0x1000 */ 423 --- 255 unchanged lines hidden --- | 431/* 432 * PCI 433 */ 434#define IXP425_PCI_HWBASE 0xc0000000 435#define IXP425_PCI_VBASE (IXP425_EXP_VBASE + IXP425_EXP_SIZE) 436 /* 0xf0011000 */ 437#define IXP425_PCI_SIZE IXP425_REG_SIZE /* 0x1000 */ 438 --- 255 unchanged lines hidden --- |