| i81342reg.h (171626) | i81342reg.h (172297) |
|---|---|
| 1/*- 2 * Copyright (c) 2006 Olivier Houchard 3 * All rights reserved. 4 * 5 * Redistribution and use in source and binary forms, with or without 6 * modification, are permitted provided that the following conditions 7 * are met: 8 * 1. Redistributions of source code must retain the above copyright --- 10 unchanged lines hidden (view full) --- 19 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 20 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 21 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 22 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 23 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 24 * POSSIBILITY OF SUCH DAMAGE. 25 */ 26 | 1/*- 2 * Copyright (c) 2006 Olivier Houchard 3 * All rights reserved. 4 * 5 * Redistribution and use in source and binary forms, with or without 6 * modification, are permitted provided that the following conditions 7 * are met: 8 * 1. Redistributions of source code must retain the above copyright --- 10 unchanged lines hidden (view full) --- 19 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 20 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 21 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 22 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 23 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 24 * POSSIBILITY OF SUCH DAMAGE. 25 */ 26 |
| 27/* $FreeBSD: head/sys/arm/xscale/i8134x/i81342reg.h 171626 2007-07-27 14:50:57Z cognet $ */ | 27/* $FreeBSD: head/sys/arm/xscale/i8134x/i81342reg.h 172297 2007-09-22 16:25:43Z cognet $ */ |
| 28 29#ifndef I83142_REG_H_ 30#define I83142_REG_H_ 31/* Physical Memory Map */ 32/* 33 * 0x000000000 - 0x07FFFFFFF SDRAM 34 * 0x090100000 - 0x0901FFFFF ATUe Outbound IO Window 35 * 0x0F0000000 - 0x0F1FFFFFF Flash --- 8 unchanged lines hidden (view full) --- 44 45#define IOP34X_VADDR 0xf0000000 46#define IOP34X_HWADDR 0xffd00000 47#define IOP34X_SIZE 0x100000 48 49#define IOP34X_PBBAR0 0x81588 /* PBI Base Address Register 0 */ 50#define IOP34X_PBBAR0_ADDRMASK 0xfffff000 51#define IOP34X_PBBAR1 0x81590 | 28 29#ifndef I83142_REG_H_ 30#define I83142_REG_H_ 31/* Physical Memory Map */ 32/* 33 * 0x000000000 - 0x07FFFFFFF SDRAM 34 * 0x090100000 - 0x0901FFFFF ATUe Outbound IO Window 35 * 0x0F0000000 - 0x0F1FFFFFF Flash --- 8 unchanged lines hidden (view full) --- 44 45#define IOP34X_VADDR 0xf0000000 46#define IOP34X_HWADDR 0xffd00000 47#define IOP34X_SIZE 0x100000 48 49#define IOP34X_PBBAR0 0x81588 /* PBI Base Address Register 0 */ 50#define IOP34X_PBBAR0_ADDRMASK 0xfffff000 51#define IOP34X_PBBAR1 0x81590 |
| 52#define IOP34X_PCE1 0xF2000000 53#define IOP34X_PCE1_SIZE 0x00100000 54#define IOP34X_PCE1_VADDR 0xF1000000 |
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| 52#define IOP34X_ESSTSR0 0x82188 53#define IOP34X_CONTROLLER_ONLY (1 << 14) 54#define IOP34X_INT_SEL_PCIX (1 << 15) 55#define IOP34X_PFR 0x82180 /* Processor Frequency Register */ 56#define IOP34X_FREQ_MASK ((1 << 16) | (1 << 17) | (1 << 18)) 57#define IOP34X_FREQ_600 (0) 58#define IOP34X_FREQ_667 (1 << 16) 59#define IOP34X_FREQ_800 (1 << 17) --- 247 unchanged lines hidden --- | 55#define IOP34X_ESSTSR0 0x82188 56#define IOP34X_CONTROLLER_ONLY (1 << 14) 57#define IOP34X_INT_SEL_PCIX (1 << 15) 58#define IOP34X_PFR 0x82180 /* Processor Frequency Register */ 59#define IOP34X_FREQ_MASK ((1 << 16) | (1 << 17) | (1 << 18)) 60#define IOP34X_FREQ_600 (0) 61#define IOP34X_FREQ_667 (1 << 16) 62#define IOP34X_FREQ_800 (1 << 17) --- 247 unchanged lines hidden --- |