1.\" -*- nroff -*- 2.\" 3.\" Copyright (c) 1996 A.R.Gordon, andrew.gordon@net-tel.co.uk 4.\" All rights reserved. 5.\" 6.\" Redistribution and use in source and binary forms, with or without 7.\" modification, are permitted provided that the following conditions 8.\" are met: 9.\" 1. Redistributions of source code must retain the above copyright 10.\" notice, this list of conditions and the following disclaimer. 11.\" 2. Redistributions in binary form must reproduce the above copyright 12.\" notice, this list of conditions and the following disclaimer in the 13.\" documentation and/or other materials provided with the distribution. 14.\" 3. All advertising materials mentioning features or use of this software 15.\" must display the following acknowledgement: 16.\" This product includes software developed by the University of 17.\" California, Berkeley and its contributors. 18.\" 4. Neither the name of the University nor the names of its contributors 19.\" may be used to endorse or promote products derived from this software 20.\" without specific prior written permission. 21.\" 22.\" THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND 23.\" ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 24.\" IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 25.\" ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE 26.\" FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 27.\" DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 28.\" OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 29.\" HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 30.\" LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 31.\" OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 32.\" SUCH DAMAGE. 33.\" 34.\" Id: man4.i386/lp.4,v 1.9 1999/02/14 12:06:16 nsouch Exp
| 1.\" -*- nroff -*- 2.\" 3.\" Copyright (c) 1996 A.R.Gordon, andrew.gordon@net-tel.co.uk 4.\" All rights reserved. 5.\" 6.\" Redistribution and use in source and binary forms, with or without 7.\" modification, are permitted provided that the following conditions 8.\" are met: 9.\" 1. Redistributions of source code must retain the above copyright 10.\" notice, this list of conditions and the following disclaimer. 11.\" 2. Redistributions in binary form must reproduce the above copyright 12.\" notice, this list of conditions and the following disclaimer in the 13.\" documentation and/or other materials provided with the distribution. 14.\" 3. All advertising materials mentioning features or use of this software 15.\" must display the following acknowledgement: 16.\" This product includes software developed by the University of 17.\" California, Berkeley and its contributors. 18.\" 4. Neither the name of the University nor the names of its contributors 19.\" may be used to endorse or promote products derived from this software 20.\" without specific prior written permission. 21.\" 22.\" THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND 23.\" ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 24.\" IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 25.\" ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE 26.\" FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 27.\" DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 28.\" OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 29.\" HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 30.\" LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 31.\" OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 32.\" SUCH DAMAGE. 33.\" 34.\" Id: man4.i386/lp.4,v 1.9 1999/02/14 12:06:16 nsouch Exp
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52.Sh DESCRIPTION 53The 54.Nm 55driver allows a PC parallel printer port to be used as a 56point-to-point network interface between two similarly configured systems. 57Data is transferred 4 bits at a time, using the printer status lines for 58input: hence there is no requirement for special bidirectional hardware 59and any standard AT-compatible printer port with working interrupts may be used. 60.Pp 61During the boot process, for each 62.Nm plip 63device which is probed and has an interrupt assigned, a corresponding 64.Nm network 65device is created. 66.Pp 67Configuring an 68.Nm 69device with 70.Xr ifconfig 8 71causes the corresponding 72.Nm parallel port bus 73to be reserved for PLIP until the network interface is configured 'down'. 74.Pp 75The communication protocol is selected by the 76.Cm link0 77flag: 78.Bl -tag -width Fl 79.It Fl link0 80(default) Use 81.Fx 82mode (LPIP). This is the simpler of the two modes 83and therefore slightly more efficient. 84.It Cm link0 85Use Crynwr/Linux compatible mode (CLPIP). This mode has a simulated ethernet 86packet header, and is easier to interface to other types of equipment. 87.El 88.Pp 89The interface MTU defaults to 1500, but may be set to any value. Both ends 90of the link must be configured with the same MTU. 91.Ss Cable Connections 92The cable connecting the two parallel ports should be wired as follows: 93.Bd -literal 94 Pin Pin Description 95 2 15 Data0 -> ERROR* 96 3 13 Data1 -> SLCT 97 4 12 Data2 -> PE 98 5 10 Data3 -> ACK* 99 6 11 Data4 -> BUSY 100 15 2 ERROR* -> Data0 101 13 3 SLCT -> Data1 102 12 4 PE -> Data2 103 10 5 ACK* -> Data3 104 11 6 BUSY -> Data4 105 18-25 18-25 Ground 106.Ed 107.Pp 108Cables with this wiring are widely available as 'Laplink' cables, and 109are often coloured yellow. 110.Pp 111The connections are symmetric, and provide 5 lines in each direction (four 112data plus one handshake). The two modes use the same wiring, but make a 113different choice of which line to use as handshake. 114.Ss FreeBSD LPIP mode 115The signal lines are used as follows: 116.Bl -tag -width dataxxxx(Pinxx) 117.It Em Data0 (Pin 2) 118Data out, bit 0. 119.It Em Data1 (Pin 3) 120Data out, bit 1. 121.It Em Data2 (Pin 4) 122Data out, bit 2. 123.It Em Data3 (Pin 5) 124Handshake out. 125.It Em Data4 (Pin 6) 126Data out, bit 3. 127.It Em ERROR* (pin 15) 128Data in, bit 0. 129.It Em SLCT (pin 13) 130Data in, bit 1. 131.It Em PE (pin 12) 132Data in, bit 2. 133.It Em BUSY (pin 11) 134Data in, bit 3. 135.It Em ACK* (pin 10) 136Handshake in. 137.El 138.Pp 139When idle, all data lines are at zero. Each byte is signalled in four steps: 140sender writes the 4 most significant bits and raises the handshake line; 141receiver reads the 4 bits and raises its handshake to acknowledge; 142sender places the 4 least significant bits on the data lines and lowers 143the handshake; receiver reads the data and lowers its handshake. 144.Pp 145The packet format has a two-byte header, comprising the fixed values 0x08, 1460x00, immediately followed by the IP header and data. 147.Pp 148The start of a packet is indicated by simply signalling the first byte 149of the header. The end of the packet is indicated by inverting 150the data lines (ie. writing the ones-complement of the previous nibble 151to be transmitted) without changing the state of the handshake. 152.Pp 153Note that the end-of-packet marker assumes that the handshake signal and 154the data-out bits can be written in a single instruction - otherwise 155certain byte values in the packet data would falsely be interpreted 156as end-of-packet. This is not a problem for the PC printer port, 157but requires care when implementing this protocol on other equipment. 158.Ss Crynwr/Linux CLPIP mode 159The signal lines are used as follows: 160.Bl -tag -width dataxxxx(Pinxx) 161.It Em Data0 (Pin 2) 162Data out, bit 0. 163.It Em Data1 (Pin 3) 164Data out, bit 1. 165.It Em Data2 (Pin 4) 166Data out, bit 2. 167.It Em Data3 (Pin 5) 168Data out, bit 3. 169.It Em Data4 (Pin 6) 170Handshake out. 171.It Em ERROR* (pin 15) 172Data in, bit 0. 173.It Em SLCT (pin 13) 174Data in, bit 1. 175.It Em PE (pin 12) 176Data in, bit 2. 177.It Em ACK* (pin 10) 178Data in, bit 3. 179.It Em BUSY (pin 11) 180Handshake in. 181.El 182.Pp 183When idle, all data lines are at zero. Each byte is signalled in four steps: 184sender writes the 4 least significant bits and raises the handshake line; 185receiver reads the 4 bits and raises its handshake to acknowledge; 186sender places the 4 most significant bits on the data lines and lowers 187the handshake; receiver reads the data and lowers its handshake. 188[Note that this is the opposite nibble order to LPIP mode]. 189.Pp 190Packet format is: 191.Bd -literal 192Length (least significant byte) 193Length (most significant byte) 19412 bytes of supposed MAC addresses (ignored by FreeBSD). 195Fixed byte 0x08 196Fixed byte 0x00 197<IP datagram> 198Checksum byte. 199.Ed 200.Pp 201The length includes the 14 header bytes, but not the length bytes themselves 202nor the checksum byte. 203.Pp 204The checksum is a simple arithmetic sum of all the bytes (again, including 205the header but not checksum or length bytes). 206.Fx 207calculates 208outgoing checksums, but does not validate incoming ones. 209.Pp 210The start of packet has to be signalled specially, since the line chosen 211for handshake-in cannot be used to generate an interrupt. The sender 212writes the value 0x08 to the data lines, and waits for the receiver 213to respond by writing 0x01 to its data lines. The sender then starts 214signalling the first byte of the packet (the length byte). 215.Pp 216End of packet is deduced from the packet length and is not signalled 217specially (although the data lines are restored to the zero, idle 218state to avoid spuriously indicating the start of the next packet). 219.Sh SEE ALSO 220.Xr ppbus 4 , 221.Xr ppc 4 , 222.Xr ifconfig 8 223.Sh BUGS 224Busy-waiting loops are used while handshaking bytes, (and worse still when 225waiting for the receiving system to respond to an interrupt for the start 226of a packet). Hence a fast system talking to a slow one will consume 227excessive amounts of CPU. This is unavoidable in the case of CLPIP mode 228due to the choice of handshake lines; it could theoretically be improved 229in the case of LPIP mode. 230.Pp 231Polling timeouts are controlled by counting loop iterations rather than 232timers, and so are dependent on CPU speed. This is somewhat stabilised 233by the need to perform (slow) ISA bus cycles to actually read the port.
| 52.Sh DESCRIPTION 53The 54.Nm 55driver allows a PC parallel printer port to be used as a 56point-to-point network interface between two similarly configured systems. 57Data is transferred 4 bits at a time, using the printer status lines for 58input: hence there is no requirement for special bidirectional hardware 59and any standard AT-compatible printer port with working interrupts may be used. 60.Pp 61During the boot process, for each 62.Nm plip 63device which is probed and has an interrupt assigned, a corresponding 64.Nm network 65device is created. 66.Pp 67Configuring an 68.Nm 69device with 70.Xr ifconfig 8 71causes the corresponding 72.Nm parallel port bus 73to be reserved for PLIP until the network interface is configured 'down'. 74.Pp 75The communication protocol is selected by the 76.Cm link0 77flag: 78.Bl -tag -width Fl 79.It Fl link0 80(default) Use 81.Fx 82mode (LPIP). This is the simpler of the two modes 83and therefore slightly more efficient. 84.It Cm link0 85Use Crynwr/Linux compatible mode (CLPIP). This mode has a simulated ethernet 86packet header, and is easier to interface to other types of equipment. 87.El 88.Pp 89The interface MTU defaults to 1500, but may be set to any value. Both ends 90of the link must be configured with the same MTU. 91.Ss Cable Connections 92The cable connecting the two parallel ports should be wired as follows: 93.Bd -literal 94 Pin Pin Description 95 2 15 Data0 -> ERROR* 96 3 13 Data1 -> SLCT 97 4 12 Data2 -> PE 98 5 10 Data3 -> ACK* 99 6 11 Data4 -> BUSY 100 15 2 ERROR* -> Data0 101 13 3 SLCT -> Data1 102 12 4 PE -> Data2 103 10 5 ACK* -> Data3 104 11 6 BUSY -> Data4 105 18-25 18-25 Ground 106.Ed 107.Pp 108Cables with this wiring are widely available as 'Laplink' cables, and 109are often coloured yellow. 110.Pp 111The connections are symmetric, and provide 5 lines in each direction (four 112data plus one handshake). The two modes use the same wiring, but make a 113different choice of which line to use as handshake. 114.Ss FreeBSD LPIP mode 115The signal lines are used as follows: 116.Bl -tag -width dataxxxx(Pinxx) 117.It Em Data0 (Pin 2) 118Data out, bit 0. 119.It Em Data1 (Pin 3) 120Data out, bit 1. 121.It Em Data2 (Pin 4) 122Data out, bit 2. 123.It Em Data3 (Pin 5) 124Handshake out. 125.It Em Data4 (Pin 6) 126Data out, bit 3. 127.It Em ERROR* (pin 15) 128Data in, bit 0. 129.It Em SLCT (pin 13) 130Data in, bit 1. 131.It Em PE (pin 12) 132Data in, bit 2. 133.It Em BUSY (pin 11) 134Data in, bit 3. 135.It Em ACK* (pin 10) 136Handshake in. 137.El 138.Pp 139When idle, all data lines are at zero. Each byte is signalled in four steps: 140sender writes the 4 most significant bits and raises the handshake line; 141receiver reads the 4 bits and raises its handshake to acknowledge; 142sender places the 4 least significant bits on the data lines and lowers 143the handshake; receiver reads the data and lowers its handshake. 144.Pp 145The packet format has a two-byte header, comprising the fixed values 0x08, 1460x00, immediately followed by the IP header and data. 147.Pp 148The start of a packet is indicated by simply signalling the first byte 149of the header. The end of the packet is indicated by inverting 150the data lines (ie. writing the ones-complement of the previous nibble 151to be transmitted) without changing the state of the handshake. 152.Pp 153Note that the end-of-packet marker assumes that the handshake signal and 154the data-out bits can be written in a single instruction - otherwise 155certain byte values in the packet data would falsely be interpreted 156as end-of-packet. This is not a problem for the PC printer port, 157but requires care when implementing this protocol on other equipment. 158.Ss Crynwr/Linux CLPIP mode 159The signal lines are used as follows: 160.Bl -tag -width dataxxxx(Pinxx) 161.It Em Data0 (Pin 2) 162Data out, bit 0. 163.It Em Data1 (Pin 3) 164Data out, bit 1. 165.It Em Data2 (Pin 4) 166Data out, bit 2. 167.It Em Data3 (Pin 5) 168Data out, bit 3. 169.It Em Data4 (Pin 6) 170Handshake out. 171.It Em ERROR* (pin 15) 172Data in, bit 0. 173.It Em SLCT (pin 13) 174Data in, bit 1. 175.It Em PE (pin 12) 176Data in, bit 2. 177.It Em ACK* (pin 10) 178Data in, bit 3. 179.It Em BUSY (pin 11) 180Handshake in. 181.El 182.Pp 183When idle, all data lines are at zero. Each byte is signalled in four steps: 184sender writes the 4 least significant bits and raises the handshake line; 185receiver reads the 4 bits and raises its handshake to acknowledge; 186sender places the 4 most significant bits on the data lines and lowers 187the handshake; receiver reads the data and lowers its handshake. 188[Note that this is the opposite nibble order to LPIP mode]. 189.Pp 190Packet format is: 191.Bd -literal 192Length (least significant byte) 193Length (most significant byte) 19412 bytes of supposed MAC addresses (ignored by FreeBSD). 195Fixed byte 0x08 196Fixed byte 0x00 197<IP datagram> 198Checksum byte. 199.Ed 200.Pp 201The length includes the 14 header bytes, but not the length bytes themselves 202nor the checksum byte. 203.Pp 204The checksum is a simple arithmetic sum of all the bytes (again, including 205the header but not checksum or length bytes). 206.Fx 207calculates 208outgoing checksums, but does not validate incoming ones. 209.Pp 210The start of packet has to be signalled specially, since the line chosen 211for handshake-in cannot be used to generate an interrupt. The sender 212writes the value 0x08 to the data lines, and waits for the receiver 213to respond by writing 0x01 to its data lines. The sender then starts 214signalling the first byte of the packet (the length byte). 215.Pp 216End of packet is deduced from the packet length and is not signalled 217specially (although the data lines are restored to the zero, idle 218state to avoid spuriously indicating the start of the next packet). 219.Sh SEE ALSO 220.Xr ppbus 4 , 221.Xr ppc 4 , 222.Xr ifconfig 8 223.Sh BUGS 224Busy-waiting loops are used while handshaking bytes, (and worse still when 225waiting for the receiving system to respond to an interrupt for the start 226of a packet). Hence a fast system talking to a slow one will consume 227excessive amounts of CPU. This is unavoidable in the case of CLPIP mode 228due to the choice of handshake lines; it could theoretically be improved 229in the case of LPIP mode. 230.Pp 231Polling timeouts are controlled by counting loop iterations rather than 232timers, and so are dependent on CPU speed. This is somewhat stabilised 233by the need to perform (slow) ISA bus cycles to actually read the port.
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