| 1/*- 2 * Copyright (c) 2003-2008 Joseph Koshy 3 * All rights reserved. 4 * 5 * Redistribution and use in source and binary forms, with or without 6 * modification, are permitted provided that the following conditions 7 * are met: 8 * 1. Redistributions of source code must retain the above copyright --- 11 unchanged lines hidden (view full) --- 20 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 21 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 22 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 23 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 24 * SUCH DAMAGE. 25 */ 26 27#include <sys/cdefs.h> |
| 28__FBSDID("$FreeBSD: head/lib/libpmc/libpmc.c 232366 2012-03-01 21:23:26Z davide $"); |
| 29 30#include <sys/types.h> 31#include <sys/module.h> 32#include <sys/pmc.h> 33#include <sys/syscall.h> 34 35#include <ctype.h> 36#include <errno.h> --- 137 unchanged lines hidden (view full) --- 174 __PMC_EV_ALIAS_CORE2() 175}; 176 177static const struct pmc_event_descr corei7_event_table[] = 178{ 179 __PMC_EV_ALIAS_COREI7() 180}; 181 |
| 182static const struct pmc_event_descr sandybridge_event_table[] = 183{ 184 __PMC_EV_ALIAS_SANDYBRIDGE() 185}; 186 |
| 187static const struct pmc_event_descr westmere_event_table[] = 188{ 189 __PMC_EV_ALIAS_WESTMERE() 190}; 191 192static const struct pmc_event_descr corei7uc_event_table[] = 193{ 194 __PMC_EV_ALIAS_COREI7UC() 195}; 196 |
| 197static const struct pmc_event_descr sandybridgeuc_event_table[] = 198{ 199 __PMC_EV_ALIAS_SANDYBRIDGEUC() 200}; 201 |
| 202static const struct pmc_event_descr westmereuc_event_table[] = 203{ 204 __PMC_EV_ALIAS_WESTMEREUC() 205}; 206 207/* 208 * PMC_MDEP_TABLE(NAME, PRIMARYCLASS, ADDITIONAL_CLASSES...) 209 * 210 * Map a CPU to the PMC classes it supports. 211 */ 212#define PMC_MDEP_TABLE(N,C,...) \ 213 static const enum pmc_class N##_pmc_classes[] = { \ 214 PMC_CLASS_##C, __VA_ARGS__ \ 215 } 216 217PMC_MDEP_TABLE(atom, IAP, PMC_CLASS_IAF, PMC_CLASS_TSC); 218PMC_MDEP_TABLE(core, IAP, PMC_CLASS_TSC); 219PMC_MDEP_TABLE(core2, IAP, PMC_CLASS_IAF, PMC_CLASS_TSC); 220PMC_MDEP_TABLE(corei7, IAP, PMC_CLASS_IAF, PMC_CLASS_TSC, PMC_CLASS_UCF, PMC_CLASS_UCP); |
| 221PMC_MDEP_TABLE(sandybridge, IAP, PMC_CLASS_IAF, PMC_CLASS_TSC, PMC_CLASS_UCF, PMC_CLASS_UCP); |
| 222PMC_MDEP_TABLE(westmere, IAP, PMC_CLASS_IAF, PMC_CLASS_TSC, PMC_CLASS_UCF, PMC_CLASS_UCP); 223PMC_MDEP_TABLE(k7, K7, PMC_CLASS_TSC); 224PMC_MDEP_TABLE(k8, K8, PMC_CLASS_TSC); 225PMC_MDEP_TABLE(p4, P4, PMC_CLASS_TSC); 226PMC_MDEP_TABLE(p5, P5, PMC_CLASS_TSC); 227PMC_MDEP_TABLE(p6, P6, PMC_CLASS_TSC); 228PMC_MDEP_TABLE(xscale, XSCALE, PMC_CLASS_XSCALE); 229PMC_MDEP_TABLE(mips24k, MIPS24K, PMC_CLASS_MIPS24K); --- 18 unchanged lines hidden (view full) --- 248 } 249 250#if defined(__i386__) || defined(__amd64__) 251PMC_CLASS_TABLE_DESC(iaf, IAF, iaf, iaf); 252PMC_CLASS_TABLE_DESC(atom, IAP, atom, iap); 253PMC_CLASS_TABLE_DESC(core, IAP, core, iap); 254PMC_CLASS_TABLE_DESC(core2, IAP, core2, iap); 255PMC_CLASS_TABLE_DESC(corei7, IAP, corei7, iap); |
| 256PMC_CLASS_TABLE_DESC(sandybridge, IAP, sandybridge, iap); |
| 257PMC_CLASS_TABLE_DESC(westmere, IAP, westmere, iap); 258PMC_CLASS_TABLE_DESC(ucf, UCF, ucf, ucf); 259PMC_CLASS_TABLE_DESC(corei7uc, UCP, corei7uc, ucp); |
| 260PMC_CLASS_TABLE_DESC(sandybridgeuc, UCP, sandybridgeuc, ucp); |
| 261PMC_CLASS_TABLE_DESC(westmereuc, UCP, westmereuc, ucp); 262#endif 263#if defined(__i386__) 264PMC_CLASS_TABLE_DESC(k7, K7, k7, k7); 265#endif 266#if defined(__i386__) || defined(__amd64__) 267PMC_CLASS_TABLE_DESC(k8, K8, k8, k8); 268PMC_CLASS_TABLE_DESC(p4, P4, p4, p4); --- 269 unchanged lines hidden (view full) --- 538 EV_ALIAS("unhalted-cycles", "iap-cpu-clk-unhalted.core_p"), 539 EV_ALIAS(NULL, NULL) 540}; 541 542#define atom_aliases core2_aliases 543#define atom_aliases_without_iaf core2_aliases_without_iaf 544#define corei7_aliases core2_aliases 545#define corei7_aliases_without_iaf core2_aliases_without_iaf |
| 546#define sandybridge_aliases core2_aliases 547#define sandybridge_aliases_without_iaf core2_aliases_without_iaf |
| 548#define westmere_aliases core2_aliases 549#define westmere_aliases_without_iaf core2_aliases_without_iaf 550 551#define IAF_KW_OS "os" 552#define IAF_KW_USR "usr" 553#define IAF_KW_ANYTHREAD "anythread" 554 555/* --- 2016 unchanged lines hidden (view full) --- 2572 case PMC_CPU_INTEL_CORE2EXTREME: 2573 ev = core2_event_table; 2574 count = PMC_EVENT_TABLE_SIZE(core2); 2575 break; 2576 case PMC_CPU_INTEL_COREI7: 2577 ev = corei7_event_table; 2578 count = PMC_EVENT_TABLE_SIZE(corei7); 2579 break; |
| 2580 case PMC_CPU_INTEL_SANDYBRIDGE: 2581 ev = sandybridge_event_table; 2582 count = PMC_EVENT_TABLE_SIZE(sandybridge); 2583 break; |
| 2584 case PMC_CPU_INTEL_WESTMERE: 2585 ev = westmere_event_table; 2586 count = PMC_EVENT_TABLE_SIZE(westmere); 2587 break; 2588 } 2589 break; 2590 case PMC_CLASS_UCF: 2591 ev = ucf_event_table; --- 5 unchanged lines hidden (view full) --- 2597 * spellings for the current CPU. 2598 */ 2599 switch (cpu_info.pm_cputype) { 2600 default: 2601 case PMC_CPU_INTEL_COREI7: 2602 ev = corei7uc_event_table; 2603 count = PMC_EVENT_TABLE_SIZE(corei7uc); 2604 break; |
| 2605 case PMC_CPU_INTEL_SANDYBRIDGE: 2606 ev = sandybridgeuc_event_table; 2607 count = PMC_EVENT_TABLE_SIZE(sandybridgeuc); 2608 break; |
| 2609 case PMC_CPU_INTEL_WESTMERE: 2610 ev = westmereuc_event_table; 2611 count = PMC_EVENT_TABLE_SIZE(westmereuc); 2612 break; 2613 } 2614 break; 2615 case PMC_CLASS_TSC: 2616 ev = tsc_event_table; --- 215 unchanged lines hidden (view full) --- 2832 case PMC_CPU_INTEL_CORE2EXTREME: 2833 PMC_MDEP_INIT_INTEL_V2(core2); 2834 break; 2835 case PMC_CPU_INTEL_COREI7: 2836 pmc_class_table[n++] = &ucf_class_table_descr; 2837 pmc_class_table[n++] = &corei7uc_class_table_descr; 2838 PMC_MDEP_INIT_INTEL_V2(corei7); 2839 break; |
| 2840 case PMC_CPU_INTEL_SANDYBRIDGE: 2841 pmc_class_table[n++] = &ucf_class_table_descr; 2842 pmc_class_table[n++] = &sandybridgeuc_class_table_descr; 2843 PMC_MDEP_INIT_INTEL_V2(sandybridge); 2844 break; |
| 2845 case PMC_CPU_INTEL_WESTMERE: 2846 pmc_class_table[n++] = &ucf_class_table_descr; 2847 pmc_class_table[n++] = &westmereuc_class_table_descr; 2848 PMC_MDEP_INIT_INTEL_V2(westmere); 2849 break; 2850 case PMC_CPU_INTEL_PIV: 2851 PMC_MDEP_INIT(p4); 2852 pmc_class_table[n] = &p4_class_table_descr; --- 107 unchanged lines hidden (view full) --- 2960 case PMC_CPU_INTEL_CORE2EXTREME: 2961 ev = core2_event_table; 2962 evfence = core2_event_table + PMC_EVENT_TABLE_SIZE(core2); 2963 break; 2964 case PMC_CPU_INTEL_COREI7: 2965 ev = corei7_event_table; 2966 evfence = corei7_event_table + PMC_EVENT_TABLE_SIZE(corei7); 2967 break; |
| 2968 case PMC_CPU_INTEL_SANDYBRIDGE: 2969 ev = sandybridge_event_table; 2970 evfence = sandybridge_event_table + PMC_EVENT_TABLE_SIZE(sandybridge); 2971 break; |
| 2972 case PMC_CPU_INTEL_WESTMERE: 2973 ev = westmere_event_table; 2974 evfence = westmere_event_table + PMC_EVENT_TABLE_SIZE(westmere); 2975 break; 2976 default: /* Unknown CPU type. */ 2977 break; 2978 } 2979 } else if (pe >= PMC_EV_UCF_FIRST && pe <= PMC_EV_UCF_LAST) { 2980 ev = ucf_event_table; 2981 evfence = ucf_event_table + PMC_EVENT_TABLE_SIZE(ucf); 2982 } else if (pe >= PMC_EV_UCP_FIRST && pe <= PMC_EV_UCP_LAST) { 2983 switch (cpu) { 2984 case PMC_CPU_INTEL_COREI7: 2985 ev = corei7uc_event_table; 2986 evfence = corei7uc_event_table + PMC_EVENT_TABLE_SIZE(corei7uc); 2987 break; |
| 2988 case PMC_CPU_INTEL_SANDYBRIDGE: 2989 ev = sandybridgeuc_event_table; 2990 evfence = sandybridgeuc_event_table + PMC_EVENT_TABLE_SIZE(sandybridgeuc); 2991 break; |
| 2992 case PMC_CPU_INTEL_WESTMERE: 2993 ev = westmereuc_event_table; 2994 evfence = westmereuc_event_table + PMC_EVENT_TABLE_SIZE(westmereuc); 2995 break; 2996 default: /* Unknown CPU type. */ 2997 break; 2998 } 2999 } else if (pe >= PMC_EV_K7_FIRST && pe <= PMC_EV_K7_LAST) { --- 232 unchanged lines hidden --- |