1/*-
2 * Copyright (c) 2003-2008 Joseph Koshy
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions
7 * are met:
8 * 1. Redistributions of source code must retain the above copyright
--- 11 unchanged lines hidden (view full) ---
20 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
21 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
22 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
23 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
24 * SUCH DAMAGE.
25 */
26
27#include <sys/cdefs.h>
28__FBSDID("$FreeBSD: head/lib/libpmc/libpmc.c 228869 2011-12-24 19:34:52Z jhibbits $");
29
30#include <sys/types.h>
31#include <sys/module.h>
32#include <sys/pmc.h>
33#include <sys/syscall.h>
34
35#include <ctype.h>
36#include <errno.h>
--- 137 unchanged lines hidden (view full) ---
174 __PMC_EV_ALIAS_CORE2()
175};
176
177static const struct pmc_event_descr corei7_event_table[] =
178{
179 __PMC_EV_ALIAS_COREI7()
180};
181
182static const struct pmc_event_descr westmere_event_table[] =
183{
184 __PMC_EV_ALIAS_WESTMERE()
185};
186
187static const struct pmc_event_descr corei7uc_event_table[] =
188{
189 __PMC_EV_ALIAS_COREI7UC()
190};
191
192static const struct pmc_event_descr westmereuc_event_table[] =
193{
194 __PMC_EV_ALIAS_WESTMEREUC()
195};
196
197/*
198 * PMC_MDEP_TABLE(NAME, PRIMARYCLASS, ADDITIONAL_CLASSES...)
199 *
200 * Map a CPU to the PMC classes it supports.
201 */
202#define PMC_MDEP_TABLE(N,C,...) \
203 static const enum pmc_class N##_pmc_classes[] = { \
204 PMC_CLASS_##C, __VA_ARGS__ \
205 }
206
207PMC_MDEP_TABLE(atom, IAP, PMC_CLASS_IAF, PMC_CLASS_TSC);
208PMC_MDEP_TABLE(core, IAP, PMC_CLASS_TSC);
209PMC_MDEP_TABLE(core2, IAP, PMC_CLASS_IAF, PMC_CLASS_TSC);
210PMC_MDEP_TABLE(corei7, IAP, PMC_CLASS_IAF, PMC_CLASS_TSC, PMC_CLASS_UCF, PMC_CLASS_UCP);
211PMC_MDEP_TABLE(westmere, IAP, PMC_CLASS_IAF, PMC_CLASS_TSC, PMC_CLASS_UCF, PMC_CLASS_UCP);
212PMC_MDEP_TABLE(k7, K7, PMC_CLASS_TSC);
213PMC_MDEP_TABLE(k8, K8, PMC_CLASS_TSC);
214PMC_MDEP_TABLE(p4, P4, PMC_CLASS_TSC);
215PMC_MDEP_TABLE(p5, P5, PMC_CLASS_TSC);
216PMC_MDEP_TABLE(p6, P6, PMC_CLASS_TSC);
217PMC_MDEP_TABLE(xscale, XSCALE, PMC_CLASS_XSCALE);
218PMC_MDEP_TABLE(mips24k, MIPS24K, PMC_CLASS_MIPS24K);
--- 18 unchanged lines hidden (view full) ---
237 }
238
239#if defined(__i386__) || defined(__amd64__)
240PMC_CLASS_TABLE_DESC(iaf, IAF, iaf, iaf);
241PMC_CLASS_TABLE_DESC(atom, IAP, atom, iap);
242PMC_CLASS_TABLE_DESC(core, IAP, core, iap);
243PMC_CLASS_TABLE_DESC(core2, IAP, core2, iap);
244PMC_CLASS_TABLE_DESC(corei7, IAP, corei7, iap);
245PMC_CLASS_TABLE_DESC(westmere, IAP, westmere, iap);
246PMC_CLASS_TABLE_DESC(ucf, UCF, ucf, ucf);
247PMC_CLASS_TABLE_DESC(corei7uc, UCP, corei7uc, ucp);
248PMC_CLASS_TABLE_DESC(westmereuc, UCP, westmereuc, ucp);
249#endif
250#if defined(__i386__)
251PMC_CLASS_TABLE_DESC(k7, K7, k7, k7);
252#endif
253#if defined(__i386__) || defined(__amd64__)
254PMC_CLASS_TABLE_DESC(k8, K8, k8, k8);
255PMC_CLASS_TABLE_DESC(p4, P4, p4, p4);
--- 269 unchanged lines hidden (view full) ---
525 EV_ALIAS("unhalted-cycles", "iap-cpu-clk-unhalted.core_p"),
526 EV_ALIAS(NULL, NULL)
527};
528
529#define atom_aliases core2_aliases
530#define atom_aliases_without_iaf core2_aliases_without_iaf
531#define corei7_aliases core2_aliases
532#define corei7_aliases_without_iaf core2_aliases_without_iaf
533#define westmere_aliases core2_aliases
534#define westmere_aliases_without_iaf core2_aliases_without_iaf
535
536#define IAF_KW_OS "os"
537#define IAF_KW_USR "usr"
538#define IAF_KW_ANYTHREAD "anythread"
539
540/*
--- 2016 unchanged lines hidden (view full) ---
2557 case PMC_CPU_INTEL_CORE2EXTREME:
2558 ev = core2_event_table;
2559 count = PMC_EVENT_TABLE_SIZE(core2);
2560 break;
2561 case PMC_CPU_INTEL_COREI7:
2562 ev = corei7_event_table;
2563 count = PMC_EVENT_TABLE_SIZE(corei7);
2564 break;
2565 case PMC_CPU_INTEL_WESTMERE:
2566 ev = westmere_event_table;
2567 count = PMC_EVENT_TABLE_SIZE(westmere);
2568 break;
2569 }
2570 break;
2571 case PMC_CLASS_UCF:
2572 ev = ucf_event_table;
--- 5 unchanged lines hidden (view full) ---
2578 * spellings for the current CPU.
2579 */
2580 switch (cpu_info.pm_cputype) {
2581 default:
2582 case PMC_CPU_INTEL_COREI7:
2583 ev = corei7uc_event_table;
2584 count = PMC_EVENT_TABLE_SIZE(corei7uc);
2585 break;
2586 case PMC_CPU_INTEL_WESTMERE:
2587 ev = westmereuc_event_table;
2588 count = PMC_EVENT_TABLE_SIZE(westmereuc);
2589 break;
2590 }
2591 break;
2592 case PMC_CLASS_TSC:
2593 ev = tsc_event_table;
--- 215 unchanged lines hidden (view full) ---
2809 case PMC_CPU_INTEL_CORE2EXTREME:
2810 PMC_MDEP_INIT_INTEL_V2(core2);
2811 break;
2812 case PMC_CPU_INTEL_COREI7:
2813 pmc_class_table[n++] = &ucf_class_table_descr;
2814 pmc_class_table[n++] = &corei7uc_class_table_descr;
2815 PMC_MDEP_INIT_INTEL_V2(corei7);
2816 break;
2817 case PMC_CPU_INTEL_WESTMERE:
2818 pmc_class_table[n++] = &ucf_class_table_descr;
2819 pmc_class_table[n++] = &westmereuc_class_table_descr;
2820 PMC_MDEP_INIT_INTEL_V2(westmere);
2821 break;
2822 case PMC_CPU_INTEL_PIV:
2823 PMC_MDEP_INIT(p4);
2824 pmc_class_table[n] = &p4_class_table_descr;
--- 107 unchanged lines hidden (view full) ---
2932 case PMC_CPU_INTEL_CORE2EXTREME:
2933 ev = core2_event_table;
2934 evfence = core2_event_table + PMC_EVENT_TABLE_SIZE(core2);
2935 break;
2936 case PMC_CPU_INTEL_COREI7:
2937 ev = corei7_event_table;
2938 evfence = corei7_event_table + PMC_EVENT_TABLE_SIZE(corei7);
2939 break;
2940 case PMC_CPU_INTEL_WESTMERE:
2941 ev = westmere_event_table;
2942 evfence = westmere_event_table + PMC_EVENT_TABLE_SIZE(westmere);
2943 break;
2944 default: /* Unknown CPU type. */
2945 break;
2946 }
2947 } else if (pe >= PMC_EV_UCF_FIRST && pe <= PMC_EV_UCF_LAST) {
2948 ev = ucf_event_table;
2949 evfence = ucf_event_table + PMC_EVENT_TABLE_SIZE(ucf);
2950 } else if (pe >= PMC_EV_UCP_FIRST && pe <= PMC_EV_UCP_LAST) {
2951 switch (cpu) {
2952 case PMC_CPU_INTEL_COREI7:
2953 ev = corei7uc_event_table;
2954 evfence = corei7uc_event_table + PMC_EVENT_TABLE_SIZE(corei7uc);
2955 break;
2956 case PMC_CPU_INTEL_WESTMERE:
2957 ev = westmereuc_event_table;
2958 evfence = westmereuc_event_table + PMC_EVENT_TABLE_SIZE(westmereuc);
2959 break;
2960 default: /* Unknown CPU type. */
2961 break;
2962 }
2963 } else if (pe >= PMC_EV_K7_FIRST && pe <= PMC_EV_K7_LAST) {
--- 232 unchanged lines hidden ---
2 * Copyright (c) 2003-2008 Joseph Koshy
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions
7 * are met:
8 * 1. Redistributions of source code must retain the above copyright
--- 11 unchanged lines hidden (view full) ---
20 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
21 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
22 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
23 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
24 * SUCH DAMAGE.
25 */
26
27#include <sys/cdefs.h>
28__FBSDID("$FreeBSD: head/lib/libpmc/libpmc.c 228869 2011-12-24 19:34:52Z jhibbits $");
29
30#include <sys/types.h>
31#include <sys/module.h>
32#include <sys/pmc.h>
33#include <sys/syscall.h>
34
35#include <ctype.h>
36#include <errno.h>
--- 137 unchanged lines hidden (view full) ---
174 __PMC_EV_ALIAS_CORE2()
175};
176
177static const struct pmc_event_descr corei7_event_table[] =
178{
179 __PMC_EV_ALIAS_COREI7()
180};
181
182static const struct pmc_event_descr westmere_event_table[] =
183{
184 __PMC_EV_ALIAS_WESTMERE()
185};
186
187static const struct pmc_event_descr corei7uc_event_table[] =
188{
189 __PMC_EV_ALIAS_COREI7UC()
190};
191
192static const struct pmc_event_descr westmereuc_event_table[] =
193{
194 __PMC_EV_ALIAS_WESTMEREUC()
195};
196
197/*
198 * PMC_MDEP_TABLE(NAME, PRIMARYCLASS, ADDITIONAL_CLASSES...)
199 *
200 * Map a CPU to the PMC classes it supports.
201 */
202#define PMC_MDEP_TABLE(N,C,...) \
203 static const enum pmc_class N##_pmc_classes[] = { \
204 PMC_CLASS_##C, __VA_ARGS__ \
205 }
206
207PMC_MDEP_TABLE(atom, IAP, PMC_CLASS_IAF, PMC_CLASS_TSC);
208PMC_MDEP_TABLE(core, IAP, PMC_CLASS_TSC);
209PMC_MDEP_TABLE(core2, IAP, PMC_CLASS_IAF, PMC_CLASS_TSC);
210PMC_MDEP_TABLE(corei7, IAP, PMC_CLASS_IAF, PMC_CLASS_TSC, PMC_CLASS_UCF, PMC_CLASS_UCP);
211PMC_MDEP_TABLE(westmere, IAP, PMC_CLASS_IAF, PMC_CLASS_TSC, PMC_CLASS_UCF, PMC_CLASS_UCP);
212PMC_MDEP_TABLE(k7, K7, PMC_CLASS_TSC);
213PMC_MDEP_TABLE(k8, K8, PMC_CLASS_TSC);
214PMC_MDEP_TABLE(p4, P4, PMC_CLASS_TSC);
215PMC_MDEP_TABLE(p5, P5, PMC_CLASS_TSC);
216PMC_MDEP_TABLE(p6, P6, PMC_CLASS_TSC);
217PMC_MDEP_TABLE(xscale, XSCALE, PMC_CLASS_XSCALE);
218PMC_MDEP_TABLE(mips24k, MIPS24K, PMC_CLASS_MIPS24K);
--- 18 unchanged lines hidden (view full) ---
237 }
238
239#if defined(__i386__) || defined(__amd64__)
240PMC_CLASS_TABLE_DESC(iaf, IAF, iaf, iaf);
241PMC_CLASS_TABLE_DESC(atom, IAP, atom, iap);
242PMC_CLASS_TABLE_DESC(core, IAP, core, iap);
243PMC_CLASS_TABLE_DESC(core2, IAP, core2, iap);
244PMC_CLASS_TABLE_DESC(corei7, IAP, corei7, iap);
245PMC_CLASS_TABLE_DESC(westmere, IAP, westmere, iap);
246PMC_CLASS_TABLE_DESC(ucf, UCF, ucf, ucf);
247PMC_CLASS_TABLE_DESC(corei7uc, UCP, corei7uc, ucp);
248PMC_CLASS_TABLE_DESC(westmereuc, UCP, westmereuc, ucp);
249#endif
250#if defined(__i386__)
251PMC_CLASS_TABLE_DESC(k7, K7, k7, k7);
252#endif
253#if defined(__i386__) || defined(__amd64__)
254PMC_CLASS_TABLE_DESC(k8, K8, k8, k8);
255PMC_CLASS_TABLE_DESC(p4, P4, p4, p4);
--- 269 unchanged lines hidden (view full) ---
525 EV_ALIAS("unhalted-cycles", "iap-cpu-clk-unhalted.core_p"),
526 EV_ALIAS(NULL, NULL)
527};
528
529#define atom_aliases core2_aliases
530#define atom_aliases_without_iaf core2_aliases_without_iaf
531#define corei7_aliases core2_aliases
532#define corei7_aliases_without_iaf core2_aliases_without_iaf
533#define westmere_aliases core2_aliases
534#define westmere_aliases_without_iaf core2_aliases_without_iaf
535
536#define IAF_KW_OS "os"
537#define IAF_KW_USR "usr"
538#define IAF_KW_ANYTHREAD "anythread"
539
540/*
--- 2016 unchanged lines hidden (view full) ---
2557 case PMC_CPU_INTEL_CORE2EXTREME:
2558 ev = core2_event_table;
2559 count = PMC_EVENT_TABLE_SIZE(core2);
2560 break;
2561 case PMC_CPU_INTEL_COREI7:
2562 ev = corei7_event_table;
2563 count = PMC_EVENT_TABLE_SIZE(corei7);
2564 break;
2565 case PMC_CPU_INTEL_WESTMERE:
2566 ev = westmere_event_table;
2567 count = PMC_EVENT_TABLE_SIZE(westmere);
2568 break;
2569 }
2570 break;
2571 case PMC_CLASS_UCF:
2572 ev = ucf_event_table;
--- 5 unchanged lines hidden (view full) ---
2578 * spellings for the current CPU.
2579 */
2580 switch (cpu_info.pm_cputype) {
2581 default:
2582 case PMC_CPU_INTEL_COREI7:
2583 ev = corei7uc_event_table;
2584 count = PMC_EVENT_TABLE_SIZE(corei7uc);
2585 break;
2586 case PMC_CPU_INTEL_WESTMERE:
2587 ev = westmereuc_event_table;
2588 count = PMC_EVENT_TABLE_SIZE(westmereuc);
2589 break;
2590 }
2591 break;
2592 case PMC_CLASS_TSC:
2593 ev = tsc_event_table;
--- 215 unchanged lines hidden (view full) ---
2809 case PMC_CPU_INTEL_CORE2EXTREME:
2810 PMC_MDEP_INIT_INTEL_V2(core2);
2811 break;
2812 case PMC_CPU_INTEL_COREI7:
2813 pmc_class_table[n++] = &ucf_class_table_descr;
2814 pmc_class_table[n++] = &corei7uc_class_table_descr;
2815 PMC_MDEP_INIT_INTEL_V2(corei7);
2816 break;
2817 case PMC_CPU_INTEL_WESTMERE:
2818 pmc_class_table[n++] = &ucf_class_table_descr;
2819 pmc_class_table[n++] = &westmereuc_class_table_descr;
2820 PMC_MDEP_INIT_INTEL_V2(westmere);
2821 break;
2822 case PMC_CPU_INTEL_PIV:
2823 PMC_MDEP_INIT(p4);
2824 pmc_class_table[n] = &p4_class_table_descr;
--- 107 unchanged lines hidden (view full) ---
2932 case PMC_CPU_INTEL_CORE2EXTREME:
2933 ev = core2_event_table;
2934 evfence = core2_event_table + PMC_EVENT_TABLE_SIZE(core2);
2935 break;
2936 case PMC_CPU_INTEL_COREI7:
2937 ev = corei7_event_table;
2938 evfence = corei7_event_table + PMC_EVENT_TABLE_SIZE(corei7);
2939 break;
2940 case PMC_CPU_INTEL_WESTMERE:
2941 ev = westmere_event_table;
2942 evfence = westmere_event_table + PMC_EVENT_TABLE_SIZE(westmere);
2943 break;
2944 default: /* Unknown CPU type. */
2945 break;
2946 }
2947 } else if (pe >= PMC_EV_UCF_FIRST && pe <= PMC_EV_UCF_LAST) {
2948 ev = ucf_event_table;
2949 evfence = ucf_event_table + PMC_EVENT_TABLE_SIZE(ucf);
2950 } else if (pe >= PMC_EV_UCP_FIRST && pe <= PMC_EV_UCP_LAST) {
2951 switch (cpu) {
2952 case PMC_CPU_INTEL_COREI7:
2953 ev = corei7uc_event_table;
2954 evfence = corei7uc_event_table + PMC_EVENT_TABLE_SIZE(corei7uc);
2955 break;
2956 case PMC_CPU_INTEL_WESTMERE:
2957 ev = westmereuc_event_table;
2958 evfence = westmereuc_event_table + PMC_EVENT_TABLE_SIZE(westmereuc);
2959 break;
2960 default: /* Unknown CPU type. */
2961 break;
2962 }
2963 } else if (pe >= PMC_EV_K7_FIRST && pe <= PMC_EV_K7_LAST) {
--- 232 unchanged lines hidden ---