1//===- TableGen.cpp - Top-Level TableGen implementation -------------------===//
2//
3// The LLVM Compiler Infrastructure
4//
5// This file is distributed under the University of Illinois Open Source
6// License. See LICENSE.TXT for details.
7//
8//===----------------------------------------------------------------------===//
9//
10// TableGen is a tool which can be used to build up a description of something,
11// then invoke one or more "tablegen backends" to emit information about the
12// description in some predefined format. In practice, this is used by the LLVM
13// code generators to automate generation of a code generator through a
14// high-level description of the target.
15//
16//===----------------------------------------------------------------------===//
17
18#include "Record.h"
19#include "TGParser.h"
20#include "CallingConvEmitter.h"
21#include "CodeEmitterGen.h"
22#include "RegisterInfoEmitter.h"
23#include "InstrInfoEmitter.h"
24#include "InstrEnumEmitter.h"
25#include "AsmWriterEmitter.h"
26#include "AsmMatcherEmitter.h"
27#include "DAGISelEmitter.h"
28#include "FastISelEmitter.h"
29#include "SubtargetEmitter.h"
30#include "IntrinsicEmitter.h"
31#include "LLVMCConfigurationEmitter.h"
32#include "ClangDiagnosticsEmitter.h"
33#include "llvm/Support/CommandLine.h"
34#include "llvm/Support/FileUtilities.h"
35#include "llvm/Support/MemoryBuffer.h"
36#include "llvm/Support/PrettyStackTrace.h"
37#include "llvm/Support/raw_ostream.h"
38#include "llvm/System/Signals.h"
39#include <algorithm>
40#include <cstdio>
--- 4 unchanged lines hidden (view full) ---
45 GenEmitter,
46 GenRegisterEnums, GenRegister, GenRegisterHeader,
47 GenInstrEnums, GenInstrs, GenAsmWriter, GenAsmMatcher,
48 GenCallingConv,
49 GenClangDiagsDefs,
50 GenClangDiagGroups,
51 GenDAGISel,
52 GenFastISel,
53 GenSubtarget,
54 GenIntrinsic,
55 GenTgtIntrinsic,
56 GenLLVMCConf,
57 PrintEnums
58};
59
60namespace {
--- 18 unchanged lines hidden (view full) ---
79 clEnumValN(GenAsmWriter, "gen-asm-writer",
80 "Generate assembly writer"),
81 clEnumValN(GenAsmMatcher, "gen-asm-matcher",
82 "Generate assembly instruction matcher"),
83 clEnumValN(GenDAGISel, "gen-dag-isel",
84 "Generate a DAG instruction selector"),
85 clEnumValN(GenFastISel, "gen-fast-isel",
86 "Generate a \"fast\" instruction selector"),
87 clEnumValN(GenSubtarget, "gen-subtarget",
88 "Generate subtarget enumerations"),
89 clEnumValN(GenIntrinsic, "gen-intrinsic",
90 "Generate intrinsic information"),
91 clEnumValN(GenTgtIntrinsic, "gen-tgt-intrinsic",
92 "Generate target intrinsic information"),
93 clEnumValN(GenClangDiagsDefs, "gen-clang-diags-defs",
94 "Generate Clang diagnostics definitions"),
--- 121 unchanged lines hidden (view full) ---
216 case GenAsmMatcher:
217 AsmMatcherEmitter(Records).run(*Out);
218 break;
219 case GenClangDiagsDefs:
220 ClangDiagsDefsEmitter(Records, ClangComponent).run(*Out);
221 break;
222 case GenClangDiagGroups:
223 ClangDiagGroupsEmitter(Records).run(*Out);
224 break;
225 case GenDAGISel:
226 DAGISelEmitter(Records).run(*Out);
227 break;
228 case GenFastISel:
229 FastISelEmitter(Records).run(*Out);
230 break;
231 case GenSubtarget:
232 SubtargetEmitter(Records).run(*Out);
--- 45 unchanged lines hidden ---
2//
3// The LLVM Compiler Infrastructure
4//
5// This file is distributed under the University of Illinois Open Source
6// License. See LICENSE.TXT for details.
7//
8//===----------------------------------------------------------------------===//
9//
10// TableGen is a tool which can be used to build up a description of something,
11// then invoke one or more "tablegen backends" to emit information about the
12// description in some predefined format. In practice, this is used by the LLVM
13// code generators to automate generation of a code generator through a
14// high-level description of the target.
15//
16//===----------------------------------------------------------------------===//
17
18#include "Record.h"
19#include "TGParser.h"
20#include "CallingConvEmitter.h"
21#include "CodeEmitterGen.h"
22#include "RegisterInfoEmitter.h"
23#include "InstrInfoEmitter.h"
24#include "InstrEnumEmitter.h"
25#include "AsmWriterEmitter.h"
26#include "AsmMatcherEmitter.h"
27#include "DAGISelEmitter.h"
28#include "FastISelEmitter.h"
29#include "SubtargetEmitter.h"
30#include "IntrinsicEmitter.h"
31#include "LLVMCConfigurationEmitter.h"
32#include "ClangDiagnosticsEmitter.h"
33#include "llvm/Support/CommandLine.h"
34#include "llvm/Support/FileUtilities.h"
35#include "llvm/Support/MemoryBuffer.h"
36#include "llvm/Support/PrettyStackTrace.h"
37#include "llvm/Support/raw_ostream.h"
38#include "llvm/System/Signals.h"
39#include <algorithm>
40#include <cstdio>
--- 4 unchanged lines hidden (view full) ---
45 GenEmitter,
46 GenRegisterEnums, GenRegister, GenRegisterHeader,
47 GenInstrEnums, GenInstrs, GenAsmWriter, GenAsmMatcher,
48 GenCallingConv,
49 GenClangDiagsDefs,
50 GenClangDiagGroups,
51 GenDAGISel,
52 GenFastISel,
53 GenSubtarget,
54 GenIntrinsic,
55 GenTgtIntrinsic,
56 GenLLVMCConf,
57 PrintEnums
58};
59
60namespace {
--- 18 unchanged lines hidden (view full) ---
79 clEnumValN(GenAsmWriter, "gen-asm-writer",
80 "Generate assembly writer"),
81 clEnumValN(GenAsmMatcher, "gen-asm-matcher",
82 "Generate assembly instruction matcher"),
83 clEnumValN(GenDAGISel, "gen-dag-isel",
84 "Generate a DAG instruction selector"),
85 clEnumValN(GenFastISel, "gen-fast-isel",
86 "Generate a \"fast\" instruction selector"),
87 clEnumValN(GenSubtarget, "gen-subtarget",
88 "Generate subtarget enumerations"),
89 clEnumValN(GenIntrinsic, "gen-intrinsic",
90 "Generate intrinsic information"),
91 clEnumValN(GenTgtIntrinsic, "gen-tgt-intrinsic",
92 "Generate target intrinsic information"),
93 clEnumValN(GenClangDiagsDefs, "gen-clang-diags-defs",
94 "Generate Clang diagnostics definitions"),
--- 121 unchanged lines hidden (view full) ---
216 case GenAsmMatcher:
217 AsmMatcherEmitter(Records).run(*Out);
218 break;
219 case GenClangDiagsDefs:
220 ClangDiagsDefsEmitter(Records, ClangComponent).run(*Out);
221 break;
222 case GenClangDiagGroups:
223 ClangDiagGroupsEmitter(Records).run(*Out);
224 break;
225 case GenDAGISel:
226 DAGISelEmitter(Records).run(*Out);
227 break;
228 case GenFastISel:
229 FastISelEmitter(Records).run(*Out);
230 break;
231 case GenSubtarget:
232 SubtargetEmitter(Records).run(*Out);
--- 45 unchanged lines hidden ---