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Sparc.h (193323) Sparc.h (195340)
1//===-- Sparc.h - Top-level interface for Sparc representation --*- C++ -*-===//
2//
3// The LLVM Compiler Infrastructure
4//
5// This file is distributed under the University of Illinois Open Source
6// License. See LICENSE.TXT for details.
7//
8//===----------------------------------------------------------------------===//
9//
10// This file contains the entry points for global functions defined in the LLVM
11// Sparc back-end.
12//
13//===----------------------------------------------------------------------===//
14
15#ifndef TARGET_SPARC_H
16#define TARGET_SPARC_H
17
18#include "llvm/Target/TargetMachine.h"
19#include <cassert>
20
21namespace llvm {
22 class FunctionPass;
23 class SparcTargetMachine;
24 class raw_ostream;
25
26 FunctionPass *createSparcISelDag(SparcTargetMachine &TM);
27 FunctionPass *createSparcCodePrinterPass(raw_ostream &OS, TargetMachine &TM,
1//===-- Sparc.h - Top-level interface for Sparc representation --*- C++ -*-===//
2//
3// The LLVM Compiler Infrastructure
4//
5// This file is distributed under the University of Illinois Open Source
6// License. See LICENSE.TXT for details.
7//
8//===----------------------------------------------------------------------===//
9//
10// This file contains the entry points for global functions defined in the LLVM
11// Sparc back-end.
12//
13//===----------------------------------------------------------------------===//
14
15#ifndef TARGET_SPARC_H
16#define TARGET_SPARC_H
17
18#include "llvm/Target/TargetMachine.h"
19#include <cassert>
20
21namespace llvm {
22 class FunctionPass;
23 class SparcTargetMachine;
24 class raw_ostream;
25
26 FunctionPass *createSparcISelDag(SparcTargetMachine &TM);
27 FunctionPass *createSparcCodePrinterPass(raw_ostream &OS, TargetMachine &TM,
28 CodeGenOpt::Level OptLevel,
29 bool Verbose);
30 FunctionPass *createSparcDelaySlotFillerPass(TargetMachine &TM);
31 FunctionPass *createSparcFPMoverPass(TargetMachine &TM);
32} // end namespace llvm;
33
34// Defines symbolic names for Sparc registers. This defines a mapping from
35// register name to register number.
36//
37#include "SparcGenRegisterNames.inc"
38
39// Defines symbolic names for the Sparc instructions.
40//
41#include "SparcGenInstrNames.inc"
42
43
44namespace llvm {
45 // Enums corresponding to Sparc condition codes, both icc's and fcc's. These
46 // values must be kept in sync with the ones in the .td file.
47 namespace SPCC {
48 enum CondCodes {
49 //ICC_A = 8 , // Always
50 //ICC_N = 0 , // Never
51 ICC_NE = 9 , // Not Equal
52 ICC_E = 1 , // Equal
53 ICC_G = 10 , // Greater
54 ICC_LE = 2 , // Less or Equal
55 ICC_GE = 11 , // Greater or Equal
56 ICC_L = 3 , // Less
57 ICC_GU = 12 , // Greater Unsigned
58 ICC_LEU = 4 , // Less or Equal Unsigned
59 ICC_CC = 13 , // Carry Clear/Great or Equal Unsigned
60 ICC_CS = 5 , // Carry Set/Less Unsigned
61 ICC_POS = 14 , // Positive
62 ICC_NEG = 6 , // Negative
63 ICC_VC = 15 , // Overflow Clear
64 ICC_VS = 7 , // Overflow Set
65
66 //FCC_A = 8+16, // Always
67 //FCC_N = 0+16, // Never
68 FCC_U = 7+16, // Unordered
69 FCC_G = 6+16, // Greater
70 FCC_UG = 5+16, // Unordered or Greater
71 FCC_L = 4+16, // Less
72 FCC_UL = 3+16, // Unordered or Less
73 FCC_LG = 2+16, // Less or Greater
74 FCC_NE = 1+16, // Not Equal
75 FCC_E = 9+16, // Equal
76 FCC_UE = 10+16, // Unordered or Equal
77 FCC_GE = 11+16, // Greater or Equal
78 FCC_UGE = 12+16, // Unordered or Greater or Equal
79 FCC_LE = 13+16, // Less or Equal
80 FCC_ULE = 14+16, // Unordered or Less or Equal
81 FCC_O = 15+16 // Ordered
82 };
83 }
84
85 inline static const char *SPARCCondCodeToString(SPCC::CondCodes CC) {
86 switch (CC) {
87 default: assert(0 && "Unknown condition code");
88 case SPCC::ICC_NE: return "ne";
89 case SPCC::ICC_E: return "e";
90 case SPCC::ICC_G: return "g";
91 case SPCC::ICC_LE: return "le";
92 case SPCC::ICC_GE: return "ge";
93 case SPCC::ICC_L: return "l";
94 case SPCC::ICC_GU: return "gu";
95 case SPCC::ICC_LEU: return "leu";
96 case SPCC::ICC_CC: return "cc";
97 case SPCC::ICC_CS: return "cs";
98 case SPCC::ICC_POS: return "pos";
99 case SPCC::ICC_NEG: return "neg";
100 case SPCC::ICC_VC: return "vc";
101 case SPCC::ICC_VS: return "vs";
102 case SPCC::FCC_U: return "u";
103 case SPCC::FCC_G: return "g";
104 case SPCC::FCC_UG: return "ug";
105 case SPCC::FCC_L: return "l";
106 case SPCC::FCC_UL: return "ul";
107 case SPCC::FCC_LG: return "lg";
108 case SPCC::FCC_NE: return "ne";
109 case SPCC::FCC_E: return "e";
110 case SPCC::FCC_UE: return "ue";
111 case SPCC::FCC_GE: return "ge";
112 case SPCC::FCC_UGE: return "uge";
113 case SPCC::FCC_LE: return "le";
114 case SPCC::FCC_ULE: return "ule";
115 case SPCC::FCC_O: return "o";
116 }
117 }
118} // end namespace llvm
119#endif
28 bool Verbose);
29 FunctionPass *createSparcDelaySlotFillerPass(TargetMachine &TM);
30 FunctionPass *createSparcFPMoverPass(TargetMachine &TM);
31} // end namespace llvm;
32
33// Defines symbolic names for Sparc registers. This defines a mapping from
34// register name to register number.
35//
36#include "SparcGenRegisterNames.inc"
37
38// Defines symbolic names for the Sparc instructions.
39//
40#include "SparcGenInstrNames.inc"
41
42
43namespace llvm {
44 // Enums corresponding to Sparc condition codes, both icc's and fcc's. These
45 // values must be kept in sync with the ones in the .td file.
46 namespace SPCC {
47 enum CondCodes {
48 //ICC_A = 8 , // Always
49 //ICC_N = 0 , // Never
50 ICC_NE = 9 , // Not Equal
51 ICC_E = 1 , // Equal
52 ICC_G = 10 , // Greater
53 ICC_LE = 2 , // Less or Equal
54 ICC_GE = 11 , // Greater or Equal
55 ICC_L = 3 , // Less
56 ICC_GU = 12 , // Greater Unsigned
57 ICC_LEU = 4 , // Less or Equal Unsigned
58 ICC_CC = 13 , // Carry Clear/Great or Equal Unsigned
59 ICC_CS = 5 , // Carry Set/Less Unsigned
60 ICC_POS = 14 , // Positive
61 ICC_NEG = 6 , // Negative
62 ICC_VC = 15 , // Overflow Clear
63 ICC_VS = 7 , // Overflow Set
64
65 //FCC_A = 8+16, // Always
66 //FCC_N = 0+16, // Never
67 FCC_U = 7+16, // Unordered
68 FCC_G = 6+16, // Greater
69 FCC_UG = 5+16, // Unordered or Greater
70 FCC_L = 4+16, // Less
71 FCC_UL = 3+16, // Unordered or Less
72 FCC_LG = 2+16, // Less or Greater
73 FCC_NE = 1+16, // Not Equal
74 FCC_E = 9+16, // Equal
75 FCC_UE = 10+16, // Unordered or Equal
76 FCC_GE = 11+16, // Greater or Equal
77 FCC_UGE = 12+16, // Unordered or Greater or Equal
78 FCC_LE = 13+16, // Less or Equal
79 FCC_ULE = 14+16, // Unordered or Less or Equal
80 FCC_O = 15+16 // Ordered
81 };
82 }
83
84 inline static const char *SPARCCondCodeToString(SPCC::CondCodes CC) {
85 switch (CC) {
86 default: assert(0 && "Unknown condition code");
87 case SPCC::ICC_NE: return "ne";
88 case SPCC::ICC_E: return "e";
89 case SPCC::ICC_G: return "g";
90 case SPCC::ICC_LE: return "le";
91 case SPCC::ICC_GE: return "ge";
92 case SPCC::ICC_L: return "l";
93 case SPCC::ICC_GU: return "gu";
94 case SPCC::ICC_LEU: return "leu";
95 case SPCC::ICC_CC: return "cc";
96 case SPCC::ICC_CS: return "cs";
97 case SPCC::ICC_POS: return "pos";
98 case SPCC::ICC_NEG: return "neg";
99 case SPCC::ICC_VC: return "vc";
100 case SPCC::ICC_VS: return "vs";
101 case SPCC::FCC_U: return "u";
102 case SPCC::FCC_G: return "g";
103 case SPCC::FCC_UG: return "ug";
104 case SPCC::FCC_L: return "l";
105 case SPCC::FCC_UL: return "ul";
106 case SPCC::FCC_LG: return "lg";
107 case SPCC::FCC_NE: return "ne";
108 case SPCC::FCC_E: return "e";
109 case SPCC::FCC_UE: return "ue";
110 case SPCC::FCC_GE: return "ge";
111 case SPCC::FCC_UGE: return "uge";
112 case SPCC::FCC_LE: return "le";
113 case SPCC::FCC_ULE: return "ule";
114 case SPCC::FCC_O: return "o";
115 }
116 }
117} // end namespace llvm
118#endif