1//===-- MipsISelLowering.h - Mips DAG Lowering Interface --------*- C++ -*-===//
2//
3// The LLVM Compiler Infrastructure
4//
5// This file is distributed under the University of Illinois Open Source
6// License. See LICENSE.TXT for details.
7//
8//===----------------------------------------------------------------------===//
9//
10// This file defines the interfaces that Mips uses to lower LLVM code into a
11// selection DAG.
12//
13//===----------------------------------------------------------------------===//
14
15#ifndef MipsISELLOWERING_H
16#define MipsISELLOWERING_H
17
18#include "llvm/CodeGen/SelectionDAG.h"
19#include "llvm/Target/TargetLowering.h"
20#include "Mips.h"
21#include "MipsSubtarget.h"
22
23namespace llvm {
24 namespace MipsISD {
25 enum NodeType {
26 // Start the numbering from where ISD NodeType finishes.
27 FIRST_NUMBER = ISD::BUILTIN_OP_END,
28
29 // Jump and link (call)
30 JmpLink,
31
32 // Get the Higher 16 bits from a 32-bit immediate
33 // No relation with Mips Hi register
34 Hi,
35
36 // Get the Lower 16 bits from a 32-bit immediate
37 // No relation with Mips Lo register
38 Lo,
39
40 // Handle gp_rel (small data/bss sections) relocation.
41 GPRel,
42
43 // Conditional Move
44 CMov,
45
46 // Select CC Pseudo Instruction
47 SelectCC,
48
49 // Floating Point Select CC Pseudo Instruction
50 FPSelectCC,
51
52 // Floating Point Branch Conditional
53 FPBrcond,
54
55 // Floating Point Compare
56 FPCmp,
57
58 // Floating Point Rounding
59 FPRound,
60
61 // Return
62 Ret
63 };
64 }
65
66 //===--------------------------------------------------------------------===//
67 // TargetLowering Implementation
68 //===--------------------------------------------------------------------===//
69 class MipsTargetLowering : public TargetLowering
70 {
71 // FrameIndex for return slot.
72 int ReturnAddrIndex;
73 public:
74
75 explicit MipsTargetLowering(MipsTargetMachine &TM);
76
77 /// LowerOperation - Provide custom lowering hooks for some operations.
78 virtual SDValue LowerOperation(SDValue Op, SelectionDAG &DAG);
79
80 /// getTargetNodeName - This method returns the name of a target specific
81 // DAG node.
82 virtual const char *getTargetNodeName(unsigned Opcode) const;
83
84 /// getSetCCResultType - get the ISD::SETCC result ValueType
85 MVT getSetCCResultType(MVT VT) const;
86
87 private:
88 // Subtarget Info
89 const MipsSubtarget *Subtarget;
90
91 // Lower Operand helpers
92 SDNode *LowerCallResult(SDValue Chain, SDValue InFlag, CallSDNode *TheCall,
93 unsigned CallingConv, SelectionDAG &DAG);
94 bool IsGlobalInSmallSection(GlobalValue *GV);
95 bool IsInSmallSection(unsigned Size);
96
97 // Lower Operand specifics
98 SDValue LowerANDOR(SDValue Op, SelectionDAG &DAG);
99 SDValue LowerBRCOND(SDValue Op, SelectionDAG &DAG);
100 SDValue LowerCALL(SDValue Op, SelectionDAG &DAG);
101 SDValue LowerConstantPool(SDValue Op, SelectionDAG &DAG);
102 SDValue LowerDYNAMIC_STACKALLOC(SDValue Op, SelectionDAG &DAG);
103 SDValue LowerFORMAL_ARGUMENTS(SDValue Op, SelectionDAG &DAG);
104 SDValue LowerFP_TO_SINT(SDValue Op, SelectionDAG &DAG);
105 SDValue LowerGlobalAddress(SDValue Op, SelectionDAG &DAG);
106 SDValue LowerGlobalTLSAddress(SDValue Op, SelectionDAG &DAG);
107 SDValue LowerJumpTable(SDValue Op, SelectionDAG &DAG);
108 SDValue LowerRET(SDValue Op, SelectionDAG &DAG);
109 SDValue LowerSELECT(SDValue Op, SelectionDAG &DAG);
110 SDValue LowerSETCC(SDValue Op, SelectionDAG &DAG);
111
112 virtual MachineBasicBlock *EmitInstrWithCustomInserter(MachineInstr *MI,
113 MachineBasicBlock *MBB) const;
114
115 // Inline asm support
116 ConstraintType getConstraintType(const std::string &Constraint) const;
117
118 std::pair<unsigned, const TargetRegisterClass*>
119 getRegForInlineAsmConstraint(const std::string &Constraint,
120 MVT VT) const;
121
122 std::vector<unsigned>
123 getRegClassForInlineAsmConstraint(const std::string &Constraint,
124 MVT VT) const;
125
126 virtual bool isOffsetFoldingLegal(const GlobalAddressSDNode *GA) const;
127 };
128}
129
130#endif // MipsISELLOWERING_H