1/*- 2 * Copyright (c) 2005 by Marius Strobl <marius@FreeBSD.org>. 3 * All rights reserved. 4 * 5 * Redistribution and use in source and binary forms, with or without 6 * modification, are permitted provided that the following conditions 7 * are met: 8 * 1. Redistributions of source code must retain the above copyright 9 * notice, this list of conditions, and the following disclaimer, 10 * without modification, immediately at the beginning of the file. 11 * 2. Redistributions in binary form must reproduce the above copyright 12 * notice, this list of conditions and the following disclaimer in 13 * the documentation and/or other materials provided with the 14 * distribution. 15 * 16 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND 17 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 18 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 19 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE FOR 20 * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 21 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 22 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 23 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 24 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 25 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 26 * SUCH DAMAGE. 27 *
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28 * $FreeBSD: stable/10/sys/sparc64/pci/schizovar.h 230664 2012-01-28 22:42:33Z marius $
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28 * $FreeBSD: stable/10/sys/sparc64/pci/schizovar.h 292789 2015-12-27 19:37:47Z marius $ |
29 */ 30 31#ifndef _SPARC64_PCI_SCHIZOVAR_H_ 32#define _SPARC64_PCI_SCHIZOVAR_H_ 33 34struct schizo_softc; 35 36struct schizo_iommu_state { 37 struct iommu_state sis_is; 38 struct schizo_softc *sis_sc; 39}; 40 41struct schizo_softc {
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42 /* 43 * This is here so that we can hook up the common bus interface 44 * methods in ofw_pci.c directly. 45 */ 46 struct ofw_pci_softc sc_ops; 47 48 struct schizo_iommu_state sc_is; |
49 struct bus_dma_methods sc_dma_methods; 50
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44 device_t sc_dev;
45
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51 struct mtx sc_sync_mtx; 52 uint64_t sc_sync_val; 53 54 struct mtx *sc_mtx; 55
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51 phandle_t sc_node;
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56 struct resource *sc_mem_res[TOM_NREG]; 57 struct resource *sc_irq_res[STX_NINTR]; 58 void *sc_ihand[STX_NINTR]; |
59
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60 SLIST_ENTRY(schizo_softc) sc_link; 61 62 device_t sc_dev; 63 |
64 u_int sc_mode; 65#define SCHIZO_MODE_SCZ 0 66#define SCHIZO_MODE_TOM 1 67#define SCHIZO_MODE_XMS 2 68 69 u_int sc_flags; 70#define SCHIZO_FLAGS_BSWAR (1 << 0) 71#define SCHIZO_FLAGS_XMODE (1 << 1) 72 73 bus_addr_t sc_cdma_map; 74 bus_addr_t sc_cdma_clr; 75 uint32_t sc_cdma_vec; 76 uint32_t sc_cdma_state; 77#define SCHIZO_CDMA_STATE_IDLE (1 << 0) 78#define SCHIZO_CDMA_STATE_PENDING (1 << 1) 79#define SCHIZO_CDMA_STATE_RECEIVED (1 << 2) 80 81 u_int sc_half; 82 uint32_t sc_ign; 83 uint32_t sc_ver; 84 uint32_t sc_mrev; 85
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75 struct resource *sc_mem_res[TOM_NREG];
76 struct resource *sc_irq_res[STX_NINTR];
77 void *sc_ihand[STX_NINTR];
78
79 struct schizo_iommu_state sc_is;
80
81 struct rman sc_pci_mem_rman;
82 struct rman sc_pci_io_rman;
83 bus_space_handle_t sc_pci_bh[STX_NRANGE];
84 bus_space_tag_t sc_pci_cfgt;
85 bus_space_tag_t sc_pci_iot;
86 bus_dma_tag_t sc_pci_dmat;
87
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86 uint32_t sc_stats_dma_ce; 87 uint32_t sc_stats_pci_non_fatal;
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90
91 uint8_t sc_pci_secbus;
92 uint8_t sc_pci_subbus;
93
94 struct ofw_bus_iinfo sc_pci_iinfo;
95
96 SLIST_ENTRY(schizo_softc) sc_link;
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88}; 89 90#endif /* !_SPARC64_PCI_SCHIZOVAR_H_ */
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