1/*-
2 * Copyright (c) 2007 Bruce M. Simpson.
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions
7 * are met:
8 * 1. Redistributions of source code must retain the above copyright
9 * notice, this list of conditions and the following disclaimer.
10 * 2. Redistributions in binary form must reproduce the above copyright
11 * notice, this list of conditions and the following disclaimer in the
12 * documentation and/or other materials provided with the distribution.
13 *
14 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
15 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
16 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
17 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
18 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
19 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
20 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
21 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
22 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
23 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
24 * SUCH DAMAGE.
25 */
26
27#include <sys/cdefs.h>
28__FBSDID("$FreeBSD: head/sys/mips/sentry5/s5_machdep.c 223562 2011-06-26 10:07:48Z kevlo $");
29
30#include "opt_ddb.h"
31
32#include <sys/param.h>
33#include <sys/conf.h>
34#include <sys/kernel.h>
35#include <sys/systm.h>
36#include <sys/imgact.h>
37#include <sys/bio.h>
38#include <sys/buf.h>
39#include <sys/bus.h>
40#include <sys/cpu.h>
41#include <sys/cons.h>
42#include <sys/exec.h>
43#include <sys/ucontext.h>
44#include <sys/proc.h>
45#include <sys/kdb.h>
46#include <sys/ptrace.h>
47#include <sys/reboot.h>
48#include <sys/signalvar.h>
49#include <sys/sysent.h>
50#include <sys/sysproto.h>
51#include <sys/user.h>
52
53#include <vm/vm.h>
54#include <vm/vm_object.h>
55#include <vm/vm_page.h>
56#include <vm/vm_pager.h>
57
58#include <machine/cache.h>
59#include <machine/clock.h>
60#include <machine/cpu.h>
61#include <machine/cpuinfo.h>
62#include <machine/cpufunc.h>
63#include <machine/cpuregs.h>
64#include <machine/hwfunc.h>
65#include <machine/intr_machdep.h>
66#include <machine/locore.h>
67#include <machine/md_var.h>
68#include <machine/pte.h>
69#include <machine/sigframe.h>
70#include <machine/trap.h>
71#include <machine/vmparam.h>
72
73#include <mips/sentry5/s5reg.h>
74
75#ifdef CFE
76#include <dev/cfe/cfe_api.h>
77#endif
78
79extern int *edata;
80extern int *end;
81
82void
83platform_cpu_init()
84{
85 /* Nothing special */
86}
87
88static void
89mips_init(void)
90{
91 int i, j;
92
93 printf("entry: mips_init()\n");
94
95#ifdef CFE
96 /*
97 * Query DRAM memory map from CFE.
98 */
99 physmem = 0;
100 for (i = 0; i < 10; i += 2) {
101 int result;
102 uint64_t addr, len, type;
103
104 result = cfe_enummem(i, 0, &addr, &len, &type);
105 if (result < 0) {
106 phys_avail[i] = phys_avail[i + 1] = 0;
107 break;
108 }
109 if (type != CFE_MI_AVAILABLE)
110 continue;
111
112 phys_avail[i] = addr;
113 if (i == 0 && addr == 0) {
114 /*
115 * If this is the first physical memory segment probed
116 * from CFE, omit the region at the start of physical
117 * memory where the kernel has been loaded.
118 */
119 phys_avail[i] += MIPS_KSEG0_TO_PHYS(kernel_kseg0_end);
120 }
121 phys_avail[i + 1] = addr + len;
122 physmem += len;
123 }
124
125 realmem = btoc(physmem);
126#endif
127
128 for (j = 0; j < i; j++)
129 dump_avail[j] = phys_avail[j];
130
131 physmem = realmem;
132
133 init_param1();
134 init_param2(physmem);
135 mips_cpu_init();
136 pmap_bootstrap();
137 mips_proc0_init();
138 mutex_init();
139 kdb_init();
140#ifdef KDB
141 if (boothowto & RB_KDB)
142 kdb_enter(KDB_WHY_BOOTFLAGS, "Boot flags requested debugger");
143#endif
144}
145
146void
147platform_halt(void)
148{
149
150}
151
152
153void
154platform_identify(void)
155{
156
157}
158
159void
160platform_reset(void)
161{
162
163#if defined(CFE)
164 cfe_exit(0, 0);
165#else
166 *((volatile uint8_t *)MIPS_PHYS_TO_KSEG1(SENTRY5_EXTIFADR)) = 0x80;
167#endif
168}
169
170void
171platform_trap_enter(void)
172{
173
174}
175
176void
177platform_trap_exit(void)
178{
179
180}
181
182void
183platform_start(__register_t a0, __register_t a1, __register_t a2,
184 __register_t a3)
185{
186 vm_offset_t kernend;
187 uint64_t platform_counter_freq;
188
189 /* clear the BSS and SBSS segments */
190 kernend = (vm_offset_t)&end;
191 memset(&edata, 0, kernend - (vm_offset_t)(&edata));
192
193 mips_postboot_fixup();
194
195 /* Initialize pcpu stuff */
196 mips_pcpu0_init();
197
198#ifdef CFE
199 /*
200 * Initialize CFE firmware trampolines before
201 * we initialize the low-level console.
202 *
203 * CFE passes the following values in registers:
204 * a0: firmware handle
205 * a2: firmware entry point
206 * a3: entry point seal
207 */
208 if (a3 == CFE_EPTSEAL)
209 cfe_init(a0, a2);
210#endif
211 cninit();
212
213 mips_init();
214
215# if 0
216 /*
217 * Probe the Broadcom Sentry5's on-chip PLL clock registers
218 * and discover the CPU pipeline clock and bus clock
219 * multipliers from this.
220 * XXX: Wrong place. You have to ask the ChipCommon
221 * or External Interface cores on the SiBa.
222 */
223 uint32_t busmult, cpumult, refclock, clkcfg1;
224#define S5_CLKCFG1_REFCLOCK_MASK 0x0000001F
225#define S5_CLKCFG1_BUSMULT_MASK 0x000003E0
226#define S5_CLKCFG1_BUSMULT_SHIFT 5
227#define S5_CLKCFG1_CPUMULT_MASK 0xFFFFFC00
228#define S5_CLKCFG1_CPUMULT_SHIFT 10
229
230 counter_freq = 100000000; /* XXX */
231
232 clkcfg1 = s5_rd_clkcfg1();
233 printf("clkcfg1 = 0x%08x\n", clkcfg1);
234
235 refclock = clkcfg1 & 0x1F;
236 busmult = ((clkcfg1 & 0x000003E0) >> 5) + 1;
237 cpumult = ((clkcfg1 & 0xFFFFFC00) >> 10) + 1;
238
239 printf("refclock = %u\n", refclock);
240 printf("busmult = %u\n", busmult);
241 printf("cpumult = %u\n", cpumult);
242
243 counter_freq = cpumult * refclock;
244# else
245 platform_counter_freq = 200 * 1000 * 1000; /* Sentry5 is 200MHz */
246# endif
247
248 mips_timer_init_params(platform_counter_freq, 0);
249}