| ia64_cpu.h (96912) | ia64_cpu.h (117499) |
|---|---|
| 1/*- 2 * Copyright (c) 2000 Doug Rabson 3 * All rights reserved. 4 * 5 * Redistribution and use in source and binary forms, with or without 6 * modification, are permitted provided that the following conditions 7 * are met: 8 * 1. Redistributions of source code must retain the above copyright --- 9 unchanged lines hidden (view full) --- 18 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 19 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 20 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 21 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 22 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 23 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 24 * SUCH DAMAGE. 25 * | 1/*- 2 * Copyright (c) 2000 Doug Rabson 3 * All rights reserved. 4 * 5 * Redistribution and use in source and binary forms, with or without 6 * modification, are permitted provided that the following conditions 7 * are met: 8 * 1. Redistributions of source code must retain the above copyright --- 9 unchanged lines hidden (view full) --- 18 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 19 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 20 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 21 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 22 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 23 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 24 * SUCH DAMAGE. 25 * |
| 26 * $FreeBSD: head/sys/ia64/include/ia64_cpu.h 96912 2002-05-19 04:42:19Z marcel $ | 26 * $FreeBSD: head/sys/ia64/include/ia64_cpu.h 117499 2003-07-13 04:08:16Z marcel $ |
| 27 */ 28 29#ifndef _MACHINE_IA64_CPU_H_ 30#define _MACHINE_IA64_CPU_H_ 31 32/* 33 * Definition of PSR and IPSR bits. 34 */ --- 357 unchanged lines hidden (view full) --- 392ia64_get_cpuid(int i) 393{ 394 u_int64_t result; 395 __asm __volatile("mov %0=cpuid[%1]" 396 : "=r" (result) : "r"(i)); 397 return result; 398} 399 | 27 */ 28 29#ifndef _MACHINE_IA64_CPU_H_ 30#define _MACHINE_IA64_CPU_H_ 31 32/* 33 * Definition of PSR and IPSR bits. 34 */ --- 357 unchanged lines hidden (view full) --- 392ia64_get_cpuid(int i) 393{ 394 u_int64_t result; 395 __asm __volatile("mov %0=cpuid[%1]" 396 : "=r" (result) : "r"(i)); 397 return result; 398} 399 |
| 400#endif | 400static __inline void 401ia64_disable_highfp(void) 402{ 403 __asm __volatile("ssm psr.dfh;; srlz.d"); 404} |
| 401 | 405 |
| 406static __inline void 407ia64_enable_highfp(void) 408{ 409 __asm __volatile("rsm psr.dfh;; srlz.d"); 410} 411 412#endif /* !LOCORE */ 413 |
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| 402#endif /* _MACHINE_IA64_CPU_H_ */ 403 | 414#endif /* _MACHINE_IA64_CPU_H_ */ 415 |