ia64_cpu.h (83622) | ia64_cpu.h (83766) |
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1/*- 2 * Copyright (c) 2000 Doug Rabson 3 * All rights reserved. 4 * 5 * Redistribution and use in source and binary forms, with or without 6 * modification, are permitted provided that the following conditions 7 * are met: 8 * 1. Redistributions of source code must retain the above copyright --- 9 unchanged lines hidden (view full) --- 18 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 19 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 20 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 21 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 22 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 23 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 24 * SUCH DAMAGE. 25 * | 1/*- 2 * Copyright (c) 2000 Doug Rabson 3 * All rights reserved. 4 * 5 * Redistribution and use in source and binary forms, with or without 6 * modification, are permitted provided that the following conditions 7 * are met: 8 * 1. Redistributions of source code must retain the above copyright --- 9 unchanged lines hidden (view full) --- 18 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 19 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 20 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 21 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 22 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 23 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 24 * SUCH DAMAGE. 25 * |
26 * $FreeBSD: head/sys/ia64/include/ia64_cpu.h 83622 2001-09-18 15:21:18Z dfr $ | 26 * $FreeBSD: head/sys/ia64/include/ia64_cpu.h 83766 2001-09-21 10:09:27Z dfr $ |
27 */ 28 29#ifndef _MACHINE_IA64_CPU_H_ 30#define _MACHINE_IA64_CPU_H_ 31 32/* 33 * Definition of PSR and IPSR bits. 34 */ --- 118 unchanged lines hidden (view full) --- 153 154static __inline void 155ia64_mf_a(void) 156{ 157 __asm __volatile("mf.a"); 158} 159 160/* | 27 */ 28 29#ifndef _MACHINE_IA64_CPU_H_ 30#define _MACHINE_IA64_CPU_H_ 31 32/* 33 * Definition of PSR and IPSR bits. 34 */ --- 118 unchanged lines hidden (view full) --- 153 154static __inline void 155ia64_mf_a(void) 156{ 157 __asm __volatile("mf.a"); 158} 159 160/* |
161 * Flush Cache. 162 */ 163static __inline void 164ia64_fc(u_int64_t va) 165{ 166 __asm __volatile("fc %0" :: "r"(va)); 167} 168 169/* |
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161 * Calculate address in VHPT for va. 162 */ 163static __inline u_int64_t 164ia64_thash(u_int64_t va) 165{ 166 u_int64_t result; 167 __asm __volatile("thash %0=%1" : "=r" (result) : "r" (va)); 168 return result; --- 296 unchanged lines hidden --- | 170 * Calculate address in VHPT for va. 171 */ 172static __inline u_int64_t 173ia64_thash(u_int64_t va) 174{ 175 u_int64_t result; 176 __asm __volatile("thash %0=%1" : "=r" (result) : "r" (va)); 177 return result; --- 296 unchanged lines hidden --- |