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uart_cpu_pc98.c (168281) uart_cpu_pc98.c (182159)
1/*-
1/*-
2 * Copyright (c) 2008 TAKAHASHI Yoshihiro
2 * Copyright (c) 2003 M. Warner Losh, Marcel Moolenaar
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions
7 * are met:
8 *
9 * 1. Redistributions of source code must retain the above copyright

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20 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
21 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
22 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
23 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
24 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
25 */
26
27#include <sys/cdefs.h>
3 * Copyright (c) 2003 M. Warner Losh, Marcel Moolenaar
4 * All rights reserved.
5 *
6 * Redistribution and use in source and binary forms, with or without
7 * modification, are permitted provided that the following conditions
8 * are met:
9 *
10 * 1. Redistributions of source code must retain the above copyright

--- 10 unchanged lines hidden (view full) ---

21 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
22 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
23 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
24 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
25 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
26 */
27
28#include <sys/cdefs.h>
28__FBSDID("$FreeBSD: head/sys/dev/uart/uart_cpu_pc98.c 168281 2007-04-02 22:00:22Z marcel $");
29__FBSDID("$FreeBSD: head/sys/dev/uart/uart_cpu_pc98.c 182159 2008-08-25 14:45:24Z nyan $");
29
30#include <sys/param.h>
31#include <sys/systm.h>
32#include <sys/bus.h>
33
34#include <machine/bus.h>
35
36#include <dev/uart/uart.h>
37#include <dev/uart/uart_cpu.h>
38
39bus_space_tag_t uart_bus_space_io = I386_BUS_SPACE_IO;
40bus_space_tag_t uart_bus_space_mem = I386_BUS_SPACE_MEM;
41
30
31#include <sys/param.h>
32#include <sys/systm.h>
33#include <sys/bus.h>
34
35#include <machine/bus.h>
36
37#include <dev/uart/uart.h>
38#include <dev/uart/uart_cpu.h>
39
40bus_space_tag_t uart_bus_space_io = I386_BUS_SPACE_IO;
41bus_space_tag_t uart_bus_space_mem = I386_BUS_SPACE_MEM;
42
43static struct {
44 u_long iobase;
45 struct uart_class *class;
46} uart_pc98_devs[] = {
47 { 0x238, &uart_ns8250_class },
48 { 0, NULL }
49};
50
51struct uart_class *
52uart_pc98_getdev(u_long port)
53{
54 int i;
55
56 for (i = 0; uart_pc98_devs[i].iobase; i++) {
57 if (port == uart_pc98_devs[i].iobase)
58 return (uart_pc98_devs[i].class);
59 }
60 return (NULL);
61}
62
42int
43uart_cpu_eqres(struct uart_bas *b1, struct uart_bas *b2)
44{
45
63int
64uart_cpu_eqres(struct uart_bas *b1, struct uart_bas *b2)
65{
66
46 return (0); /* XXX */
67 if (i386_memio_compare(b1->bst, b1->bsh, b2->bst, b2->bsh) == 0)
68 return (1);
69
70 return (0);
47}
48
49int
50uart_cpu_getdev(int devtype, struct uart_devinfo *di)
51{
52 struct uart_class *class;
71}
72
73int
74uart_cpu_getdev(int devtype, struct uart_devinfo *di)
75{
76 struct uart_class *class;
53 unsigned int i, ivar, flags;
77 unsigned int i, ivar;
54
55 class = &uart_ns8250_class;
56 if (class == NULL)
57 return (ENXIO);
58
59 /* Check the environment. */
60 if (uart_getenv(devtype, di, class) == 0)
61 return (0);
62
63 /*
64 * There is a serial port on all pc98 hardware. It is 8251 or
65 * an enhance version of that. Some pc98 have the second serial
78
79 class = &uart_ns8250_class;
80 if (class == NULL)
81 return (ENXIO);
82
83 /* Check the environment. */
84 if (uart_getenv(devtype, di, class) == 0)
85 return (0);
86
87 /*
88 * There is a serial port on all pc98 hardware. It is 8251 or
89 * an enhance version of that. Some pc98 have the second serial
66 * port which is 16550A compatible. However, for the sio driver,
67 * flags selected which type of uart was in the sytem. We use
68 * something similar to sort things out.
90 * port which is 16550A compatible.
69 */
91 */
70 for (i = 0; i < 1; i++) {
71 if (resource_int_value("uart", i, "flags", &flags))
92 for (i = 0; i < 2; i++) {
93 if (resource_int_value("uart", i, "flags", &ivar))
72 continue;
94 continue;
73 if (devtype == UART_DEV_CONSOLE && !UART_FLAGS_CONSOLE(flags))
95 if (devtype == UART_DEV_CONSOLE && !UART_FLAGS_CONSOLE(ivar))
74 continue;
96 continue;
75 if (devtype == UART_DEV_DBGPORT && !UART_FLAGS_DBGPORT(flags))
97 if (devtype == UART_DEV_DBGPORT && !UART_FLAGS_DBGPORT(ivar))
76 continue;
77 /*
78 * We have a possible device. Make sure it's enabled and
79 * that we have an I/O port.
80 */
81 if (resource_int_value("uart", i, "disabled", &ivar) == 0 &&
82 ivar != 0)
83 continue;
84 if (resource_int_value("uart", i, "port", &ivar) != 0 ||
85 ivar == 0)
86 continue;
87
98 continue;
99 /*
100 * We have a possible device. Make sure it's enabled and
101 * that we have an I/O port.
102 */
103 if (resource_int_value("uart", i, "disabled", &ivar) == 0 &&
104 ivar != 0)
105 continue;
106 if (resource_int_value("uart", i, "port", &ivar) != 0 ||
107 ivar == 0)
108 continue;
109
110 class = uart_pc98_getdev(ivar);
111 if (class == NULL)
112 continue;
113
88 di->ops = uart_getops(class);
89 di->bas.chan = 0;
90 di->bas.bst = uart_bus_space_io;
91 if (bus_space_map(di->bas.bst, ivar, uart_getrange(class), 0,
92 &di->bas.bsh) != 0)
93 continue;
94 di->bas.regshft = 0;
95 di->bas.rclk = 0;
96 if (resource_int_value("uart", i, "baud", &ivar) != 0)
97 ivar = 0;
98 di->baudrate = ivar;
99 di->databits = 8;
100 di->stopbits = 1;
101 di->parity = UART_PARITY_NONE;
102 return (0);
103 }
104
105 return (ENXIO);
106}
114 di->ops = uart_getops(class);
115 di->bas.chan = 0;
116 di->bas.bst = uart_bus_space_io;
117 if (bus_space_map(di->bas.bst, ivar, uart_getrange(class), 0,
118 &di->bas.bsh) != 0)
119 continue;
120 di->bas.regshft = 0;
121 di->bas.rclk = 0;
122 if (resource_int_value("uart", i, "baud", &ivar) != 0)
123 ivar = 0;
124 di->baudrate = ivar;
125 di->databits = 8;
126 di->stopbits = 1;
127 di->parity = UART_PARITY_NONE;
128 return (0);
129 }
130
131 return (ENXIO);
132}