1/*-
2 * Copyright (c) 2008 Alexander Motin <mav@FreeBSD.org>
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions
7 * are met:
8 * 1. Redistributions of source code must retain the above copyright

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19 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
20 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
21 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
22 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
23 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
24 */
25
26#include <sys/cdefs.h>
27__FBSDID("$FreeBSD: stable/10/sys/dev/sdhci/sdhci.c 271051 2014-09-03 20:07:26Z marius $");
28
29#include <sys/param.h>
30#include <sys/systm.h>
31#include <sys/bus.h>
32#include <sys/callout.h>
33#include <sys/conf.h>
34#include <sys/kernel.h>
35#include <sys/lock.h>

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145 slot_printf(slot,
146 "===========================================\n");
147}
148
149static void
150sdhci_reset(struct sdhci_slot *slot, uint8_t mask)
151{
152 int timeout;
153 uint8_t res;
154
155 if (slot->quirks & SDHCI_QUIRK_NO_CARD_NO_RESET) {
156 if (!(RD4(slot, SDHCI_PRESENT_STATE) &
157 SDHCI_CARD_PRESENT))
158 return;
159 }
160
161 /* Some controllers need this kick or reset won't work. */
162 if ((mask & SDHCI_RESET_ALL) == 0 &&
163 (slot->quirks & SDHCI_QUIRK_CLOCK_BEFORE_RESET)) {
164 uint32_t clock;
165
166 /* This is to force an update */
167 clock = slot->clock;
168 slot->clock = 0;
169 sdhci_set_clock(slot, clock);
170 }
171
172 WR1(slot, SDHCI_SOFTWARE_RESET, mask);
173
174 if (mask & SDHCI_RESET_ALL) {
175 slot->clock = 0;
176 slot->power = 0;
177 }
178
179 /* Wait max 100 ms */
180 timeout = 100;
181 /* Controller clears the bits when it's done */
182 while ((res = RD1(slot, SDHCI_SOFTWARE_RESET)) & mask) {
183 if (timeout == 0) {
184 slot_printf(slot,
185 "Reset 0x%x never completed - 0x%x.\n",
186 (int)mask, (int)res);
187 sdhci_dumpregs(slot);
188 return;
189 }
190 timeout--;
191 DELAY(1000);
192 }
193}
194
195static void
196sdhci_init(struct sdhci_slot *slot)
197{
198
199 sdhci_reset(slot, SDHCI_RESET_ALL);

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709}
710
711static void
712sdhci_timeout(void *arg)
713{
714 struct sdhci_slot *slot = arg;
715
716 if (slot->curcmd != NULL) {
717 sdhci_reset(slot, SDHCI_RESET_CMD|SDHCI_RESET_DATA);
718 slot->curcmd->error = MMC_ERR_TIMEOUT;
719 sdhci_req_done(slot);
720 }
721}
722
723static void
724sdhci_set_transfer_mode(struct sdhci_slot *slot,
725 struct mmc_data *data)
726{
727 uint16_t mode;

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1270 /* Handle command interrupts. */
1271 if (intmask & SDHCI_INT_CMD_MASK) {
1272 WR4(slot, SDHCI_INT_STATUS, intmask & SDHCI_INT_CMD_MASK);
1273 sdhci_cmd_irq(slot, intmask & SDHCI_INT_CMD_MASK);
1274 }
1275 /* Handle data interrupts. */
1276 if (intmask & SDHCI_INT_DATA_MASK) {
1277 WR4(slot, SDHCI_INT_STATUS, intmask & SDHCI_INT_DATA_MASK);
1278 sdhci_data_irq(slot, intmask & SDHCI_INT_DATA_MASK);
1279 }
1280 /* Handle AutoCMD12 error interrupt. */
1281 if (intmask & SDHCI_INT_ACMD12ERR) {
1282 WR4(slot, SDHCI_INT_STATUS, SDHCI_INT_ACMD12ERR);
1283 sdhci_acmd_irq(slot);
1284 }
1285 intmask &= ~(SDHCI_INT_CMD_MASK | SDHCI_INT_DATA_MASK);
1286 intmask &= ~SDHCI_INT_ACMD12ERR;

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