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if_fea.c (92739) if_fea.c (93383)
1/*-
2 * Copyright (c) 1995, 1996 Matt Thomas <matt@3am-software.com>
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions
7 * are met:
8 * 1. Redistributions of source code must retain the above copyright

--- 7 unchanged lines hidden (view full) ---

16 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
17 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
18 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
19 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
20 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
21 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
22 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
23 *
1/*-
2 * Copyright (c) 1995, 1996 Matt Thomas <matt@3am-software.com>
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions
7 * are met:
8 * 1. Redistributions of source code must retain the above copyright

--- 7 unchanged lines hidden (view full) ---

16 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
17 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
18 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
19 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
20 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
21 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
22 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
23 *
24 * $FreeBSD: head/sys/dev/pdq/if_fea.c 92739 2002-03-20 02:08:01Z alfred $
24 * $FreeBSD: head/sys/dev/pdq/if_fea.c 93383 2002-03-29 11:22:22Z mdodd $
25 */
26
27/*
28 * DEC PDQ FDDI Controller
29 *
30 * This module support the DEFEA EISA FDDI Controller.
31 */
32
33#include <sys/param.h>
34#include <sys/systm.h>
35#include <sys/kernel.h>
36#include <sys/socket.h>
37
25 */
26
27/*
28 * DEC PDQ FDDI Controller
29 *
30 * This module support the DEFEA EISA FDDI Controller.
31 */
32
33#include <sys/param.h>
34#include <sys/systm.h>
35#include <sys/kernel.h>
36#include <sys/socket.h>
37
38#include <net/if.h>
39#include <net/if_arp.h>
40
41#include <sys/module.h>
42#include <sys/bus.h>
38#include <sys/module.h>
39#include <sys/bus.h>
40
43#include <machine/bus.h>
44#include <machine/resource.h>
45#include <sys/rman.h>
41#include <machine/bus.h>
42#include <machine/resource.h>
43#include <sys/rman.h>
44
45#include <net/if.h>
46#include <net/if_arp.h>
47#include <net/if_media.h>
48#include <net/fddi.h>
49
46#include <dev/eisa/eisaconf.h>
50#include <dev/eisa/eisaconf.h>
47#include <dev/pdq/pdqvar.h>
51
52#include <dev/pdq/pdq_freebsd.h>
48#include <dev/pdq/pdqreg.h>
49
50static void pdq_eisa_subprobe (pdq_bus_t, u_int32_t, u_int32_t *, u_int32_t *, u_int32_t *);
51static void pdq_eisa_devinit (pdq_softc_t *);
52static const char * pdq_eisa_match (eisa_id_t);
53#include <dev/pdq/pdqreg.h>
54
55static void pdq_eisa_subprobe (pdq_bus_t, u_int32_t, u_int32_t *, u_int32_t *, u_int32_t *);
56static void pdq_eisa_devinit (pdq_softc_t *);
57static const char * pdq_eisa_match (eisa_id_t);
58
53static int pdq_eisa_probe (device_t);
54static int pdq_eisa_attach (device_t);
59static int pdq_eisa_probe (device_t);
60static int pdq_eisa_attach (device_t);
55void pdq_eisa_intr (void *);
61static int pdq_eisa_detach (device_t);
56static int pdq_eisa_shutdown (device_t);
62static int pdq_eisa_shutdown (device_t);
63static void pdq_eisa_ifintr (void *);
57
58#define DEFEA_IRQS 0x0000FBA9U
59
60#define DEFEA_INTRENABLE 0x8 /* level interrupt */
61#define DEFEA_DECODE_IRQ(n) ((DEFEA_IRQS >> ((n) << 2)) & 0x0f)
62
63#define EISA_DEVICE_ID_DEC_DEC3001 0x10a33001
64#define EISA_DEVICE_ID_DEC_DEC3002 0x10a33002

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86pdq_eisa_devinit (sc)
87 pdq_softc_t *sc;
88{
89 pdq_uint8_t data;
90
91 /*
92 * Do the standard initialization for the DEFEA registers.
93 */
64
65#define DEFEA_IRQS 0x0000FBA9U
66
67#define DEFEA_INTRENABLE 0x8 /* level interrupt */
68#define DEFEA_DECODE_IRQ(n) ((DEFEA_IRQS >> ((n) << 2)) & 0x0f)
69
70#define EISA_DEVICE_ID_DEC_DEC3001 0x10a33001
71#define EISA_DEVICE_ID_DEC_DEC3002 0x10a33002

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93pdq_eisa_devinit (sc)
94 pdq_softc_t *sc;
95{
96 pdq_uint8_t data;
97
98 /*
99 * Do the standard initialization for the DEFEA registers.
100 */
94 PDQ_OS_IOWR_8(sc->sc_bc, sc->sc_iobase, PDQ_EISA_FUNCTION_CTRL, 0x23);
95 PDQ_OS_IOWR_8(sc->sc_bc, sc->sc_iobase, PDQ_EISA_IO_CMP_1_1, (sc->sc_iobase >> 8) & 0xF0);
96 PDQ_OS_IOWR_8(sc->sc_bc, sc->sc_iobase, PDQ_EISA_IO_CMP_0_1, (sc->sc_iobase >> 8) & 0xF0);
97 PDQ_OS_IOWR_8(sc->sc_bc, sc->sc_iobase, PDQ_EISA_SLOT_CTRL, 0x01);
98 data = PDQ_OS_IORD_8(sc->sc_bc, sc->sc_iobase, PDQ_EISA_BURST_HOLDOFF);
101 PDQ_OS_IOWR_8(sc->io_bst, sc->io_bsh, PDQ_EISA_FUNCTION_CTRL, 0x23);
102 PDQ_OS_IOWR_8(sc->io_bst, sc->io_bsh, PDQ_EISA_IO_CMP_1_1, (sc->io_bsh >> 8) & 0xF0);
103 PDQ_OS_IOWR_8(sc->io_bst, sc->io_bsh, PDQ_EISA_IO_CMP_0_1, (sc->io_bsh >> 8) & 0xF0);
104 PDQ_OS_IOWR_8(sc->io_bst, sc->io_bsh, PDQ_EISA_SLOT_CTRL, 0x01);
105 data = PDQ_OS_IORD_8(sc->io_bst, sc->io_bsh, PDQ_EISA_BURST_HOLDOFF);
99#if defined(PDQ_IOMAPPED)
106#if defined(PDQ_IOMAPPED)
100 PDQ_OS_IOWR_8(sc->sc_bc, sc->sc_iobase, PDQ_EISA_BURST_HOLDOFF, data & ~1);
107 PDQ_OS_IOWR_8(sc->io_bst, sc->io_bsh, PDQ_EISA_BURST_HOLDOFF, data & ~1);
101#else
108#else
102 PDQ_OS_IOWR_8(sc->sc_bc, sc->sc_iobase, PDQ_EISA_BURST_HOLDOFF, data | 1);
109 PDQ_OS_IOWR_8(sc->io_bst, sc->io_bsh, PDQ_EISA_BURST_HOLDOFF, data | 1);
103#endif
110#endif
104 data = PDQ_OS_IORD_8(sc->sc_bc, sc->sc_iobase, PDQ_EISA_IO_CONFIG_STAT_0);
105 PDQ_OS_IOWR_8(sc->sc_bc, sc->sc_iobase, PDQ_EISA_IO_CONFIG_STAT_0, data | DEFEA_INTRENABLE);
111 data = PDQ_OS_IORD_8(sc->io_bst, sc->io_bsh, PDQ_EISA_IO_CONFIG_STAT_0);
112 PDQ_OS_IOWR_8(sc->io_bst, sc->io_bsh, PDQ_EISA_IO_CONFIG_STAT_0, data | DEFEA_INTRENABLE);
106
107 return;
108}
109
110static const char *
111pdq_eisa_match (type)
112 eisa_id_t type;
113{

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139 desc = pdq_eisa_match(eisa_id);
140 if (!desc) {
141 return (ENXIO);
142 }
143
144 device_set_desc(dev, desc);
145
146 iobase = eisa_get_slot(dev) * EISA_SLOT_SIZE;
113
114 return;
115}
116
117static const char *
118pdq_eisa_match (type)
119 eisa_id_t type;
120{

--- 25 unchanged lines hidden (view full) ---

146 desc = pdq_eisa_match(eisa_id);
147 if (!desc) {
148 return (ENXIO);
149 }
150
151 device_set_desc(dev, desc);
152
153 iobase = eisa_get_slot(dev) * EISA_SLOT_SIZE;
147 pdq_eisa_subprobe(PDQ_BUS_EISA, iobase, &maddr, &msize, &irq);
154 pdq_eisa_subprobe(SYS_RES_IOPORT, iobase, &maddr, &msize, &irq);
148
149 eisa_add_iospace(dev, iobase, 0x200, RESVADDR_NONE);
150 eisa_add_mspace(dev, maddr, msize, RESVADDR_NONE);
151 eisa_add_intr(dev, irq, EISA_TRIGGER_LEVEL);
152
153 return (0);
154}
155
155
156 eisa_add_iospace(dev, iobase, 0x200, RESVADDR_NONE);
157 eisa_add_mspace(dev, maddr, msize, RESVADDR_NONE);
158 eisa_add_intr(dev, irq, EISA_TRIGGER_LEVEL);
159
160 return (0);
161}
162
156void
157pdq_eisa_intr(xdev)
158 void *xdev;
163static void
164pdq_eisa_ifintr(arg)
165 void * arg;
159{
166{
160 device_t dev = (device_t) xdev;
161 pdq_softc_t *sc = device_get_softc(dev);
167 device_t dev;
168 pdq_softc_t * sc;
169
170 dev = (device_t)arg;
171 sc = device_get_softc(dev);
172
173 PDQ_LOCK(sc);
162 (void) pdq_interrupt(sc->sc_pdq);
174 (void) pdq_interrupt(sc->sc_pdq);
175 PDQ_LOCK(sc);
163
164 return;
165}
166
167static int
168pdq_eisa_attach (dev)
176
177 return;
178}
179
180static int
181pdq_eisa_attach (dev)
169 device_t dev;
182 device_t dev;
170{
183{
171 pdq_softc_t *sc = device_get_softc(dev);
172 struct resource *io = 0;
173 struct resource *irq = 0;
174 struct resource *mspace = 0;
175 int rid;
176 void *ih;
177 u_int32_t m_addr, m_size;
184 pdq_softc_t * sc;
185 struct ifnet * ifp;
186 int error;
178
187
179 rid = 0;
180 io = bus_alloc_resource(dev, SYS_RES_IOPORT, &rid,
181 0, ~0, 1, RF_ACTIVE);
188 sc = device_get_softc(dev);
189 ifp = &sc->arpcom.ac_if;
182
190
183 if (!io) {
184 device_printf(dev, "No I/O space?!\n");
191 sc->dev = dev;
192
193 sc->io_rid = 0;
194 sc->io_type = SYS_RES_IOPORT;
195 sc->io = bus_alloc_resource(dev, sc->io_type, &sc->io_rid,
196 0, ~0, 1, RF_ACTIVE);
197 if (!sc->io) {
198 device_printf(dev, "Unable to allocate I/O space resource.\n");
199 error = ENXIO;
185 goto bad;
186 }
200 goto bad;
201 }
202 sc->io_bsh = rman_get_bushandle(sc->io);
203 sc->io_bst = rman_get_bustag(sc->io);
187
204
188 rid = 0;
189 mspace = bus_alloc_resource(dev, SYS_RES_MEMORY, &rid,
190 0, ~0, 1, RF_ACTIVE);
191
192 if (!mspace) {
193 device_printf(dev, "No memory space?!\n");
205 sc->mem_rid = 0;
206 sc->mem_type = SYS_RES_MEMORY;
207 sc->mem = bus_alloc_resource(dev, sc->mem_type, &sc->mem_rid,
208 0, ~0, 1, RF_ACTIVE);
209 if (!sc->mem) {
210 device_printf(dev, "Unable to allocate memory resource.\n");
211 error = ENXIO;
194 goto bad;
195 }
212 goto bad;
213 }
214 sc->mem_bsh = rman_get_bushandle(sc->mem);
215 sc->mem_bst = rman_get_bustag(sc->mem);
196
216
197 rid = 0;
198 irq = bus_alloc_resource(dev, SYS_RES_IRQ, &rid,
199 0, ~0, 1, RF_ACTIVE);
200
201 if (!irq) {
202 device_printf(dev, "No, irq?!\n");
217 sc->irq_rid = 0;
218 sc->irq = bus_alloc_resource(dev, SYS_RES_IRQ, &sc->irq_rid,
219 0, ~0, 1, RF_SHAREABLE | RF_ACTIVE);
220 if (!sc->irq) {
221 device_printf(dev, "Unable to allocate interrupt resource.\n");
222 error = ENXIO;
203 goto bad;
204 }
205
223 goto bad;
224 }
225
206 m_addr = rman_get_start(mspace);
207 m_size = rman_get_size(mspace);
226 ifp->if_name = "fea";
227 ifp->if_unit = device_get_unit(dev);
208
228
209 sc->sc_iobase = (pdq_bus_ioport_t) rman_get_start(io);
210 sc->sc_membase = (pdq_bus_memaddr_t) pmap_mapdev(m_addr, m_size);
211 sc->sc_if.if_name = "fea";
212 sc->sc_if.if_unit = device_get_unit(dev);
213
214 pdq_eisa_devinit(sc);
229 pdq_eisa_devinit(sc);
215 sc->sc_pdq = pdq_initialize(PDQ_BUS_EISA, sc->sc_membase,
216 sc->sc_if.if_name, sc->sc_if.if_unit,
217 (void *) sc, PDQ_DEFEA);
230 sc->sc_pdq = pdq_initialize(sc->mem_bst, sc->mem_bsh,
231 ifp->if_name, ifp->if_unit,
232 (void *)sc, PDQ_DEFEA);
218 if (sc->sc_pdq == NULL) {
233 if (sc->sc_pdq == NULL) {
219 device_printf(dev, "initialization failed\n");
234 device_printf(dev, "Initialization failed.\n");
235 error = ENXIO;
220 goto bad;
221 }
222
236 goto bad;
237 }
238
223 if (bus_setup_intr(dev, irq, INTR_TYPE_NET, pdq_eisa_intr, dev, &ih)) {
239 error = bus_setup_intr(dev, sc->irq, INTR_TYPE_NET,
240 pdq_eisa_ifintr, dev, &sc->irq_ih);
241 if (error) {
242 device_printf(dev, "Failed to setup interrupt handler.\n");
243 error = ENXIO;
224 goto bad;
225 }
226
244 goto bad;
245 }
246
227 bcopy((caddr_t) sc->sc_pdq->pdq_hwaddr.lanaddr_bytes, sc->sc_ac.ac_enaddr, 6);
228 pdq_ifattach(sc, NULL);
247 bcopy((caddr_t) sc->sc_pdq->pdq_hwaddr.lanaddr_bytes,
248 (caddr_t) sc->arpcom.ac_enaddr, FDDI_ADDR_LEN);
249 pdq_ifattach(sc);
229
230 return (0);
250
251 return (0);
231
232bad:
252bad:
233 if (io)
234 bus_release_resource(dev, SYS_RES_IOPORT, 0, io);
235 if (irq)
236 bus_release_resource(dev, SYS_RES_IRQ, 0, irq);
237 if (mspace)
238 bus_release_resource(dev, SYS_RES_MEMORY, 0, mspace);
253 pdq_free(dev);
254 return (error);
255}
239
256
240 return (-1);
257static int
258pdq_eisa_detach (dev)
259 device_t dev;
260{
261 pdq_softc_t * sc;
262
263 sc = device_get_softc(dev);
264 pdq_ifdetach(sc);
265
266 return (0);
241}
242
243static int
244pdq_eisa_shutdown(dev)
245 device_t dev;
246{
267}
268
269static int
270pdq_eisa_shutdown(dev)
271 device_t dev;
272{
247 pdq_softc_t *sc = device_get_softc(dev);
273 pdq_softc_t * sc;
248
274
275 sc = device_get_softc(dev);
249 pdq_hwreset(sc->sc_pdq);
250
251 return (0);
252}
253
254static device_method_t pdq_eisa_methods[] = {
255 DEVMETHOD(device_probe, pdq_eisa_probe),
256 DEVMETHOD(device_attach, pdq_eisa_attach),
276 pdq_hwreset(sc->sc_pdq);
277
278 return (0);
279}
280
281static device_method_t pdq_eisa_methods[] = {
282 DEVMETHOD(device_probe, pdq_eisa_probe),
283 DEVMETHOD(device_attach, pdq_eisa_attach),
284 DEVMETHOD(device_attach, pdq_eisa_detach),
257 DEVMETHOD(device_shutdown, pdq_eisa_shutdown),
258
259 { 0, 0 }
260};
261
262static driver_t pdq_eisa_driver = {
263 "fea",
264 pdq_eisa_methods,
265 sizeof(pdq_softc_t),
266};
267
285 DEVMETHOD(device_shutdown, pdq_eisa_shutdown),
286
287 { 0, 0 }
288};
289
290static driver_t pdq_eisa_driver = {
291 "fea",
292 pdq_eisa_methods,
293 sizeof(pdq_softc_t),
294};
295
268static devclass_t pdq_devclass;
269
270DRIVER_MODULE(pdq, eisa, pdq_eisa_driver, pdq_devclass, 0, 0);
296DRIVER_MODULE(if_fea, eisa, pdq_eisa_driver, pdq_devclass, 0, 0);
297/* MODULE_DEPEND(if_fea, eisa, 1, 1, 1); */
298MODULE_DEPEND(if_fea, fddi, 1, 1, 1);