1/*-
2 * Copyright (c) 2006, Pyun YongHyeon <yongari@FreeBSD.org>
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions
7 * are met:
8 * 1. Redistributions of source code must retain the above copyright
9 * notice unmodified, this list of conditions, and the following
10 * disclaimer.
11 * 2. Redistributions in binary form must reproduce the above copyright
12 * notice, this list of conditions and the following disclaimer in the
13 * documentation and/or other materials provided with the distribution.
14 *
15 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
16 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
17 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
18 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
19 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
20 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
21 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
22 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
23 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
24 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
25 * SUCH DAMAGE.
26 *
27 */
28
29#include <sys/cdefs.h>
30__FBSDID("$FreeBSD: head/sys/dev/mii/ip1000phy.c 215297 2010-11-14 13:26:10Z marius $");
31
32/*
33 * Driver for the IC Plus IP1000A/IP1001 10/100/1000 PHY.
34 */
35
36#include <sys/param.h>
37#include <sys/systm.h>
38#include <sys/kernel.h>
39#include <sys/module.h>
40#include <sys/socket.h>
41#include <sys/bus.h>
42
43#include <net/if.h>
44#include <net/if_media.h>
45
46#include <dev/mii/mii.h>
47#include <dev/mii/miivar.h>
48#include "miidevs.h"
49
50#include <dev/mii/ip1000phyreg.h>
51
52#include "miibus_if.h"
53
54#include <machine/bus.h>
55#include <dev/stge/if_stgereg.h>
56
57static int ip1000phy_probe(device_t);
58static int ip1000phy_attach(device_t);
59
60struct ip1000phy_softc {
61 struct mii_softc mii_sc;
62 int model;
63 int revision;
64};
65
66static device_method_t ip1000phy_methods[] = {
67 /* device interface */
68 DEVMETHOD(device_probe, ip1000phy_probe),
69 DEVMETHOD(device_attach, ip1000phy_attach),
70 DEVMETHOD(device_detach, mii_phy_detach),
71 DEVMETHOD(device_shutdown, bus_generic_shutdown),
72 { 0, 0 }
73};
74
75static devclass_t ip1000phy_devclass;
76static driver_t ip1000phy_driver = {
77 "ip1000phy",
78 ip1000phy_methods,
79 sizeof (struct mii_softc)
80};
81
82DRIVER_MODULE(ip1000phy, miibus, ip1000phy_driver, ip1000phy_devclass, 0, 0);
83
84static int ip1000phy_service(struct mii_softc *, struct mii_data *, int);
85static void ip1000phy_status(struct mii_softc *);
86static void ip1000phy_reset(struct mii_softc *);
87static int ip1000phy_mii_phy_auto(struct mii_softc *, int);
88
89static const struct mii_phydesc ip1000phys[] = {
90 MII_PHY_DESC(ICPLUS, IP1000A),
91 MII_PHY_DESC(ICPLUS, IP1001),
92 MII_PHY_END
93};
94
95static int
96ip1000phy_probe(device_t dev)
97{
98
99 return (mii_phy_dev_probe(dev, ip1000phys, BUS_PROBE_DEFAULT));
100}
101
102static int
103ip1000phy_attach(device_t dev)
104{
105 struct ip1000phy_softc *isc;
106 struct mii_softc *sc;
107 struct mii_attach_args *ma;
108 struct mii_data *mii;
109
110 isc = device_get_softc(dev);
111 sc = &isc->mii_sc;
112 ma = device_get_ivars(dev);
113 sc->mii_dev = device_get_parent(dev);
114 mii = ma->mii_data;
115 LIST_INSERT_HEAD(&mii->mii_phys, sc, mii_list);
116
117 sc->mii_flags = miibus_get_flags(dev);
118 sc->mii_inst = mii->mii_instance++;
119 sc->mii_phy = ma->mii_phyno;
120 sc->mii_service = ip1000phy_service;
121 sc->mii_pdata = mii;
122
123 sc->mii_flags |= MIIF_NOISOLATE | MIIF_NOMANPAUSE;
124
125 isc->model = MII_MODEL(ma->mii_id2);
126 isc->revision = MII_REV(ma->mii_id2);
127 if (isc->model == MII_MODEL_ICPLUS_IP1000A &&
128 strcmp(mii->mii_ifp->if_dname, "stge") == 0 &&
129 (sc->mii_flags & MIIF_MACPRIV0) != 0)
130 sc->mii_flags |= MIIF_PHYPRIV0;
131
132 sc->mii_capabilities = PHY_READ(sc, MII_BMSR) & ma->mii_capmask;
133 if (sc->mii_capabilities & BMSR_EXTSTAT)
134 sc->mii_extcapabilities = PHY_READ(sc, MII_EXTSR);
135 device_printf(dev, " ");
136
137 ip1000phy_reset(sc);
138 mii_phy_add_media(sc);
139 printf("\n");
140
141 MIIBUS_MEDIAINIT(sc->mii_dev);
142 return (0);
143}
144
145static int
146ip1000phy_service(struct mii_softc *sc, struct mii_data *mii, int cmd)
147{
148 struct ifmedia_entry *ife = mii->mii_media.ifm_cur;
149 uint32_t gig, reg, speed;
150
151 switch (cmd) {
152 case MII_POLLSTAT:
153 break;
154
155 case MII_MEDIACHG:
156 /*
157 * If the interface is not up, don't do anything.
158 */
159 if ((mii->mii_ifp->if_flags & IFF_UP) == 0) {
160 break;
161 }
162
163 ip1000phy_reset(sc);
164 switch (IFM_SUBTYPE(ife->ifm_media)) {
165 case IFM_AUTO:
166 (void)ip1000phy_mii_phy_auto(sc, ife->ifm_media);
167 goto done;
168
169 case IFM_1000_T:
170 /*
171 * XXX
172 * Manual 1000baseT setting doesn't seem to work.
173 */
174 speed = IP1000PHY_BMCR_1000;
175 break;
176
177 case IFM_100_TX:
178 speed = IP1000PHY_BMCR_100;
179 break;
180
181 case IFM_10_T:
182 speed = IP1000PHY_BMCR_10;
183 break;
184
185 default:
186 return (EINVAL);
187 }
188
189 if (((ife->ifm_media & IFM_GMASK) & IFM_FDX) != 0) {
190 speed |= IP1000PHY_BMCR_FDX;
191 gig = IP1000PHY_1000CR_1000T_FDX;
192 } else
193 gig = IP1000PHY_1000CR_1000T;
194
195 PHY_WRITE(sc, IP1000PHY_MII_1000CR, 0);
196 PHY_WRITE(sc, IP1000PHY_MII_BMCR, speed);
197
198 if (IFM_SUBTYPE(ife->ifm_media) != IFM_1000_T)
199 break;
200
201 gig |= IP1000PHY_1000CR_MASTER | IP1000PHY_1000CR_MANUAL;
202 if ((ife->ifm_media & IFM_ETH_MASTER) != 0)
203 gig |= IP1000PHY_1000CR_MMASTER;
204 PHY_WRITE(sc, IP1000PHY_MII_1000CR, gig);
205
206done:
207 break;
208
209 case MII_TICK:
210 /*
211 * Is the interface even up?
212 */
213 if ((mii->mii_ifp->if_flags & IFF_UP) == 0)
214 return (0);
215
216 /*
217 * Only used for autonegotiation.
218 */
219 if (IFM_SUBTYPE(ife->ifm_media) != IFM_AUTO) {
220 sc->mii_ticks = 0;
221 break;
222 }
223
224 /*
225 * check for link.
226 */
227 reg = PHY_READ(sc, MII_BMSR) | PHY_READ(sc, MII_BMSR);
228 if (reg & BMSR_LINK) {
229 sc->mii_ticks = 0;
230 break;
231 }
232
233 /* Announce link loss right after it happens */
234 if (sc->mii_ticks++ == 0)
235 break;
236
237 /*
238 * Only retry autonegotiation every mii_anegticks seconds.
239 */
240 if (sc->mii_ticks <= sc->mii_anegticks)
241 break;
242
243 sc->mii_ticks = 0;
244 ip1000phy_mii_phy_auto(sc, ife->ifm_media);
245 break;
246 }
247
248 /* Update the media status. */
249 ip1000phy_status(sc);
250
251 /* Callback if something changed. */
252 mii_phy_update(sc, cmd);
253 return (0);
254}
255
256static void
257ip1000phy_status(struct mii_softc *sc)
258{
259 struct ip1000phy_softc *isc;
260 struct mii_data *mii = sc->mii_pdata;
261 uint32_t bmsr, bmcr, stat;
262
263 isc = (struct ip1000phy_softc *)sc;
264
265 mii->mii_media_status = IFM_AVALID;
266 mii->mii_media_active = IFM_ETHER;
267
268 bmsr = PHY_READ(sc, IP1000PHY_MII_BMSR) |
269 PHY_READ(sc, IP1000PHY_MII_BMSR);
270 if ((bmsr & IP1000PHY_BMSR_LINK) != 0)
271 mii->mii_media_status |= IFM_ACTIVE;
272
273 bmcr = PHY_READ(sc, IP1000PHY_MII_BMCR);
274 if ((bmcr & IP1000PHY_BMCR_LOOP) != 0)
275 mii->mii_media_active |= IFM_LOOP;
276
277 if ((bmcr & IP1000PHY_BMCR_AUTOEN) != 0) {
278 if ((bmsr & IP1000PHY_BMSR_ANEGCOMP) == 0) {
279 /* Erg, still trying, I guess... */
280 mii->mii_media_active |= IFM_NONE;
281 return;
282 }
283 }
284
285 if (isc->model == MII_MODEL_ICPLUS_IP1001) {
286 stat = PHY_READ(sc, IP1000PHY_LSR);
287 switch (stat & IP1000PHY_LSR_SPEED_MASK) {
288 case IP1000PHY_LSR_SPEED_10:
289 mii->mii_media_active |= IFM_10_T;
290 break;
291 case IP1000PHY_LSR_SPEED_100:
292 mii->mii_media_active |= IFM_100_TX;
293 break;
294 case IP1000PHY_LSR_SPEED_1000:
295 mii->mii_media_active |= IFM_1000_T;
296 break;
297 default:
298 mii->mii_media_active |= IFM_NONE;
299 return;
300 }
301 if ((stat & IP1000PHY_LSR_FULL_DUPLEX) != 0)
302 mii->mii_media_active |= IFM_FDX;
303 else
304 mii->mii_media_active |= IFM_HDX;
305 } else {
306 stat = PHY_READ(sc, STGE_PhyCtrl);
307 switch (PC_LinkSpeed(stat)) {
308 case PC_LinkSpeed_Down:
309 mii->mii_media_active |= IFM_NONE;
310 return;
311 case PC_LinkSpeed_10:
312 mii->mii_media_active |= IFM_10_T;
313 break;
314 case PC_LinkSpeed_100:
315 mii->mii_media_active |= IFM_100_TX;
316 break;
317 case PC_LinkSpeed_1000:
318 mii->mii_media_active |= IFM_1000_T;
319 break;
320 default:
321 mii->mii_media_active |= IFM_NONE;
322 return;
323 }
324 if ((stat & PC_PhyDuplexStatus) != 0)
325 mii->mii_media_active |= IFM_FDX;
326 else
327 mii->mii_media_active |= IFM_HDX;
328 }
329
330 if ((mii->mii_media_active & IFM_FDX) != 0)
331 mii->mii_media_active |= mii_phy_flowstatus(sc);
332
333 if ((mii->mii_media_active & IFM_1000_T) != 0) {
334 stat = PHY_READ(sc, IP1000PHY_MII_1000SR);
335 if ((stat & IP1000PHY_1000SR_MASTER) != 0)
336 mii->mii_media_active |= IFM_ETH_MASTER;
337 }
338}
339
340static int
341ip1000phy_mii_phy_auto(struct mii_softc *sc, int media)
342{
343 struct ip1000phy_softc *isc;
344 uint32_t reg;
345
346 isc = (struct ip1000phy_softc *)sc;
347 reg = 0;
348 if (isc->model == MII_MODEL_ICPLUS_IP1001) {
349 reg = PHY_READ(sc, IP1000PHY_MII_ANAR);
350 reg |= IP1000PHY_ANAR_NP;
351 }
352 reg |= IP1000PHY_ANAR_10T | IP1000PHY_ANAR_10T_FDX |
353 IP1000PHY_ANAR_100TX | IP1000PHY_ANAR_100TX_FDX;
354 if ((media & IFM_FLOW) != 0 || (sc->mii_flags & MIIF_FORCEPAUSE) != 0)
355 reg |= IP1000PHY_ANAR_PAUSE | IP1000PHY_ANAR_APAUSE;
356 PHY_WRITE(sc, IP1000PHY_MII_ANAR, reg | IP1000PHY_ANAR_CSMA);
357
358 reg = IP1000PHY_1000CR_1000T | IP1000PHY_1000CR_1000T_FDX;
359 reg |= IP1000PHY_1000CR_MASTER;
360 PHY_WRITE(sc, IP1000PHY_MII_1000CR, reg);
361 PHY_WRITE(sc, IP1000PHY_MII_BMCR, (IP1000PHY_BMCR_FDX |
362 IP1000PHY_BMCR_AUTOEN | IP1000PHY_BMCR_STARTNEG));
363
364 return (EJUSTRETURN);
365}
366
367static void
368ip1000phy_load_dspcode(struct mii_softc *sc)
369{
370
371 PHY_WRITE(sc, 31, 0x0001);
372 PHY_WRITE(sc, 27, 0x01e0);
373 PHY_WRITE(sc, 31, 0x0002);
374 PHY_WRITE(sc, 27, 0xeb8e);
375 PHY_WRITE(sc, 31, 0x0000);
376 PHY_WRITE(sc, 30, 0x005e);
377 PHY_WRITE(sc, 9, 0x0700);
378
379 DELAY(50);
380}
381
382static void
383ip1000phy_reset(struct mii_softc *sc)
384{
385 uint32_t reg;
386
387 mii_phy_reset(sc);
388
389 /* clear autoneg/full-duplex as we don't want it after reset */
390 reg = PHY_READ(sc, IP1000PHY_MII_BMCR);
391 reg &= ~(IP1000PHY_BMCR_AUTOEN | IP1000PHY_BMCR_FDX);
392 PHY_WRITE(sc, MII_BMCR, reg);
393
394 if ((sc->mii_flags & MIIF_PHYPRIV0) != 0)
395 ip1000phy_load_dspcode(sc);
396}