1/* $FreeBSD: stable/10/sys/dev/isp/ispmbox.h 291520 2015-11-30 21:44:38Z mav $ */
2/*-
3 * Copyright (c) 1997-2009 by Matthew Jacob
4 * All rights reserved.
5 *
6 * Redistribution and use in source and binary forms, with or without
7 * modification, are permitted provided that the following conditions
8 * are met:
9 *
10 * 1. Redistributions of source code must retain the above copyright
11 * notice, this list of conditions and the following disclaimer.
12 * 2. Redistributions in binary form must reproduce the above copyright
13 * notice, this list of conditions and the following disclaimer in the
14 * documentation and/or other materials provided with the distribution.
15 *
16 * THIS SOFTWARE IS PROVIDED BY AUTHOR AND CONTRIBUTORS ``AS IS'' AND
17 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
18 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
19 * ARE DISCLAIMED. IN NO EVENT SHALL AUTHOR OR CONTRIBUTORS BE LIABLE
20 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
21 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
22 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
23 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
24 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
25 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
26 * SUCH DAMAGE.
27 *
28 */
29
30/*
31 * Mailbox and Queue Entry Definitions for for Qlogic ISP SCSI adapters.
32 */
33#ifndef _ISPMBOX_H
34#define _ISPMBOX_H
35
36/*
37 * Mailbox Command Opcodes
38 */
39#define MBOX_NO_OP 0x0000
40#define MBOX_LOAD_RAM 0x0001
41#define MBOX_EXEC_FIRMWARE 0x0002
42#define MBOX_DUMP_RAM 0x0003
43#define MBOX_WRITE_RAM_WORD 0x0004
44#define MBOX_READ_RAM_WORD 0x0005
45#define MBOX_MAILBOX_REG_TEST 0x0006
46#define MBOX_VERIFY_CHECKSUM 0x0007
47#define MBOX_ABOUT_FIRMWARE 0x0008
48#define MBOX_LOAD_RISC_RAM_2100 0x0009
49 /* a */
50#define MBOX_LOAD_RISC_RAM 0x000b
51#define MBOX_DUMP_RISC_RAM 0x000c
52#define MBOX_WRITE_RAM_WORD_EXTENDED 0x000d
53#define MBOX_CHECK_FIRMWARE 0x000e
54#define MBOX_READ_RAM_WORD_EXTENDED 0x000f
55#define MBOX_INIT_REQ_QUEUE 0x0010
56#define MBOX_INIT_RES_QUEUE 0x0011
57#define MBOX_EXECUTE_IOCB 0x0012
58#define MBOX_WAKE_UP 0x0013
59#define MBOX_STOP_FIRMWARE 0x0014
60#define MBOX_ABORT 0x0015
61#define MBOX_ABORT_DEVICE 0x0016
62#define MBOX_ABORT_TARGET 0x0017
63#define MBOX_BUS_RESET 0x0018
64#define MBOX_STOP_QUEUE 0x0019
65#define MBOX_START_QUEUE 0x001a
66#define MBOX_SINGLE_STEP_QUEUE 0x001b
67#define MBOX_ABORT_QUEUE 0x001c
68#define MBOX_GET_DEV_QUEUE_STATUS 0x001d
69 /* 1e */
70#define MBOX_GET_FIRMWARE_STATUS 0x001f
71#define MBOX_GET_INIT_SCSI_ID 0x0020
72#define MBOX_GET_SELECT_TIMEOUT 0x0021
73#define MBOX_GET_RETRY_COUNT 0x0022
74#define MBOX_GET_TAG_AGE_LIMIT 0x0023
75#define MBOX_GET_CLOCK_RATE 0x0024
76#define MBOX_GET_ACT_NEG_STATE 0x0025
77#define MBOX_GET_ASYNC_DATA_SETUP_TIME 0x0026
78#define MBOX_GET_SBUS_PARAMS 0x0027
79#define MBOX_GET_PCI_PARAMS MBOX_GET_SBUS_PARAMS
80#define MBOX_GET_TARGET_PARAMS 0x0028
81#define MBOX_GET_DEV_QUEUE_PARAMS 0x0029
82#define MBOX_GET_RESET_DELAY_PARAMS 0x002a
83 /* 2b */
84 /* 2c */
85 /* 2d */
86 /* 2e */
87 /* 2f */
88#define MBOX_SET_INIT_SCSI_ID 0x0030
89#define MBOX_SET_SELECT_TIMEOUT 0x0031
90#define MBOX_SET_RETRY_COUNT 0x0032
91#define MBOX_SET_TAG_AGE_LIMIT 0x0033
92#define MBOX_SET_CLOCK_RATE 0x0034
93#define MBOX_SET_ACT_NEG_STATE 0x0035
94#define MBOX_SET_ASYNC_DATA_SETUP_TIME 0x0036
95#define MBOX_SET_SBUS_CONTROL_PARAMS 0x0037
96#define MBOX_SET_PCI_PARAMETERS 0x0037
97#define MBOX_SET_TARGET_PARAMS 0x0038
98#define MBOX_SET_DEV_QUEUE_PARAMS 0x0039
99#define MBOX_SET_RESET_DELAY_PARAMS 0x003a
100 /* 3b */
101 /* 3c */
102 /* 3d */
103 /* 3e */
104 /* 3f */
105#define MBOX_RETURN_BIOS_BLOCK_ADDR 0x0040
106#define MBOX_WRITE_FOUR_RAM_WORDS 0x0041
107#define MBOX_EXEC_BIOS_IOCB 0x0042
108#define MBOX_SET_FW_FEATURES 0x004a
109#define MBOX_GET_FW_FEATURES 0x004b
110#define FW_FEATURE_FAST_POST 0x1
111#define FW_FEATURE_LVD_NOTIFY 0x2
112#define FW_FEATURE_RIO_32BIT 0x4
113#define FW_FEATURE_RIO_16BIT 0x8
114
115#define MBOX_INIT_REQ_QUEUE_A64 0x0052
116#define MBOX_INIT_RES_QUEUE_A64 0x0053
117
118#define MBOX_ENABLE_TARGET_MODE 0x0055
119#define ENABLE_TARGET_FLAG 0x8000
120#define ENABLE_TQING_FLAG 0x0004
121#define ENABLE_MANDATORY_DISC 0x0002
122#define MBOX_GET_TARGET_STATUS 0x0056
123
124/* These are for the ISP2X00 FC cards */
125#define MBOX_WRITE_FC_SERDES_REG 0x0003 /* FC only */
126#define MBOX_READ_FC_SERDES_REG 0x0004 /* FC only */
127#define MBOX_GET_IO_STATUS 0x0012
128#define MBOX_SET_TRANSMIT_PARAMS 0x0019
129#define MBOX_SET_PORT_PARAMS 0x001a
130#define MBOX_LOAD_OP_FW_PARAMS 0x001b
131#define MBOX_INIT_MULTIPLE_QUEUE 0x001f
132#define MBOX_GET_LOOP_ID 0x0020
133/* for 24XX cards, outgoing mailbox 7 has these values for F or FL topologies */
134#define ISP24XX_INORDER 0x0100
135#define ISP24XX_NPIV_SAN 0x0400
136#define ISP24XX_VSAN_SAN 0x1000
137#define ISP24XX_FC_SP_SAN 0x2000
138#define MBOX_GET_TIMEOUT_PARAMS 0x0022
139#define MBOX_GET_FIRMWARE_OPTIONS 0x0028
140#define MBOX_GENERATE_SYSTEM_ERROR 0x002a
141#define MBOX_WRITE_SFP 0x0030
142#define MBOX_READ_SFP 0x0031
143#define MBOX_SET_TIMEOUT_PARAMS 0x0032
144#define MBOX_SET_FIRMWARE_OPTIONS 0x0038
145#define MBOX_GET_SET_FC_LED_CONF 0x003b
146#define MBOX_RESTART_NIC_FIRMWARE 0x003d /* FCoE only */
147#define MBOX_ACCESS_CONTROL 0x003e
148#define MBOX_LOOP_PORT_BYPASS 0x0040 /* FC only */
149#define MBOX_LOOP_PORT_ENABLE 0x0041 /* FC only */
150#define MBOX_GET_RESOURCE_COUNT 0x0042
151#define MBOX_REQUEST_OFFLINE_MODE 0x0043
152#define MBOX_DIAGNOSTIC_ECHO_TEST 0x0044
153#define MBOX_DIAGNOSTIC_LOOPBACK 0x0045
154#define MBOX_ENHANCED_GET_PDB 0x0047
155#define MBOX_INIT_FIRMWARE_MULTI_ID 0x0048 /* 2400 only */
156#define MBOX_GET_VP_DATABASE 0x0049 /* 2400 only */
157#define MBOX_GET_VP_DATABASE_ENTRY 0x004a /* 2400 only */
158#define MBOX_GET_FCF_LIST 0x0050 /* FCoE only */
159#define MBOX_GET_DCBX_PARAMETERS 0x0051 /* FCoE only */
160#define MBOX_HOST_MEMORY_COPY 0x0053
161#define MBOX_EXEC_COMMAND_IOCB_A64 0x0054
162#define MBOX_SEND_RNID 0x0057
163#define MBOX_SET_PARAMETERS 0x0059
164#define MBOX_GET_PARAMETERS 0x005a
165#define MBOX_DRIVER_HEARTBEAT 0x005B /* FC only */
166#define MBOX_FW_HEARTBEAT 0x005C
167#define MBOX_GET_SET_DATA_RATE 0x005D /* >=23XX only */
168#define MBGSD_GET_RATE 0
169#define MBGSD_SET_RATE 1
170#define MBGSD_SET_RATE_NOW 2 /* 24XX only */
171#define MBGSD_1GB 0x00
172#define MBGSD_2GB 0x01
173#define MBGSD_AUTO 0x02
174#define MBGSD_4GB 0x03 /* 24XX only */
175#define MBGSD_8GB 0x04 /* 25XX only */
176#define MBGSD_16GB 0x05 /* 26XX only */
177#define MBGSD_10GB 0x13 /* 26XX only */
178#define MBOX_SEND_RNFT 0x005e
179#define MBOX_INIT_FIRMWARE 0x0060
180#define MBOX_GET_INIT_CONTROL_BLOCK 0x0061
181#define MBOX_INIT_LIP 0x0062
182#define MBOX_GET_FC_AL_POSITION_MAP 0x0063
183#define MBOX_GET_PORT_DB 0x0064
184#define MBOX_CLEAR_ACA 0x0065
185#define MBOX_TARGET_RESET 0x0066
186#define MBOX_CLEAR_TASK_SET 0x0067
187#define MBOX_ABORT_TASK_SET 0x0068
188#define MBOX_GET_FW_STATE 0x0069
189#define MBOX_GET_PORT_NAME 0x006A
190#define MBOX_GET_LINK_STATUS 0x006B
191#define MBOX_INIT_LIP_RESET 0x006C
192#define MBOX_GET_LINK_STAT_PR_DATA_CNT 0x006D
193#define MBOX_SEND_SNS 0x006E
194#define MBOX_FABRIC_LOGIN 0x006F
195#define MBOX_SEND_CHANGE_REQUEST 0x0070
196#define MBOX_FABRIC_LOGOUT 0x0071
197#define MBOX_INIT_LIP_LOGIN 0x0072
198#define MBOX_GET_PORT_NODE_NAME_LIST 0x0075
199#define MBOX_SET_VENDOR_ID 0x0076
200#define MBOX_GET_XGMAC_STATS 0x007a
201#define MBOX_GET_ID_LIST 0x007C
202#define MBOX_SEND_LFA 0x007d
203#define MBOX_LUN_RESET 0x007E
204
205#define ISP2100_SET_PCI_PARAM 0x00ff
206
207#define MBOX_BUSY 0x04
208
209/*
210 * Mailbox Command Complete Status Codes
211 */
212#define MBOX_COMMAND_COMPLETE 0x4000
213#define MBOX_INVALID_COMMAND 0x4001
214#define MBOX_HOST_INTERFACE_ERROR 0x4002
215#define MBOX_TEST_FAILED 0x4003
216#define MBOX_COMMAND_ERROR 0x4005
217#define MBOX_COMMAND_PARAM_ERROR 0x4006
218#define MBOX_PORT_ID_USED 0x4007
219#define MBOX_LOOP_ID_USED 0x4008
220#define MBOX_ALL_IDS_USED 0x4009
221#define MBOX_NOT_LOGGED_IN 0x400A
222#define MBOX_LINK_DOWN_ERROR 0x400B
223#define MBOX_LOOPBACK_ERROR 0x400C
224#define MBOX_CHECKSUM_ERROR 0x4010
225#define MBOX_INVALID_PRODUCT_KEY 0x4020
226/* pseudo mailbox completion codes */
227#define MBOX_REGS_BUSY 0x6000 /* registers in use */
228#define MBOX_TIMEOUT 0x6001 /* command timed out */
229
230#define MBLOGALL 0xffffffff
231#define MBLOGNONE 0x00000000
232#define MBLOGMASK(x) (1 << (((x) - 1) & 0x1f))
233
234/*
235 * Asynchronous event status codes
236 */
237#define ASYNC_BUS_RESET 0x8001
238#define ASYNC_SYSTEM_ERROR 0x8002
239#define ASYNC_RQS_XFER_ERR 0x8003
240#define ASYNC_RSP_XFER_ERR 0x8004
241#define ASYNC_QWAKEUP 0x8005
242#define ASYNC_TIMEOUT_RESET 0x8006
243#define ASYNC_DEVICE_RESET 0x8007
244#define ASYNC_EXTMSG_UNDERRUN 0x800A
245#define ASYNC_SCAM_INT 0x800B
246#define ASYNC_HUNG_SCSI 0x800C
247#define ASYNC_KILLED_BUS 0x800D
248#define ASYNC_BUS_TRANSIT 0x800E /* LVD -> HVD, eg. */
249#define ASYNC_LIP_OCCURRED 0x8010 /* FC only */
250#define ASYNC_LOOP_UP 0x8011
251#define ASYNC_LOOP_DOWN 0x8012
252#define ASYNC_LOOP_RESET 0x8013 /* FC only */
253#define ASYNC_PDB_CHANGED 0x8014
254#define ASYNC_CHANGE_NOTIFY 0x8015
255#define ASYNC_LIP_F8 0x8016 /* FC only */
256#define ASYNC_LIP_ERROR 0x8017 /* FC only */
257#define ASYNC_AUTO_PLOGI_RJT 0x8018
258#define ASYNC_SECURITY_UPDATE 0x801B
259#define ASYNC_CMD_CMPLT 0x8020
260#define ASYNC_CTIO_DONE 0x8021
261#define ASYNC_RIO32_1 0x8021
262#define ASYNC_RIO32_2 0x8022
263#define ASYNC_IP_XMIT_DONE 0x8022
264#define ASYNC_IP_RECV_DONE 0x8023
265#define ASYNC_IP_BROADCAST 0x8024
266#define ASYNC_IP_RCVQ_LOW 0x8025
267#define ASYNC_IP_RCVQ_EMPTY 0x8026
268#define ASYNC_IP_RECV_DONE_ALIGNED 0x8027
269#define ASYNC_ERR_LOGGING_DISABLED 0x8029
270#define ASYNC_PTPMODE 0x8030 /* FC only */
271#define ASYNC_RIO16_1 0x8031
272#define ASYNC_RIO16_2 0x8032
273#define ASYNC_RIO16_3 0x8033
274#define ASYNC_RIO16_4 0x8034
275#define ASYNC_RIO16_5 0x8035
276#define ASYNC_CONNMODE 0x8036
277#define ISP_CONN_LOOP 1
278#define ISP_CONN_PTP 2
279#define ISP_CONN_BADLIP 3
280#define ISP_CONN_FATAL 4
281#define ISP_CONN_LOOPBACK 5
282#define ASYNC_P2P_INIT_ERR 0x8037
283#define ASYNC_RIOZIO_STALL 0x8040 /* there's a RIO/ZIO entry that hasn't been serviced */
284#define ASYNC_RIO32_2_2200 0x8042 /* same as ASYNC_RIO32_2, but for 2100/2200 */
285#define ASYNC_RCV_ERR 0x8048
286/*
287 * 2.01.31 2200 Only. Need Bit 13 in Mailbox 1 for Set Firmware Options
288 * mailbox command to enable this.
289 */
290#define ASYNC_QFULL_SENT 0x8049
291#define ASYNC_RJT_SENT 0x8049 /* 24XX only */
292#define ASYNC_SEL_CLASS2_P_RJT_SENT 0x804f
293#define ASYNC_FW_RESTART_COMPLETE 0x8060
294#define ASYNC_TEMPERATURE_ALERT 0x8070
295#define ASYNC_INTER_DRIVER_COMP 0x8100 /* FCoE only */
296#define ASYNC_INTER_DRIVER_NOTIFY 0x8101 /* FCoE only */
297#define ASYNC_INTER_DRIVER_TIME_EXT 0x8102 /* FCoE only */
298#define ASYNC_NIC_FW_STATE_CHANGE 0x8200 /* FCoE only */
299#define ASYNC_AUTOLOAD_FW_COMPLETE 0x8400
300#define ASYNC_AUTOLOAD_FW_FAILURE 0x8401
301
302/*
303 * Firmware Options. There are a lot of them.
304 *
305 * IFCOPTN - ISP Fibre Channel Option Word N
306 */
307#define IFCOPT1_EQFQASYNC (1 << 13) /* enable QFULL notification */
308#define IFCOPT1_EAABSRCVD (1 << 12)
309#define IFCOPT1_RJTASYNC (1 << 11) /* enable 8018 notification */
310#define IFCOPT1_ENAPURE (1 << 10)
311#define IFCOPT1_ENA8017 (1 << 7)
312#define IFCOPT1_DISGPIO67 (1 << 6)
313#define IFCOPT1_LIPLOSSIMM (1 << 5)
314#define IFCOPT1_DISF7SWTCH (1 << 4)
315#define IFCOPT1_CTIO_RETRY (1 << 3)
316#define IFCOPT1_LIPASYNC (1 << 1)
317#define IFCOPT1_LIPF8 (1 << 0)
318
319#define IFCOPT2_LOOPBACK (1 << 1)
320#define IFCOPT2_ATIO3_ONLY (1 << 0)
321
322#define IFCOPT3_NOPRLI (1 << 4) /* disable automatic sending of PRLI on local loops */
323#define IFCOPT3_RNDASYNC (1 << 1)
324
325/*
326 * All IOCB Queue entries are this size
327 */
328#define QENTRY_LEN 64
329
330/*
331 * Command Structure Definitions
332 */
333
334typedef struct {
335 uint32_t ds_base;
336 uint32_t ds_count;
337} ispds_t;
338
339typedef struct {
340 uint32_t ds_base;
341 uint32_t ds_basehi;
342 uint32_t ds_count;
343} ispds64_t;
344
345#define DSTYPE_32BIT 0
346#define DSTYPE_64BIT 1
347typedef struct {
348 uint16_t ds_type; /* 0-> ispds_t, 1-> ispds64_t */
349 uint32_t ds_segment; /* unused */
350 uint32_t ds_base; /* 32 bit address of DSD list */
351} ispdslist_t;
352
353
354typedef struct {
355 uint8_t rqs_entry_type;
356 uint8_t rqs_entry_count;
357 uint8_t rqs_seqno;
358 uint8_t rqs_flags;
359} isphdr_t;
360
361/* RQS Flag definitions */
362#define RQSFLAG_CONTINUATION 0x01
363#define RQSFLAG_FULL 0x02
364#define RQSFLAG_BADHEADER 0x04
365#define RQSFLAG_BADPACKET 0x08
366#define RQSFLAG_BADCOUNT 0x10
367#define RQSFLAG_BADORDER 0x20
368#define RQSFLAG_MASK 0x3f
369
370/* RQS entry_type definitions */
371#define RQSTYPE_REQUEST 0x01
372#define RQSTYPE_DATASEG 0x02
373#define RQSTYPE_RESPONSE 0x03
374#define RQSTYPE_MARKER 0x04
375#define RQSTYPE_CMDONLY 0x05
376#define RQSTYPE_ATIO 0x06 /* Target Mode */
377#define RQSTYPE_CTIO 0x07 /* Target Mode */
378#define RQSTYPE_SCAM 0x08
379#define RQSTYPE_A64 0x09
380#define RQSTYPE_A64_CONT 0x0a
381#define RQSTYPE_ENABLE_LUN 0x0b /* Target Mode */
382#define RQSTYPE_MODIFY_LUN 0x0c /* Target Mode */
383#define RQSTYPE_NOTIFY 0x0d /* Target Mode */
384#define RQSTYPE_NOTIFY_ACK 0x0e /* Target Mode */
385#define RQSTYPE_CTIO1 0x0f /* Target Mode */
386#define RQSTYPE_STATUS_CONT 0x10
387#define RQSTYPE_T2RQS 0x11
388#define RQSTYPE_CTIO7 0x12
389#define RQSTYPE_IP_XMIT 0x13
390#define RQSTYPE_TSK_MGMT 0x14
391#define RQSTYPE_T4RQS 0x15
392#define RQSTYPE_ATIO2 0x16 /* Target Mode */
393#define RQSTYPE_CTIO2 0x17 /* Target Mode */
394#define RQSTYPE_T7RQS 0x18
395#define RQSTYPE_T3RQS 0x19
396#define RQSTYPE_IP_XMIT_64 0x1b
397#define RQSTYPE_CTIO4 0x1e /* Target Mode */
398#define RQSTYPE_CTIO3 0x1f /* Target Mode */
399#define RQSTYPE_RIO1 0x21
400#define RQSTYPE_RIO2 0x22
401#define RQSTYPE_IP_RECV 0x23
402#define RQSTYPE_IP_RECV_CONT 0x24
403#define RQSTYPE_CT_PASSTHRU 0x29
404#define RQSTYPE_MS_PASSTHRU 0x29
405#define RQSTYPE_VP_CTRL 0x30 /* 24XX only */
406#define RQSTYPE_VP_MODIFY 0x31 /* 24XX only */
407#define RQSTYPE_RPT_ID_ACQ 0x32 /* 24XX only */
408#define RQSTYPE_ABORT_IO 0x33
409#define RQSTYPE_T6RQS 0x48
410#define RQSTYPE_LOGIN 0x52
411#define RQSTYPE_ABTS_RCVD 0x54 /* 24XX only */
412#define RQSTYPE_ABTS_RSP 0x55 /* 24XX only */
413
414
415#define ISP_RQDSEG 4
416typedef struct {
417 isphdr_t req_header;
418 uint32_t req_handle;
419 uint8_t req_lun_trn;
420 uint8_t req_target;
421 uint16_t req_cdblen;
422 uint16_t req_flags;
423 uint16_t req_reserved;
424 uint16_t req_time;
425 uint16_t req_seg_count;
426 uint8_t req_cdb[12];
427 ispds_t req_dataseg[ISP_RQDSEG];
428} ispreq_t;
429#define ISP_RQDSEG_A64 2
430
431typedef struct {
432 isphdr_t mrk_header;
433 uint32_t mrk_handle;
434 uint8_t mrk_reserved0;
435 uint8_t mrk_target;
436 uint16_t mrk_modifier;
437 uint16_t mrk_flags;
438 uint16_t mrk_lun;
439 uint8_t mrk_reserved1[48];
440} isp_marker_t;
441
442typedef struct {
443 isphdr_t mrk_header;
444 uint32_t mrk_handle;
445 uint16_t mrk_nphdl;
446 uint8_t mrk_modifier;
447 uint8_t mrk_reserved0;
448 uint8_t mrk_reserved1;
449 uint8_t mrk_vphdl;
450 uint16_t mrk_reserved2;
451 uint8_t mrk_lun[8];
452 uint8_t mrk_reserved3[40];
453} isp_marker_24xx_t;
454
455
456#define SYNC_DEVICE 0
457#define SYNC_TARGET 1
458#define SYNC_ALL 2
459#define SYNC_LIP 3
460
461#define ISP_RQDSEG_T2 3
462typedef struct {
463 isphdr_t req_header;
464 uint32_t req_handle;
465 uint8_t req_lun_trn;
466 uint8_t req_target;
467 uint16_t req_scclun;
468 uint16_t req_flags;
469 uint8_t req_crn;
470 uint8_t req_reserved;
471 uint16_t req_time;
472 uint16_t req_seg_count;
473 uint8_t req_cdb[16];
474 uint32_t req_totalcnt;
475 ispds_t req_dataseg[ISP_RQDSEG_T2];
476} ispreqt2_t;
477
478typedef struct {
479 isphdr_t req_header;
480 uint32_t req_handle;
481 uint16_t req_target;
482 uint16_t req_scclun;
483 uint16_t req_flags;
484 uint16_t req_reserved;
485 uint16_t req_time;
486 uint16_t req_seg_count;
487 uint8_t req_cdb[16];
488 uint32_t req_totalcnt;
489 ispds_t req_dataseg[ISP_RQDSEG_T2];
490} ispreqt2e_t;
491
492#define ISP_RQDSEG_T3 2
493typedef struct {
494 isphdr_t req_header;
495 uint32_t req_handle;
496 uint8_t req_lun_trn;
497 uint8_t req_target;
498 uint16_t req_scclun;
499 uint16_t req_flags;
500 uint8_t req_crn;
501 uint8_t req_reserved;
502 uint16_t req_time;
503 uint16_t req_seg_count;
504 uint8_t req_cdb[16];
505 uint32_t req_totalcnt;
506 ispds64_t req_dataseg[ISP_RQDSEG_T3];
507} ispreqt3_t;
508#define ispreq64_t ispreqt3_t /* same as.... */
509
510typedef struct {
511 isphdr_t req_header;
512 uint32_t req_handle;
513 uint16_t req_target;
514 uint16_t req_scclun;
515 uint16_t req_flags;
516 uint8_t req_crn;
517 uint8_t req_reserved;
518 uint16_t req_time;
519 uint16_t req_seg_count;
520 uint8_t req_cdb[16];
521 uint32_t req_totalcnt;
522 ispds64_t req_dataseg[ISP_RQDSEG_T3];
523} ispreqt3e_t;
524
525/* req_flag values */
526#define REQFLAG_NODISCON 0x0001
527#define REQFLAG_HTAG 0x0002
528#define REQFLAG_OTAG 0x0004
529#define REQFLAG_STAG 0x0008
530#define REQFLAG_TARGET_RTN 0x0010
531
532#define REQFLAG_NODATA 0x0000
533#define REQFLAG_DATA_IN 0x0020
534#define REQFLAG_DATA_OUT 0x0040
535#define REQFLAG_DATA_UNKNOWN 0x0060
536
537#define REQFLAG_DISARQ 0x0100
538#define REQFLAG_FRC_ASYNC 0x0200
539#define REQFLAG_FRC_SYNC 0x0400
540#define REQFLAG_FRC_WIDE 0x0800
541#define REQFLAG_NOPARITY 0x1000
542#define REQFLAG_STOPQ 0x2000
543#define REQFLAG_XTRASNS 0x4000
544#define REQFLAG_PRIORITY 0x8000
545
546typedef struct {
547 isphdr_t req_header;
548 uint32_t req_handle;
549 uint8_t req_lun_trn;
550 uint8_t req_target;
551 uint16_t req_cdblen;
552 uint16_t req_flags;
553 uint16_t req_reserved;
554 uint16_t req_time;
555 uint16_t req_seg_count;
556 uint8_t req_cdb[44];
557} ispextreq_t;
558
559
560/*
561 * ISP24XX structures
562 */
563typedef struct {
564 isphdr_t req_header;
565 uint32_t req_handle;
566 uint16_t req_nphdl;
567 uint16_t req_time;
568 uint16_t req_seg_count;
569 uint16_t req_reserved;
570 uint8_t req_lun[8];
571 uint8_t req_alen_datadir;
572 uint8_t req_task_management;
573 uint8_t req_task_attribute;
574 uint8_t req_crn;
575 uint8_t req_cdb[16];
576 uint32_t req_dl;
577 uint16_t req_tidlo;
578 uint8_t req_tidhi;
579 uint8_t req_vpidx;
580 ispds64_t req_dataseg;
581} ispreqt7_t;
582
583/* Task Management Request Function */
584typedef struct {
585 isphdr_t tmf_header;
586 uint32_t tmf_handle;
587 uint16_t tmf_nphdl;
588 uint8_t tmf_reserved0[2];
589 uint16_t tmf_delay;
590 uint16_t tmf_timeout;
591 uint8_t tmf_lun[8];
592 uint32_t tmf_flags;
593 uint8_t tmf_reserved1[20];
594 uint16_t tmf_tidlo;
595 uint8_t tmf_tidhi;
596 uint8_t tmf_vpidx;
597 uint8_t tmf_reserved2[12];
598} isp24xx_tmf_t;
599
600#define ISP24XX_TMF_NOSEND 0x80000000
601
602#define ISP24XX_TMF_LUN_RESET 0x00000010
603#define ISP24XX_TMF_ABORT_TASK_SET 0x00000008
604#define ISP24XX_TMF_CLEAR_TASK_SET 0x00000004
605#define ISP24XX_TMF_TARGET_RESET 0x00000002
606#define ISP24XX_TMF_CLEAR_ACA 0x00000001
607
608/* I/O Abort Structure */
609typedef struct {
610 isphdr_t abrt_header;
611 uint32_t abrt_handle;
612 uint16_t abrt_nphdl;
613 uint16_t abrt_options;
614 uint32_t abrt_cmd_handle;
615 uint16_t abrt_queue_number;
616 uint8_t abrt_reserved[30];
617 uint16_t abrt_tidlo;
618 uint8_t abrt_tidhi;
619 uint8_t abrt_vpidx;
620 uint8_t abrt_reserved1[12];
621} isp24xx_abrt_t;
622
623#define ISP24XX_ABRT_NOSEND 0x01 /* don't actually send ABTS */
624#define ISP24XX_ABRT_OKAY 0x00 /* in nphdl on return */
625#define ISP24XX_ABRT_ENXIO 0x31 /* in nphdl on return */
626
627#define ISP_CDSEG 7
628typedef struct {
629 isphdr_t req_header;
630 uint32_t req_reserved;
631 ispds_t req_dataseg[ISP_CDSEG];
632} ispcontreq_t;
633
634#define ISP_CDSEG64 5
635typedef struct {
636 isphdr_t req_header;
637 ispds64_t req_dataseg[ISP_CDSEG64];
638} ispcontreq64_t;
639
640typedef struct {
641 isphdr_t req_header;
642 uint32_t req_handle;
643 uint16_t req_scsi_status;
644 uint16_t req_completion_status;
645 uint16_t req_state_flags;
646 uint16_t req_status_flags;
647 uint16_t req_time;
648#define req_response_len req_time /* FC only */
649 uint16_t req_sense_len;
650 uint32_t req_resid;
651 uint8_t req_response[8]; /* FC only */
652 uint8_t req_sense_data[32];
653} ispstatusreq_t;
654
655/*
656 * Status Continuation
657 */
658typedef struct {
659 isphdr_t req_header;
660 uint8_t req_sense_data[60];
661} ispstatus_cont_t;
662
663/*
664 * 24XX Type 0 status
665 */
666typedef struct {
667 isphdr_t req_header;
668 uint32_t req_handle;
669 uint16_t req_completion_status;
670 uint16_t req_oxid;
671 uint32_t req_resid;
672 uint16_t req_reserved0;
673 uint16_t req_state_flags;
674 uint16_t req_retry_delay; /* aka Status Qualifier */
675 uint16_t req_scsi_status;
676 uint32_t req_fcp_residual;
677 uint32_t req_sense_len;
678 uint32_t req_response_len;
679 uint8_t req_rsp_sense[28];
680} isp24xx_statusreq_t;
681
682/*
683 * For Qlogic 2X00, the high order byte of SCSI status has
684 * additional meaning.
685 */
686#define RQCS_CR 0x1000 /* Confirmation Request */
687#define RQCS_RU 0x0800 /* Residual Under */
688#define RQCS_RO 0x0400 /* Residual Over */
689#define RQCS_RESID (RQCS_RU|RQCS_RO)
690#define RQCS_SV 0x0200 /* Sense Length Valid */
691#define RQCS_RV 0x0100 /* FCP Response Length Valid */
692
693/*
694 * CT Passthru IOCB
695 */
696typedef struct {
697 isphdr_t ctp_header;
698 uint32_t ctp_handle;
699 uint16_t ctp_status;
700 uint16_t ctp_nphdl; /* n-port handle */
701 uint16_t ctp_cmd_cnt; /* Command DSD count */
702 uint8_t ctp_vpidx;
703 uint8_t ctp_reserved0;
704 uint16_t ctp_time;
705 uint16_t ctp_reserved1;
706 uint16_t ctp_rsp_cnt; /* Response DSD count */
707 uint16_t ctp_reserved2[5];
708 uint32_t ctp_rsp_bcnt; /* Response byte count */
709 uint32_t ctp_cmd_bcnt; /* Command byte count */
710 ispds64_t ctp_dataseg[2];
711} isp_ct_pt_t;
712
713/*
714 * MS Passthru IOCB
715 */
716typedef struct {
717 isphdr_t ms_header;
718 uint32_t ms_handle;
719 uint16_t ms_nphdl; /* handle in high byte for !2k f/w */
720 uint16_t ms_status;
721 uint16_t ms_flags;
722 uint16_t ms_reserved1; /* low 8 bits */
723 uint16_t ms_time;
724 uint16_t ms_cmd_cnt; /* Command DSD count */
725 uint16_t ms_tot_cnt; /* Total DSD Count */
726 uint8_t ms_type; /* MS type */
727 uint8_t ms_r_ctl; /* R_CTL */
728 uint16_t ms_rxid; /* RX_ID */
729 uint16_t ms_reserved2;
730 uint32_t ms_handle2;
731 uint32_t ms_rsp_bcnt; /* Response byte count */
732 uint32_t ms_cmd_bcnt; /* Command byte count */
733 ispds64_t ms_dataseg[2];
734} isp_ms_t;
735
736/*
737 * Completion Status Codes.
738 */
739#define RQCS_COMPLETE 0x0000
740#define RQCS_DMA_ERROR 0x0002
741#define RQCS_RESET_OCCURRED 0x0004
742#define RQCS_ABORTED 0x0005
743#define RQCS_TIMEOUT 0x0006
744#define RQCS_DATA_OVERRUN 0x0007
745#define RQCS_DATA_UNDERRUN 0x0015
746#define RQCS_QUEUE_FULL 0x001C
747
748/* 1X00 Only Completion Codes */
749#define RQCS_INCOMPLETE 0x0001
750#define RQCS_TRANSPORT_ERROR 0x0003
751#define RQCS_COMMAND_OVERRUN 0x0008
752#define RQCS_STATUS_OVERRUN 0x0009
753#define RQCS_BAD_MESSAGE 0x000a
754#define RQCS_NO_MESSAGE_OUT 0x000b
755#define RQCS_EXT_ID_FAILED 0x000c
756#define RQCS_IDE_MSG_FAILED 0x000d
757#define RQCS_ABORT_MSG_FAILED 0x000e
758#define RQCS_REJECT_MSG_FAILED 0x000f
759#define RQCS_NOP_MSG_FAILED 0x0010
760#define RQCS_PARITY_ERROR_MSG_FAILED 0x0011
761#define RQCS_DEVICE_RESET_MSG_FAILED 0x0012
762#define RQCS_ID_MSG_FAILED 0x0013
763#define RQCS_UNEXP_BUS_FREE 0x0014
764#define RQCS_XACT_ERR1 0x0018
765#define RQCS_XACT_ERR2 0x0019
766#define RQCS_XACT_ERR3 0x001A
767#define RQCS_BAD_ENTRY 0x001B
768#define RQCS_PHASE_SKIPPED 0x001D
769#define RQCS_ARQS_FAILED 0x001E
770#define RQCS_WIDE_FAILED 0x001F
771#define RQCS_SYNCXFER_FAILED 0x0020
772#define RQCS_LVD_BUSERR 0x0021
773
774/* 2X00 Only Completion Codes */
775#define RQCS_PORT_UNAVAILABLE 0x0028
776#define RQCS_PORT_LOGGED_OUT 0x0029
777#define RQCS_PORT_CHANGED 0x002A
778#define RQCS_PORT_BUSY 0x002B
779
780/* 24XX Only Completion Codes */
781#define RQCS_24XX_DRE 0x0011 /* data reassembly error */
782#define RQCS_24XX_TABORT 0x0013 /* aborted by target */
783#define RQCS_24XX_ENOMEM 0x002C /* f/w resource unavailable */
784#define RQCS_24XX_TMO 0x0030 /* task management overrun */
785
786
787/*
788 * 1X00 specific State Flags
789 */
790#define RQSF_GOT_BUS 0x0100
791#define RQSF_GOT_TARGET 0x0200
792#define RQSF_SENT_CDB 0x0400
793#define RQSF_XFRD_DATA 0x0800
794#define RQSF_GOT_STATUS 0x1000
795#define RQSF_GOT_SENSE 0x2000
796#define RQSF_XFER_COMPLETE 0x4000
797
798/*
799 * 2X00 specific State Flags
800 * (same as 1X00 except RQSF_GOT_BUS/RQSF_GOT_TARGET are not available)
801 */
802#define RQSF_DATA_IN 0x0020
803#define RQSF_DATA_OUT 0x0040
804#define RQSF_STAG 0x0008
805#define RQSF_OTAG 0x0004
806#define RQSF_HTAG 0x0002
807/*
808 * 1X00 Status Flags
809 */
810#define RQSTF_DISCONNECT 0x0001
811#define RQSTF_SYNCHRONOUS 0x0002
812#define RQSTF_PARITY_ERROR 0x0004
813#define RQSTF_BUS_RESET 0x0008
814#define RQSTF_DEVICE_RESET 0x0010
815#define RQSTF_ABORTED 0x0020
816#define RQSTF_TIMEOUT 0x0040
817#define RQSTF_NEGOTIATION 0x0080
818
819/*
820 * 2X00 specific state flags
821 */
822/* RQSF_SENT_CDB */
823/* RQSF_XFRD_DATA */
824/* RQSF_GOT_STATUS */
825/* RQSF_XFER_COMPLETE */
826
827/*
828 * 2X00 specific status flags
829 */
830/* RQSTF_ABORTED */
831/* RQSTF_TIMEOUT */
832#define RQSTF_DMA_ERROR 0x0080
833#define RQSTF_LOGOUT 0x2000
834
835/*
836 * Miscellaneous
837 */
838#ifndef ISP_EXEC_THROTTLE
839#define ISP_EXEC_THROTTLE 16
840#endif
841
842/*
843 * About Firmware returns an 'attribute' word in mailbox 6.
844 * These attributes are for 2200 and 2300.
845 */
846#define ISP_FW_ATTR_TMODE 0x0001
847#define ISP_FW_ATTR_SCCLUN 0x0002
848#define ISP_FW_ATTR_FABRIC 0x0004
849#define ISP_FW_ATTR_CLASS2 0x0008
850#define ISP_FW_ATTR_FCTAPE 0x0010
851#define ISP_FW_ATTR_IP 0x0020
852#define ISP_FW_ATTR_VI 0x0040
853#define ISP_FW_ATTR_VI_SOLARIS 0x0080
854#define ISP_FW_ATTR_2KLOGINS 0x0100 /* just a guess... */
855
856/* and these are for the 2400 */
857#define ISP2400_FW_ATTR_CLASS2 0x0001
858#define ISP2400_FW_ATTR_IP 0x0002
859#define ISP2400_FW_ATTR_MULTIID 0x0004
860#define ISP2400_FW_ATTR_SB2 0x0008
861#define ISP2400_FW_ATTR_T10CRC 0x0010
862#define ISP2400_FW_ATTR_VI 0x0020
863#define ISP2400_FW_ATTR_MQ 0x0040
864#define ISP2400_FW_ATTR_MSIX 0x0080
865#define ISP2400_FW_ATTR_FCOE 0x0800
866#define ISP2400_FW_ATTR_VP0 0x1000
867#define ISP2400_FW_ATTR_EXPFW 0x2000
868#define ISP2400_FW_ATTR_HOTFW 0x4000
869#define ISP2400_FW_ATTR_EXTNDED 0x8000
870#define ISP2400_FW_ATTR_EXTVP 0x00010000
871#define ISP2400_FW_ATTR_VN2VN 0x00040000
872#define ISP2400_FW_ATTR_EXMOFF 0x00080000
873#define ISP2400_FW_ATTR_NPMOFF 0x00100000
874#define ISP2400_FW_ATTR_DIFCHOP 0x00400000
875#define ISP2400_FW_ATTR_SRIOV 0x02000000
876#define ISP2400_FW_ATTR_ASICTMP 0x0200000000
877#define ISP2400_FW_ATTR_ATIOMQ 0x0400000000
878
879/*
880 * These are either manifestly true or are dependent on f/w attributes
881 */
882#define ISP_CAP_TMODE(isp) \
883 (IS_24XX(isp)? 1 : (isp->isp_fwattr & ISP_FW_ATTR_TMODE))
884#define ISP_CAP_SCCFW(isp) \
885 (IS_24XX(isp)? 1 : (isp->isp_fwattr & ISP_FW_ATTR_SCCLUN))
886#define ISP_CAP_2KLOGIN(isp) \
887 (IS_24XX(isp)? 1 : (isp->isp_fwattr & ISP_FW_ATTR_2KLOGINS))
888
889/*
890 * This is only true for 24XX cards with this f/w attribute
891 */
892#define ISP_CAP_MULTI_ID(isp) \
893 (IS_24XX(isp)? (isp->isp_fwattr & ISP2400_FW_ATTR_MULTIID) : 0)
894#define ISP_GET_VPIDX(isp, tag) \
895 (ISP_CAP_MULTI_ID(isp) ? tag : 0)
896#define ISP_CAP_VP0(isp) \
897 (IS_24XX(isp)? (isp->isp_fwattr & ISP2400_FW_ATTR_VP0) : 0)
898
899/*
900 * This is true manifestly or is dependent on a f/w attribute
901 * but may or may not actually be *enabled*. In any case, it
902 * is enabled on a per-channel basis.
903 */
904#define ISP_CAP_FCTAPE(isp) \
905 (IS_24XX(isp)? 1 : (isp->isp_fwattr & ISP_FW_ATTR_FCTAPE))
906
907#define ISP_FCTAPE_ENABLED(isp, chan) \
908 (IS_24XX(isp)? (FCPARAM(isp, chan)->isp_xfwoptions & ICB2400_OPT2_FCTAPE) != 0 : (FCPARAM(isp, chan)->isp_xfwoptions & ICBXOPT_FCTAPE) != 0)
909
910/*
911 * Reduced Interrupt Operation Response Queue Entries
912 */
913
914typedef struct {
915 isphdr_t req_header;
916 uint32_t req_handles[15];
917} isp_rio1_t;
918
919typedef struct {
920 isphdr_t req_header;
921 uint16_t req_handles[30];
922} isp_rio2_t;
923
924/*
925 * FC (ISP2100/ISP2200/ISP2300/ISP2400) specific data structures
926 */
927
928/*
929 * Initialization Control Block
930 *
931 * Version One (prime) format.
932 */
933typedef struct {
934 uint8_t icb_version;
935 uint8_t icb_reserved0;
936 uint16_t icb_fwoptions;
937 uint16_t icb_maxfrmlen;
938 uint16_t icb_maxalloc;
939 uint16_t icb_execthrottle;
940 uint8_t icb_retry_count;
941 uint8_t icb_retry_delay;
942 uint8_t icb_portname[8];
943 uint16_t icb_hardaddr;
944 uint8_t icb_iqdevtype;
945 uint8_t icb_logintime;
946 uint8_t icb_nodename[8];
947 uint16_t icb_rqstout;
948 uint16_t icb_rspnsin;
949 uint16_t icb_rqstqlen;
950 uint16_t icb_rsltqlen;
951 uint16_t icb_rqstaddr[4];
952 uint16_t icb_respaddr[4];
953 uint16_t icb_lunenables;
954 uint8_t icb_ccnt;
955 uint8_t icb_icnt;
956 uint16_t icb_lunetimeout;
957 uint16_t icb_reserved1;
958 uint16_t icb_xfwoptions;
959 uint8_t icb_racctimer;
960 uint8_t icb_idelaytimer;
961 uint16_t icb_zfwoptions;
962 uint16_t icb_reserved2[13];
963} isp_icb_t;
964
965#define ICB_VERSION1 1
966
967#define ICBOPT_EXTENDED 0x8000
968#define ICBOPT_BOTH_WWNS 0x4000
969#define ICBOPT_FULL_LOGIN 0x2000
970#define ICBOPT_STOP_ON_QFULL 0x1000 /* 2200/2100 only */
971#define ICBOPT_PREV_ADDRESS 0x0800
972#define ICBOPT_SRCHDOWN 0x0400
973#define ICBOPT_NOLIP 0x0200
974#define ICBOPT_PDBCHANGE_AE 0x0100
975#define ICBOPT_TGT_TYPE 0x0080
976#define ICBOPT_INI_ADISC 0x0040
977#define ICBOPT_INI_DISABLE 0x0020
978#define ICBOPT_TGT_ENABLE 0x0010
979#define ICBOPT_FAST_POST 0x0008
980#define ICBOPT_FULL_DUPLEX 0x0004
981#define ICBOPT_FAIRNESS 0x0002
982#define ICBOPT_HARD_ADDRESS 0x0001
983
984#define ICBXOPT_NO_LOGOUT 0x8000 /* no logout on link failure */
985#define ICBXOPT_FCTAPE_CCQ 0x4000 /* FC-Tape Command Queueing */
986#define ICBXOPT_FCTAPE_CONFIRM 0x2000
987#define ICBXOPT_FCTAPE 0x1000
988#define ICBXOPT_CLASS2_ACK0 0x0200
989#define ICBXOPT_CLASS2 0x0100
990#define ICBXOPT_NO_PLAY 0x0080 /* don't play if can't get hard addr */
991#define ICBXOPT_TOPO_MASK 0x0070
992#define ICBXOPT_LOOP_ONLY 0x0000
993#define ICBXOPT_PTP_ONLY 0x0010
994#define ICBXOPT_LOOP_2_PTP 0x0020
995#define ICBXOPT_PTP_2_LOOP 0x0030
996/*
997 * The lower 4 bits of the xfwoptions field are the OPERATION MODE bits.
998 * RIO is not defined for the 23XX cards (just 2200)
999 */
1000#define ICBXOPT_RIO_OFF 0
1001#define ICBXOPT_RIO_16BIT 1
1002#define ICBXOPT_RIO_32BIT 2
1003#define ICBXOPT_RIO_16BIT_IOCB 3
1004#define ICBXOPT_RIO_32BIT_IOCB 4
1005#define ICBXOPT_ZIO 5
1006#define ICBXOPT_TIMER_MASK 0x7
1007
1008#define ICBZOPT_RATE_MASK 0xC000
1009#define ICBZOPT_RATE_ONEGB 0x0000
1010#define ICBZOPT_RATE_AUTO 0x8000
1011#define ICBZOPT_RATE_TWOGB 0x4000
1012#define ICBZOPT_50_OHM 0x2000
1013#define ICBZOPT_ENA_OOF 0x0040 /* out of order frame handling */
1014#define ICBZOPT_RSPSZ_MASK 0x0030
1015#define ICBZOPT_RSPSZ_24 0x0000
1016#define ICBZOPT_RSPSZ_12 0x0010
1017#define ICBZOPT_RSPSZ_24A 0x0020
1018#define ICBZOPT_RSPSZ_32 0x0030
1019#define ICBZOPT_SOFTID 0x0002
1020#define ICBZOPT_ENA_RDXFR_RDY 0x0001
1021
1022/* 2400 F/W options */
1023#define ICB2400_OPT1_BOTH_WWNS 0x00004000
1024#define ICB2400_OPT1_FULL_LOGIN 0x00002000
1025#define ICB2400_OPT1_PREV_ADDRESS 0x00000800
1026#define ICB2400_OPT1_SRCHDOWN 0x00000400
1027#define ICB2400_OPT1_NOLIP 0x00000200
1028#define ICB2400_OPT1_INI_DISABLE 0x00000020
1029#define ICB2400_OPT1_TGT_ENABLE 0x00000010
1030#define ICB2400_OPT1_FULL_DUPLEX 0x00000004
1031#define ICB2400_OPT1_FAIRNESS 0x00000002
1032#define ICB2400_OPT1_HARD_ADDRESS 0x00000001
1033
1034#define ICB2400_OPT2_ENA_ATIOMQ 0x08000000
1035#define ICB2400_OPT2_ENA_IHA 0x04000000
1036#define ICB2400_OPT2_QOS 0x02000000
1037#define ICB2400_OPT2_IOCBS 0x01000000
1038#define ICB2400_OPT2_ENA_IHR 0x00400000
1039#define ICB2400_OPT2_ENA_VMS 0x00200000
1040#define ICB2400_OPT2_ENA_TA 0x00100000
1041#define ICB2400_OPT2_TPRLIC 0x00004000
1042#define ICB2400_OPT2_FCTAPE 0x00001000
1043#define ICB2400_OPT2_FCSP 0x00000800
1044#define ICB2400_OPT2_CLASS2_ACK0 0x00000200
1045#define ICB2400_OPT2_CLASS2 0x00000100
1046#define ICB2400_OPT2_NO_PLAY 0x00000080
1047#define ICB2400_OPT2_TOPO_MASK 0x00000070
1048#define ICB2400_OPT2_LOOP_ONLY 0x00000000
1049#define ICB2400_OPT2_PTP_ONLY 0x00000010
1050#define ICB2400_OPT2_LOOP_2_PTP 0x00000020
1051#define ICB2400_OPT2_TIMER_MASK 0x0000000f
1052#define ICB2400_OPT2_ZIO 0x00000005
1053#define ICB2400_OPT2_ZIO1 0x00000006
1054
1055#define ICB2400_OPT3_NO_CTXDIS 0x40000000
1056#define ICB2400_OPT3_ENA_ETH_RESP 0x08000000
1057#define ICB2400_OPT3_ENA_ETH_ATIO 0x04000000
1058#define ICB2400_OPT3_ENA_MFCF 0x00020000
1059#define ICB2400_OPT3_SKIP_FOURGB 0x00010000
1060#define ICB2400_OPT3_RATE_MASK 0x0000E000
1061#define ICB2400_OPT3_RATE_ONEGB 0x00000000
1062#define ICB2400_OPT3_RATE_TWOGB 0x00002000
1063#define ICB2400_OPT3_RATE_AUTO 0x00004000
1064#define ICB2400_OPT3_RATE_FOURGB 0x00006000
1065#define ICB2400_OPT3_RATE_EIGHTGB 0x00008000
1066#define ICB2400_OPT3_RATE_SIXTEENGB 0x0000A000
1067#define ICB2400_OPT3_ENA_OOF_XFRDY 0x00000200
1068#define ICB2400_OPT3_NO_N2N_LOGI 0x00000100
1069#define ICB2400_OPT3_NO_LOCAL_PLOGI 0x00000080
1070#define ICB2400_OPT3_ENA_OOF 0x00000040
1071/* note that a response size flag of zero is reserved! */
1072#define ICB2400_OPT3_RSPSZ_MASK 0x00000030
1073#define ICB2400_OPT3_RSPSZ_12 0x00000010
1074#define ICB2400_OPT3_RSPSZ_24 0x00000020
1075#define ICB2400_OPT3_RSPSZ_32 0x00000030
1076#define ICB2400_OPT3_SOFTID 0x00000002
1077
1078#define ICB_MIN_FRMLEN 256
1079#define ICB_MAX_FRMLEN 2112
1080#define ICB_DFLT_FRMLEN 1024
1081#define ICB_DFLT_ALLOC 256
1082#define ICB_DFLT_THROTTLE 16
1083#define ICB_DFLT_RDELAY 5
1084#define ICB_DFLT_RCOUNT 3
1085
1086#define ICB_LOGIN_TOV 30
1087#define ICB_LUN_ENABLE_TOV 15
1088
1089
1090/*
1091 * And somebody at QLogic had a great idea that you could just change
1092 * the structure *and* keep the version number the same as the other cards.
1093 */
1094typedef struct {
1095 uint16_t icb_version;
1096 uint16_t icb_reserved0;
1097 uint16_t icb_maxfrmlen;
1098 uint16_t icb_execthrottle;
1099 uint16_t icb_xchgcnt;
1100 uint16_t icb_hardaddr;
1101 uint8_t icb_portname[8];
1102 uint8_t icb_nodename[8];
1103 uint16_t icb_rspnsin;
1104 uint16_t icb_rqstout;
1105 uint16_t icb_retry_count;
1106 uint16_t icb_priout;
1107 uint16_t icb_rsltqlen;
1108 uint16_t icb_rqstqlen;
1109 uint16_t icb_ldn_nols;
1110 uint16_t icb_prqstqlen;
1111 uint16_t icb_rqstaddr[4];
1112 uint16_t icb_respaddr[4];
1113 uint16_t icb_priaddr[4];
1114 uint16_t icb_msixresp;
1115 uint16_t icb_msixatio;
1116 uint16_t icb_reserved1[2];
1117 uint16_t icb_atio_in;
1118 uint16_t icb_atioqlen;
1119 uint16_t icb_atioqaddr[4];
1120 uint16_t icb_idelaytimer;
1121 uint16_t icb_logintime;
1122 uint32_t icb_fwoptions1;
1123 uint32_t icb_fwoptions2;
1124 uint32_t icb_fwoptions3;
1125 uint16_t icb_qos;
1126 uint16_t icb_reserved2[3];
1127 uint16_t icb_enodemac[3];
1128 uint16_t icb_disctime;
1129 uint16_t icb_reserved3[4];
1130} isp_icb_2400_t;
1131
1132#define RQRSP_ADDR0015 0
1133#define RQRSP_ADDR1631 1
1134#define RQRSP_ADDR3247 2
1135#define RQRSP_ADDR4863 3
1136
1137
1138#define ICB_NNM0 7
1139#define ICB_NNM1 6
1140#define ICB_NNM2 5
1141#define ICB_NNM3 4
1142#define ICB_NNM4 3
1143#define ICB_NNM5 2
1144#define ICB_NNM6 1
1145#define ICB_NNM7 0
1146
1147#define MAKE_NODE_NAME_FROM_WWN(array, wwn) \
1148 array[ICB_NNM0] = (uint8_t) ((wwn >> 0) & 0xff), \
1149 array[ICB_NNM1] = (uint8_t) ((wwn >> 8) & 0xff), \
1150 array[ICB_NNM2] = (uint8_t) ((wwn >> 16) & 0xff), \
1151 array[ICB_NNM3] = (uint8_t) ((wwn >> 24) & 0xff), \
1152 array[ICB_NNM4] = (uint8_t) ((wwn >> 32) & 0xff), \
1153 array[ICB_NNM5] = (uint8_t) ((wwn >> 40) & 0xff), \
1154 array[ICB_NNM6] = (uint8_t) ((wwn >> 48) & 0xff), \
1155 array[ICB_NNM7] = (uint8_t) ((wwn >> 56) & 0xff)
1156
1157#define MAKE_WWN_FROM_NODE_NAME(wwn, array) \
1158 wwn = ((uint64_t) array[ICB_NNM0]) | \
1159 ((uint64_t) array[ICB_NNM1] << 8) | \
1160 ((uint64_t) array[ICB_NNM2] << 16) | \
1161 ((uint64_t) array[ICB_NNM3] << 24) | \
1162 ((uint64_t) array[ICB_NNM4] << 32) | \
1163 ((uint64_t) array[ICB_NNM5] << 40) | \
1164 ((uint64_t) array[ICB_NNM6] << 48) | \
1165 ((uint64_t) array[ICB_NNM7] << 56)
1166
1167
1168/*
1169 * For MULTI_ID firmware, this describes a
1170 * virtual port entity for getting status.
1171 */
1172typedef struct {
1173 uint16_t vp_port_status;
1174 uint8_t vp_port_options;
1175 uint8_t vp_port_loopid;
1176 uint8_t vp_port_portname[8];
1177 uint8_t vp_port_nodename[8];
1178 uint16_t vp_port_portid_lo; /* not present when trailing icb */
1179 uint16_t vp_port_portid_hi; /* not present when trailing icb */
1180} vp_port_info_t;
1181
1182#define ICB2400_VPOPT_ENA_SNSLOGIN 0x00000040 /* Enable SNS Login and SCR for Virtual Ports */
1183#define ICB2400_VPOPT_TGT_DISABLE 0x00000020 /* Target Mode Disabled */
1184#define ICB2400_VPOPT_INI_ENABLE 0x00000010 /* Initiator Mode Enabled */
1185#define ICB2400_VPOPT_ENABLED 0x00000008 /* VP Enabled */
1186#define ICB2400_VPOPT_NOPLAY 0x00000004 /* ID Not Acquired */
1187#define ICB2400_VPOPT_PREV_ADDRESS 0x00000002 /* Previously Assigned ID */
1188#define ICB2400_VPOPT_HARD_ADDRESS 0x00000001 /* Hard Assigned ID */
1189
1190#define ICB2400_VPOPT_WRITE_SIZE 20
1191
1192/*
1193 * For MULTI_ID firmware, we append this structure
1194 * to the isp_icb_2400_t above, followed by a list
1195 * structures that are *most* of the vp_port_info_t.
1196 */
1197typedef struct {
1198 uint16_t vp_count;
1199 uint16_t vp_global_options;
1200} isp_icb_2400_vpinfo_t;
1201
1202#define ICB2400_VPINFO_OFF 0x80 /* offset from start of ICB */
1203#define ICB2400_VPINFO_PORT_OFF(chan) \
1204 (ICB2400_VPINFO_OFF + \
1205 sizeof (isp_icb_2400_vpinfo_t) + (chan * ICB2400_VPOPT_WRITE_SIZE))
1206
1207#define ICB2400_VPGOPT_FCA 0x01 /* Assume Clean Address bit in FLOGI ACC set (works only in static configurations) */
1208#define ICB2400_VPGOPT_MID_DISABLE 0x02 /* when set, connection mode2 will work with NPIV-capable switched */
1209#define ICB2400_VPGOPT_VP0_DECOUPLE 0x04 /* Allow VP0 decoupling if firmware supports it */
1210#define ICB2400_VPGOPT_SUSP_FDISK 0x10 /* Suspend FDISC for Enabled VPs */
1211#define ICB2400_VPGOPT_GEN_RIDA 0x20 /* Generate RIDA if FLOGI Fails */
1212
1213typedef struct {
1214 isphdr_t vp_ctrl_hdr;
1215 uint32_t vp_ctrl_handle;
1216 uint16_t vp_ctrl_index_fail;
1217 uint16_t vp_ctrl_status;
1218 uint16_t vp_ctrl_command;
1219 uint16_t vp_ctrl_vp_count;
1220 uint16_t vp_ctrl_idmap[16];
1221 uint16_t vp_ctrl_reserved[7];
1222 uint16_t vp_ctrl_fcf_index;
1223} vp_ctrl_info_t;
1224
1225#define VP_CTRL_CMD_ENABLE_VP 0x00
1226#define VP_CTRL_CMD_DISABLE_VP 0x08
1227#define VP_CTRL_CMD_DISABLE_VP_REINIT_LINK 0x09
1228#define VP_CTRL_CMD_DISABLE_VP_LOGO 0x0A
1229#define VP_CTRL_CMD_DISABLE_VP_LOGO_ALL 0x0B
1230
1231/*
1232 * We can use this structure for modifying either one or two VP ports after initialization
1233 */
1234typedef struct {
1235 isphdr_t vp_mod_hdr;
1236 uint32_t vp_mod_hdl;
1237 uint16_t vp_mod_reserved0;
1238 uint16_t vp_mod_status;
1239 uint8_t vp_mod_cmd;
1240 uint8_t vp_mod_cnt;
1241 uint8_t vp_mod_idx0;
1242 uint8_t vp_mod_idx1;
1243 struct {
1244 uint8_t options;
1245 uint8_t loopid;
1246 uint16_t reserved1;
1247 uint8_t wwpn[8];
1248 uint8_t wwnn[8];
1249 } vp_mod_ports[2];
1250 uint8_t vp_mod_reserved2[8];
1251} vp_modify_t;
1252
1253#define VP_STS_OK 0x00
1254#define VP_STS_ERR 0x01
1255#define VP_CNT_ERR 0x02
1256#define VP_GEN_ERR 0x03
1257#define VP_IDX_ERR 0x04
1258#define VP_STS_BSY 0x05
1259
1260#define VP_MODIFY 0x00
1261#define VP_MODIFY_ENA 0x01
1262#define VP_MODIFY_OPT 0x02
1263#define VP_RESUME 0x03
1264
1265/*
1266 * Port Data Base Element
1267 */
1268
1269typedef struct {
1270 uint16_t pdb_options;
1271 uint8_t pdb_mstate;
1272 uint8_t pdb_sstate;
1273 uint8_t pdb_hardaddr_bits[4];
1274 uint8_t pdb_portid_bits[4];
1275 uint8_t pdb_nodename[8];
1276 uint8_t pdb_portname[8];
1277 uint16_t pdb_execthrottle;
1278 uint16_t pdb_exec_count;
1279 uint8_t pdb_retry_count;
1280 uint8_t pdb_retry_delay;
1281 uint16_t pdb_resalloc;
1282 uint16_t pdb_curalloc;
1283 uint16_t pdb_qhead;
1284 uint16_t pdb_qtail;
1285 uint16_t pdb_tl_next;
1286 uint16_t pdb_tl_last;
1287 uint16_t pdb_features; /* PLOGI, Common Service */
1288 uint16_t pdb_pconcurrnt; /* PLOGI, Common Service */
1289 uint16_t pdb_roi; /* PLOGI, Common Service */
1290 uint8_t pdb_target;
1291 uint8_t pdb_initiator; /* PLOGI, Class 3 Control Flags */
1292 uint16_t pdb_rdsiz; /* PLOGI, Class 3 */
1293 uint16_t pdb_ncseq; /* PLOGI, Class 3 */
1294 uint16_t pdb_noseq; /* PLOGI, Class 3 */
1295 uint16_t pdb_labrtflg;
1296 uint16_t pdb_lstopflg;
1297 uint16_t pdb_sqhead;
1298 uint16_t pdb_sqtail;
1299 uint16_t pdb_ptimer;
1300 uint16_t pdb_nxt_seqid;
1301 uint16_t pdb_fcount;
1302 uint16_t pdb_prli_len;
1303 uint16_t pdb_prli_svc0;
1304 uint16_t pdb_prli_svc3;
1305 uint16_t pdb_loopid;
1306 uint16_t pdb_il_ptr;
1307 uint16_t pdb_sl_ptr;
1308} isp_pdb_21xx_t;
1309
1310#define PDB_OPTIONS_XMITTING (1<<11)
1311#define PDB_OPTIONS_LNKXMIT (1<<10)
1312#define PDB_OPTIONS_ABORTED (1<<9)
1313#define PDB_OPTIONS_ADISC (1<<1)
1314
1315#define PDB_STATE_DISCOVERY 0
1316#define PDB_STATE_WDISC_ACK 1
1317#define PDB_STATE_PLOGI 2
1318#define PDB_STATE_PLOGI_ACK 3
1319#define PDB_STATE_PRLI 4
1320#define PDB_STATE_PRLI_ACK 5
1321#define PDB_STATE_LOGGED_IN 6
1322#define PDB_STATE_PORT_UNAVAIL 7
1323#define PDB_STATE_PRLO 8
1324#define PDB_STATE_PRLO_ACK 9
1325#define PDB_STATE_PLOGO 10
1326#define PDB_STATE_PLOG_ACK 11
1327
1328#define SVC3_ROLE_MASK 0x30
1329#define SVC3_ROLE_SHIFT 4
1330
1331#define BITS2WORD(x) ((x)[0] << 16 | (x)[3] << 8 | (x)[2])
1332#define BITS2WORD_24XX(x) ((x)[0] << 16 | (x)[1] << 8 | (x)[2])
1333
1334/*
1335 * Port Data Base Element- 24XX cards
1336 */
1337typedef struct {
1338 uint16_t pdb_flags;
1339 uint8_t pdb_curstate;
1340 uint8_t pdb_laststate;
1341 uint8_t pdb_hardaddr_bits[4];
1342 uint8_t pdb_portid_bits[4];
1343#define pdb_nxt_seqid_2400 pdb_portid_bits[3]
1344 uint16_t pdb_retry_timer;
1345 uint16_t pdb_handle;
1346 uint16_t pdb_rcv_dsize;
1347 uint16_t pdb_reserved0;
1348 uint16_t pdb_prli_svc0;
1349 uint16_t pdb_prli_svc3;
1350 uint8_t pdb_portname[8];
1351 uint8_t pdb_nodename[8];
1352 uint8_t pdb_reserved1[24];
1353} isp_pdb_24xx_t;
1354
1355#define PDB2400_TID_SUPPORTED 0x4000
1356#define PDB2400_FC_TAPE 0x0080
1357#define PDB2400_CLASS2_ACK0 0x0040
1358#define PDB2400_FCP_CONF 0x0020
1359#define PDB2400_CLASS2 0x0010
1360#define PDB2400_ADDR_VALID 0x0002
1361
1362#define PDB2400_STATE_PLOGI_PEND 0x03
1363#define PDB2400_STATE_PLOGI_DONE 0x04
1364#define PDB2400_STATE_PRLI_PEND 0x05
1365#define PDB2400_STATE_LOGGED_IN 0x06
1366#define PDB2400_STATE_PORT_UNAVAIL 0x07
1367#define PDB2400_STATE_PRLO_PEND 0x09
1368#define PDB2400_STATE_LOGO_PEND 0x0B
1369
1370/*
1371 * Common elements from the above two structures that are actually useful to us.
1372 */
1373typedef struct {
1374 uint16_t handle;
1375 uint16_t prli_word3;
1376 uint32_t : 8,
1377 portid : 24;
1378 uint8_t portname[8];
1379 uint8_t nodename[8];
1380} isp_pdb_t;
1381
1382/*
1383 * Port/Node Name List Element
1384 */
1385typedef struct {
1386 uint8_t pnnle_name[8];
1387 uint16_t pnnle_handle;
1388 uint16_t pnnle_reserved;
1389} isp_pnnle_t;
1390
1391#define PNNL_OPTIONS_NODE_NAMES (1<<0)
1392#define PNNL_OPTIONS_PORT_DATA (1<<2)
1393#define PNNL_OPTIONS_INITIATORS (1<<3)
1394
1395/*
1396 * Port and N-Port Handle List Element
1397 */
1398typedef struct {
1399 uint16_t pnhle_port_id_lo;
1400 uint16_t pnhle_port_id_hi_handle;
1401} isp_pnhle_21xx_t;
1402
1403typedef struct {
1404 uint16_t pnhle_port_id_lo;
1405 uint16_t pnhle_port_id_hi;
1406 uint16_t pnhle_handle;
1407} isp_pnhle_23xx_t;
1408
1409typedef struct {
1410 uint16_t pnhle_port_id_lo;
1411 uint16_t pnhle_port_id_hi;
1412 uint16_t pnhle_handle;
1413 uint16_t pnhle_reserved;
1414} isp_pnhle_24xx_t;
1415
1416/*
1417 * Port Database Changed Async Event information for 24XX cards
1418 */
1419#define PDB24XX_AE_OK 0x00
1420#define PDB24XX_AE_IMPL_LOGO_1 0x01
1421#define PDB24XX_AE_IMPL_LOGO_2 0x02
1422#define PDB24XX_AE_IMPL_LOGO_3 0x03
1423#define PDB24XX_AE_PLOGI_RCVD 0x04
1424#define PDB24XX_AE_PLOGI_RJT 0x05
1425#define PDB24XX_AE_PRLI_RCVD 0x06
1426#define PDB24XX_AE_PRLI_RJT 0x07
1427#define PDB24XX_AE_TPRLO 0x08
1428#define PDB24XX_AE_TPRLO_RJT 0x09
1429#define PDB24XX_AE_PRLO_RCVD 0x0a
1430#define PDB24XX_AE_LOGO_RCVD 0x0b
1431#define PDB24XX_AE_TOPO_CHG 0x0c
1432#define PDB24XX_AE_NPORT_CHG 0x0d
1433#define PDB24XX_AE_FLOGI_RJT 0x0e
1434#define PDB24XX_AE_BAD_FANN 0x0f
1435#define PDB24XX_AE_FLOGI_TIMO 0x10
1436#define PDB24XX_AE_ABX_LOGO 0x11
1437#define PDB24XX_AE_PLOGI_DONE 0x12
1438#define PDB24XX_AE_PRLI_DONJE 0x13
1439#define PDB24XX_AE_OPN_1 0x14
1440#define PDB24XX_AE_OPN_2 0x15
1441#define PDB24XX_AE_TXERR 0x16
1442#define PDB24XX_AE_FORCED_LOGO 0x17
1443#define PDB24XX_AE_DISC_TIMO 0x18
1444
1445/*
1446 * Genericized Port Login/Logout software structure
1447 */
1448typedef struct {
1449 uint16_t handle;
1450 uint16_t channel;
1451 uint32_t
1452 flags : 8,
1453 portid : 24;
1454} isp_plcmd_t;
1455/* the flags to use are those for PLOGX_FLG_* below */
1456
1457/*
1458 * ISP24XX- Login/Logout Port IOCB
1459 */
1460typedef struct {
1461 isphdr_t plogx_header;
1462 uint32_t plogx_handle;
1463 uint16_t plogx_status;
1464 uint16_t plogx_nphdl;
1465 uint16_t plogx_flags;
1466 uint16_t plogx_vphdl; /* low 8 bits */
1467 uint16_t plogx_portlo; /* low 16 bits */
1468 uint16_t plogx_rspsz_porthi;
1469 struct {
1470 uint16_t lo16;
1471 uint16_t hi16;
1472 } plogx_ioparm[11];
1473} isp_plogx_t;
1474
1475#define PLOGX_STATUS_OK 0x00
1476#define PLOGX_STATUS_UNAVAIL 0x28
1477#define PLOGX_STATUS_LOGOUT 0x29
1478#define PLOGX_STATUS_IOCBERR 0x31
1479
1480#define PLOGX_IOCBERR_NOLINK 0x01
1481#define PLOGX_IOCBERR_NOIOCB 0x02
1482#define PLOGX_IOCBERR_NOXGHG 0x03
1483#define PLOGX_IOCBERR_FAILED 0x04 /* further info in IOPARM 1 */
1484#define PLOGX_IOCBERR_NOFABRIC 0x05
1485#define PLOGX_IOCBERR_NOTREADY 0x07
1486#define PLOGX_IOCBERR_NOLOGIN 0x09 /* further info in IOPARM 1 */
1487#define PLOGX_IOCBERR_NOPCB 0x0a
1488#define PLOGX_IOCBERR_REJECT 0x18 /* further info in IOPARM 1 */
1489#define PLOGX_IOCBERR_EINVAL 0x19 /* further info in IOPARM 1 */
1490#define PLOGX_IOCBERR_PORTUSED 0x1a /* further info in IOPARM 1 */
1491#define PLOGX_IOCBERR_HNDLUSED 0x1b /* further info in IOPARM 1 */
1492#define PLOGX_IOCBERR_NOHANDLE 0x1c
1493#define PLOGX_IOCBERR_NOFLOGI 0x1f /* further info in IOPARM 1 */
1494
1495#define PLOGX_FLG_CMD_MASK 0xf
1496#define PLOGX_FLG_CMD_PLOGI 0
1497#define PLOGX_FLG_CMD_PRLI 1
1498#define PLOGX_FLG_CMD_PDISC 2
1499#define PLOGX_FLG_CMD_LOGO 8
1500#define PLOGX_FLG_CMD_PRLO 9
1501#define PLOGX_FLG_CMD_TPRLO 10
1502
1503#define PLOGX_FLG_COND_PLOGI 0x10 /* if with PLOGI */
1504#define PLOGX_FLG_IMPLICIT 0x10 /* if with LOGO, PRLO, TPRLO */
1505#define PLOGX_FLG_SKIP_PRLI 0x20 /* if with PLOGI */
1506#define PLOGX_FLG_IMPLICIT_LOGO_ALL 0x20 /* if with LOGO */
1507#define PLOGX_FLG_EXPLICIT_LOGO 0x40 /* if with LOGO */
1508#define PLOGX_FLG_COMMON_FEATURES 0x80 /* if with PLOGI */
1509#define PLOGX_FLG_FREE_NPHDL 0x80 /* if with with LOGO */
1510
1511#define PLOGX_FLG_CLASS2 0x100 /* if with PLOGI */
1512#define PLOGX_FLG_FCP2_OVERRIDE 0x200 /* if with PRLOG, PRLI */
1513
1514/*
1515 * Report ID Acquisistion (24XX multi-id firmware)
1516 */
1517typedef struct {
1518 isphdr_t ridacq_hdr;
1519 uint32_t ridacq_handle;
1520 uint8_t ridacq_vp_acquired;
1521 uint8_t ridacq_vp_setup;
1522 uint8_t ridacq_vp_index;
1523 uint8_t ridacq_vp_status;
1524 uint16_t ridacq_vp_port_lo;
1525 uint8_t ridacq_vp_port_hi;
1526 uint8_t ridacq_format; /* 0 or 1 */
1527 uint16_t ridacq_map[8];
1528 uint8_t ridacq_reserved1[32];
1529} isp_ridacq_t;
1530
1531#define RIDACQ_STS_COMPLETE 0
1532#define RIDACQ_STS_UNACQUIRED 1
1533#define RIDACQ_STS_CHANGED 2
1534#define RIDACQ_STS_SNS_TIMEOUT 3
1535#define RIDACQ_STS_SNS_REJECTED 4
1536#define RIDACQ_STS_SCR_TIMEOUT 5
1537#define RIDACQ_STS_SCR_REJECTED 6
1538
1539/*
1540 * Simple Name Server Data Structures
1541 */
1542#define SNS_GA_NXT 0x100
1543#define SNS_GPN_ID 0x112
1544#define SNS_GNN_ID 0x113
1545#define SNS_GFF_ID 0x11F
1546#define SNS_GID_FT 0x171
1547#define SNS_RFT_ID 0x217
1548#define SNS_RFF_ID 0x21F
1549typedef struct {
1550 uint16_t snscb_rblen; /* response buffer length (words) */
1551 uint16_t snscb_reserved0;
1552 uint16_t snscb_addr[4]; /* response buffer address */
1553 uint16_t snscb_sblen; /* subcommand buffer length (words) */
1554 uint16_t snscb_reserved1;
1555 uint16_t snscb_data[]; /* variable data */
1556} sns_screq_t; /* Subcommand Request Structure */
1557
1558typedef struct {
1559 uint16_t snscb_rblen; /* response buffer length (words) */
1560 uint16_t snscb_reserved0;
1561 uint16_t snscb_addr[4]; /* response buffer address */
1562 uint16_t snscb_sblen; /* subcommand buffer length (words) */
1563 uint16_t snscb_reserved1;
1564 uint16_t snscb_cmd;
1565 uint16_t snscb_reserved2;
1566 uint32_t snscb_reserved3;
1567 uint32_t snscb_port;
1568} sns_ga_nxt_req_t;
1569#define SNS_GA_NXT_REQ_SIZE (sizeof (sns_ga_nxt_req_t))
1570
1571typedef struct {
1572 uint16_t snscb_rblen; /* response buffer length (words) */
1573 uint16_t snscb_reserved0;
1574 uint16_t snscb_addr[4]; /* response buffer address */
1575 uint16_t snscb_sblen; /* subcommand buffer length (words) */
1576 uint16_t snscb_reserved1;
1577 uint16_t snscb_cmd;
1578 uint16_t snscb_reserved2;
1579 uint32_t snscb_reserved3;
1580 uint32_t snscb_portid;
1581} sns_gxn_id_req_t;
1582#define SNS_GXN_ID_REQ_SIZE (sizeof (sns_gxn_id_req_t))
1583
1584typedef struct {
1585 uint16_t snscb_rblen; /* response buffer length (words) */
1586 uint16_t snscb_reserved0;
1587 uint16_t snscb_addr[4]; /* response buffer address */
1588 uint16_t snscb_sblen; /* subcommand buffer length (words) */
1589 uint16_t snscb_reserved1;
1590 uint16_t snscb_cmd;
1591 uint16_t snscb_mword_div_2;
1592 uint32_t snscb_reserved3;
1593 uint32_t snscb_fc4_type;
1594} sns_gid_ft_req_t;
1595#define SNS_GID_FT_REQ_SIZE (sizeof (sns_gid_ft_req_t))
1596
1597typedef struct {
1598 uint16_t snscb_rblen; /* response buffer length (words) */
1599 uint16_t snscb_reserved0;
1600 uint16_t snscb_addr[4]; /* response buffer address */
1601 uint16_t snscb_sblen; /* subcommand buffer length (words) */
1602 uint16_t snscb_reserved1;
1603 uint16_t snscb_cmd;
1604 uint16_t snscb_reserved2;
1605 uint32_t snscb_reserved3;
1606 uint32_t snscb_port;
1607 uint32_t snscb_fc4_types[8];
1608} sns_rft_id_req_t;
1609#define SNS_RFT_ID_REQ_SIZE (sizeof (sns_rft_id_req_t))
1610
1611typedef struct {
1612 ct_hdr_t snscb_cthdr;
1613 uint8_t snscb_port_type;
1614 uint8_t snscb_port_id[3];
1615 uint8_t snscb_portname[8];
1616 uint16_t snscb_data[]; /* variable data */
1617} sns_scrsp_t; /* Subcommand Response Structure */
1618
1619typedef struct {
1620 ct_hdr_t snscb_cthdr;
1621 uint8_t snscb_port_type;
1622 uint8_t snscb_port_id[3];
1623 uint8_t snscb_portname[8];
1624 uint8_t snscb_pnlen; /* symbolic port name length */
1625 uint8_t snscb_pname[255]; /* symbolic port name */
1626 uint8_t snscb_nodename[8];
1627 uint8_t snscb_nnlen; /* symbolic node name length */
1628 uint8_t snscb_nname[255]; /* symbolic node name */
1629 uint8_t snscb_ipassoc[8];
1630 uint8_t snscb_ipaddr[16];
1631 uint8_t snscb_svc_class[4];
1632 uint8_t snscb_fc4_types[32];
1633 uint8_t snscb_fpname[8];
1634 uint8_t snscb_reserved;
1635 uint8_t snscb_hardaddr[3];
1636} sns_ga_nxt_rsp_t; /* Subcommand Response Structure */
1637#define SNS_GA_NXT_RESP_SIZE (sizeof (sns_ga_nxt_rsp_t))
1638
1639typedef struct {
1640 ct_hdr_t snscb_cthdr;
1641 uint8_t snscb_wwn[8];
1642} sns_gxn_id_rsp_t;
1643#define SNS_GXN_ID_RESP_SIZE (sizeof (sns_gxn_id_rsp_t))
1644
1645typedef struct {
1646 ct_hdr_t snscb_cthdr;
1647 uint32_t snscb_fc4_features[32];
1648} sns_gff_id_rsp_t;
1649#define SNS_GFF_ID_RESP_SIZE (sizeof (sns_gff_id_rsp_t))
1650
1651typedef struct {
1652 ct_hdr_t snscb_cthdr;
1653 struct {
1654 uint8_t control;
1655 uint8_t portid[3];
1656 } snscb_ports[1];
1657} sns_gid_ft_rsp_t;
1658#define SNS_GID_FT_RESP_SIZE(x) ((sizeof (sns_gid_ft_rsp_t)) + ((x - 1) << 2))
1659#define SNS_RFT_ID_RESP_SIZE (sizeof (ct_hdr_t))
1660
1661/*
1662 * Other Misc Structures
1663 */
1664
1665/* ELS Pass Through */
1666typedef struct {
1667 isphdr_t els_hdr;
1668 uint32_t els_handle;
1669 uint16_t els_status;
1670 uint16_t els_nphdl;
1671 uint16_t els_xmit_dsd_count; /* outgoing only */
1672 uint8_t els_vphdl;
1673 uint8_t els_sof;
1674 uint32_t els_rxid;
1675 uint16_t els_recv_dsd_count; /* outgoing only */
1676 uint8_t els_opcode;
1677 uint8_t els_reserved1;
1678 uint8_t els_did_lo;
1679 uint8_t els_did_mid;
1680 uint8_t els_did_hi;
1681 uint8_t els_reserved2;
1682 uint16_t els_reserved3;
1683 uint16_t els_ctl_flags;
1684 union {
1685 struct {
1686 uint32_t _els_bytecnt;
1687 uint32_t _els_subcode1;
1688 uint32_t _els_subcode2;
1689 uint8_t _els_reserved4[20];
1690 } in;
1691 struct {
1692 uint32_t _els_recv_bytecnt;
1693 uint32_t _els_xmit_bytecnt;
1694 uint32_t _els_xmit_dsd_length;
1695 uint16_t _els_xmit_dsd_a1500;
1696 uint16_t _els_xmit_dsd_a3116;
1697 uint16_t _els_xmit_dsd_a4732;
1698 uint16_t _els_xmit_dsd_a6348;
1699 uint32_t _els_recv_dsd_length;
1700 uint16_t _els_recv_dsd_a1500;
1701 uint16_t _els_recv_dsd_a3116;
1702 uint16_t _els_recv_dsd_a4732;
1703 uint16_t _els_recv_dsd_a6348;
1704 } out;
1705 } inout;
1706#define els_bytecnt inout.in._els_bytecnt
1707#define els_subcode1 inout.in._els_subcode1
1708#define els_subcode2 inout.in._els_subcode2
1709#define els_reserved4 inout.in._els_reserved4
1710#define els_recv_bytecnt inout.out._els_recv_bytecnt
1711#define els_xmit_bytecnt inout.out._els_xmit_bytecnt
1712#define els_xmit_dsd_length inout.out._els_xmit_dsd_length
1713#define els_xmit_dsd_a1500 inout.out._els_xmit_dsd_a1500
1714#define els_xmit_dsd_a3116 inout.out._els_xmit_dsd_a3116
1715#define els_xmit_dsd_a4732 inout.out._els_xmit_dsd_a4732
1716#define els_xmit_dsd_a6348 inout.out._els_xmit_dsd_a6348
1717#define els_recv_dsd_length inout.out._els_recv_dsd_length
1718#define els_recv_dsd_a1500 inout.out._els_recv_dsd_a1500
1719#define els_recv_dsd_a3116 inout.out._els_recv_dsd_a3116
1720#define els_recv_dsd_a4732 inout.out._els_recv_dsd_a4732
1721#define els_recv_dsd_a6348 inout.out._els_recv_dsd_a6348
1722} els_t;
1723
1724/*
1725 * A handy package structure for running FC-SCSI commands internally
1726 */
1727typedef struct {
1728 uint16_t handle;
1729 uint16_t lun;
1730 uint32_t
1731 channel : 8,
1732 portid : 24;
1733 uint32_t timeout;
1734 union {
1735 struct {
1736 uint32_t data_length;
1737 uint32_t
1738 no_wait : 1,
1739 do_read : 1;
1740 uint8_t cdb[16];
1741 void *data_ptr;
1742 } beg;
1743 struct {
1744 uint32_t data_residual;
1745 uint8_t status;
1746 uint8_t pad;
1747 uint16_t sense_length;
1748 uint8_t sense_data[32];
1749 } end;
1750 } fcd;
1751} isp_xcmd_t;
1752
1753/*
1754 * Target Mode related definitions
1755 */
1756#define QLTM_SENSELEN 18 /* non-FC cards only */
1757#define QLTM_SVALID 0x80
1758
1759/*
1760 * Structure for Enable Lun and Modify Lun queue entries
1761 */
1762typedef struct {
1763 isphdr_t le_header;
1764 uint32_t le_reserved;
1765 uint8_t le_lun;
1766 uint8_t le_rsvd;
1767 uint8_t le_ops; /* Modify LUN only */
1768 uint8_t le_tgt; /* Not for FC */
1769 uint32_t le_flags; /* Not for FC */
1770 uint8_t le_status;
1771 uint8_t le_reserved2;
1772 uint8_t le_cmd_count;
1773 uint8_t le_in_count;
1774 uint8_t le_cdb6len; /* Not for FC */
1775 uint8_t le_cdb7len; /* Not for FC */
1776 uint16_t le_timeout;
1777 uint16_t le_reserved3[20];
1778} lun_entry_t;
1779
1780/*
1781 * le_flags values
1782 */
1783#define LUN_TQAE 0x00000002 /* bit1 Tagged Queue Action Enable */
1784#define LUN_DSSM 0x01000000 /* bit24 Disable Sending SDP Message */
1785#define LUN_DISAD 0x02000000 /* bit25 Disable autodisconnect */
1786#define LUN_DM 0x40000000 /* bit30 Disconnects Mandatory */
1787
1788/*
1789 * le_ops values
1790 */
1791#define LUN_CCINCR 0x01 /* increment command count */
1792#define LUN_CCDECR 0x02 /* decrement command count */
1793#define LUN_ININCR 0x40 /* increment immed. notify count */
1794#define LUN_INDECR 0x80 /* decrement immed. notify count */
1795
1796/*
1797 * le_status values
1798 */
1799#define LUN_OK 0x01 /* we be rockin' */
1800#define LUN_ERR 0x04 /* request completed with error */
1801#define LUN_INVAL 0x06 /* invalid request */
1802#define LUN_NOCAP 0x16 /* can't provide requested capability */
1803#define LUN_ENABLED 0x3E /* LUN already enabled */
1804
1805/*
1806 * Immediate Notify Entry structure
1807 */
1808#define IN_MSGLEN 8 /* 8 bytes */
1809#define IN_RSVDLEN 8 /* 8 words */
1810typedef struct {
1811 isphdr_t in_header;
1812 uint32_t in_reserved;
1813 uint8_t in_lun; /* lun */
1814 uint8_t in_iid; /* initiator */
1815 uint8_t in_reserved2;
1816 uint8_t in_tgt; /* target */
1817 uint32_t in_flags;
1818 uint8_t in_status;
1819 uint8_t in_rsvd2;
1820 uint8_t in_tag_val; /* tag value */
1821 uint8_t in_tag_type; /* tag type */
1822 uint16_t in_seqid; /* sequence id */
1823 uint8_t in_msg[IN_MSGLEN]; /* SCSI message bytes */
1824 uint16_t in_reserved3[IN_RSVDLEN];
1825 uint8_t in_sense[QLTM_SENSELEN];/* suggested sense data */
1826} in_entry_t;
1827
1828typedef struct {
1829 isphdr_t in_header;
1830 uint32_t in_reserved;
1831 uint8_t in_lun; /* lun */
1832 uint8_t in_iid; /* initiator */
1833 uint16_t in_scclun;
1834 uint32_t in_reserved2;
1835 uint16_t in_status;
1836 uint16_t in_task_flags;
1837 uint16_t in_seqid; /* sequence id */
1838} in_fcentry_t;
1839
1840typedef struct {
1841 isphdr_t in_header;
1842 uint32_t in_reserved;
1843 uint16_t in_iid; /* initiator */
1844 uint16_t in_scclun;
1845 uint32_t in_reserved2;
1846 uint16_t in_status;
1847 uint16_t in_task_flags;
1848 uint16_t in_seqid; /* sequence id */
1849} in_fcentry_e_t;
1850
1851/*
1852 * Values for the in_status field
1853 */
1854#define IN_REJECT 0x0D /* Message Reject message received */
1855#define IN_RESET 0x0E /* Bus Reset occurred */
1856#define IN_NO_RCAP 0x16 /* requested capability not available */
1857#define IN_IDE_RECEIVED 0x33 /* Initiator Detected Error msg received */
1858#define IN_RSRC_UNAVAIL 0x34 /* resource unavailable */
1859#define IN_MSG_RECEIVED 0x36 /* SCSI message received */
1860#define IN_ABORT_TASK 0x20 /* task named in RX_ID is being aborted (FC) */
1861#define IN_PORT_LOGOUT 0x29 /* port has logged out (FC) */
1862#define IN_PORT_CHANGED 0x2A /* port changed */
1863#define IN_GLOBAL_LOGO 0x2E /* all ports logged out */
1864#define IN_NO_NEXUS 0x3B /* Nexus not established */
1865#define IN_SRR_RCVD 0x45 /* SRR received */
1866
1867/*
1868 * Values for the in_task_flags field- should only get one at a time!
1869 */
1870#define TASK_FLAGS_RESERVED_MASK (0xe700)
1871#define TASK_FLAGS_CLEAR_ACA (1<<14)
1872#define TASK_FLAGS_TARGET_RESET (1<<13)
1873#define TASK_FLAGS_LUN_RESET (1<<12)
1874#define TASK_FLAGS_CLEAR_TASK_SET (1<<10)
1875#define TASK_FLAGS_ABORT_TASK_SET (1<<9)
1876
1877/*
1878 * ISP24XX Immediate Notify
1879 */
1880typedef struct {
1881 isphdr_t in_header;
1882 uint32_t in_reserved;
1883 uint16_t in_nphdl;
1884 uint16_t in_reserved1;
1885 uint16_t in_flags;
1886 uint16_t in_srr_rxid;
1887 uint16_t in_status;
1888 uint8_t in_status_subcode;
1889 uint8_t in_fwhandle;
1890 uint32_t in_rxid;
1891 uint16_t in_srr_reloff_lo;
1892 uint16_t in_srr_reloff_hi;
1893 uint16_t in_srr_iu;
1894 uint16_t in_srr_oxid;
1895 /*
1896 * If bit 2 is set in in_flags, the N-Port and
1897 * handle tags are valid. If the received ELS is
1898 * a LOGO, then these tags contain the N Port ID
1899 * from the LOGO payload. If the received ELS
1900 * request is TPRLO, these tags contain the
1901 * Third Party Originator N Port ID.
1902 */
1903 uint16_t in_nport_id_hi;
1904#define in_prli_options in_nport_id_hi
1905 uint8_t in_nport_id_lo;
1906 uint8_t in_reserved3;
1907 uint16_t in_np_handle;
1908 uint8_t in_reserved4[12];
1909 uint8_t in_reserved5;
1910 uint8_t in_vpidx;
1911 uint32_t in_reserved6;
1912 uint16_t in_portid_lo;
1913 uint8_t in_portid_hi;
1914 uint8_t in_reserved7;
1915 uint16_t in_reserved8;
1916 uint16_t in_oxid;
1917} in_fcentry_24xx_t;
1918
1919#define IN24XX_FLAG_PUREX_IOCB 0x1
1920#define IN24XX_FLAG_GLOBAL_LOGOUT 0x2
1921#define IN24XX_FLAG_NPHDL_VALID 0x4
1922#define IN24XX_FLAG_N2N_PRLI 0x8
1923#define IN24XX_FLAG_PN_NN_VALID 0x10
1924
1925#define IN24XX_LIP_RESET 0x0E
1926#define IN24XX_LINK_RESET 0x0F
1927#define IN24XX_PORT_LOGOUT 0x29
1928#define IN24XX_PORT_CHANGED 0x2A
1929#define IN24XX_LINK_FAILED 0x2E
1930#define IN24XX_SRR_RCVD 0x45
1931#define IN24XX_ELS_RCVD 0x46 /*
1932 * login-affectin ELS received- check
1933 * subcode for specific opcode
1934 */
1935
1936/*
1937 * For f/w > 4.0.25, these offsets in the Immediate Notify contain
1938 * the WWNN/WWPN if the ELS is PLOGI, PDISC or ADISC. The WWN is in
1939 * Big Endian format.
1940 */
1941#define IN24XX_PRLI_WWNN_OFF 0x18
1942#define IN24XX_PRLI_WWPN_OFF 0x28
1943#define IN24XX_PLOGI_WWNN_OFF 0x20
1944#define IN24XX_PLOGI_WWPN_OFF 0x28
1945
1946/*
1947 * For f/w > 4.0.25, this offset in the Immediate Notify contain
1948 * the WWPN if the ELS is LOGO. The WWN is in Big Endian format.
1949 */
1950#define IN24XX_LOGO_WWPN_OFF 0x28
1951
1952/*
1953 * Immediate Notify Status Subcodes for IN24XX_PORT_LOGOUT
1954 */
1955#define IN24XX_PORT_LOGOUT_PDISC_TMO 0x00
1956#define IN24XX_PORT_LOGOUT_UXPR_DISC 0x01
1957#define IN24XX_PORT_LOGOUT_OWN_OPN 0x02
1958#define IN24XX_PORT_LOGOUT_OWN_OPN_SFT 0x03
1959#define IN24XX_PORT_LOGOUT_ABTS_TMO 0x04
1960#define IN24XX_PORT_LOGOUT_DISC_RJT 0x05
1961#define IN24XX_PORT_LOGOUT_LOGIN_NEEDED 0x06
1962#define IN24XX_PORT_LOGOUT_BAD_DISC 0x07
1963#define IN24XX_PORT_LOGOUT_LOST_ALPA 0x08
1964#define IN24XX_PORT_LOGOUT_XMIT_FAILURE 0x09
1965
1966/*
1967 * Immediate Notify Status Subcodes for IN24XX_PORT_CHANGED
1968 */
1969#define IN24XX_PORT_CHANGED_BADFAN 0x00
1970#define IN24XX_PORT_CHANGED_TOPO_CHANGE 0x01
1971#define IN24XX_PORT_CHANGED_FLOGI_ACC 0x02
1972#define IN24XX_PORT_CHANGED_FLOGI_RJT 0x03
1973#define IN24XX_PORT_CHANGED_TIMEOUT 0x04
1974#define IN24XX_PORT_CHANGED_PORT_CHANGE 0x05
1975
1976/*
1977 * Notify Acknowledge Entry structure
1978 */
1979#define NA_RSVDLEN 22
1980typedef struct {
1981 isphdr_t na_header;
1982 uint32_t na_reserved;
1983 uint8_t na_lun; /* lun */
1984 uint8_t na_iid; /* initiator */
1985 uint8_t na_reserved2;
1986 uint8_t na_tgt; /* target */
1987 uint32_t na_flags;
1988 uint8_t na_status;
1989 uint8_t na_event;
1990 uint16_t na_seqid; /* sequence id */
1991 uint16_t na_reserved3[NA_RSVDLEN];
1992} na_entry_t;
1993
1994/*
1995 * Value for the na_event field
1996 */
1997#define NA_RST_CLRD 0x80 /* Clear an async event notification */
1998#define NA_OK 0x01 /* Notify Acknowledge Succeeded */
1999#define NA_INVALID 0x06 /* Invalid Notify Acknowledge */
2000
2001#define NA2_RSVDLEN 21
2002typedef struct {
2003 isphdr_t na_header;
2004 uint32_t na_reserved;
2005 uint8_t na_reserved1;
2006 uint8_t na_iid; /* initiator loop id */
2007 uint16_t na_response;
2008 uint16_t na_flags;
2009 uint16_t na_reserved2;
2010 uint16_t na_status;
2011 uint16_t na_task_flags;
2012 uint16_t na_seqid; /* sequence id */
2013 uint16_t na_reserved3[NA2_RSVDLEN];
2014} na_fcentry_t;
2015
2016typedef struct {
2017 isphdr_t na_header;
2018 uint32_t na_reserved;
2019 uint16_t na_iid; /* initiator loop id */
2020 uint16_t na_response; /* response code */
2021 uint16_t na_flags;
2022 uint16_t na_reserved2;
2023 uint16_t na_status;
2024 uint16_t na_task_flags;
2025 uint16_t na_seqid; /* sequence id */
2026 uint16_t na_reserved3[NA2_RSVDLEN];
2027} na_fcentry_e_t;
2028
2029#define NAFC_RCOUNT 0x80 /* increment resource count */
2030#define NAFC_RST_CLRD 0x20 /* Clear LIP Reset */
2031#define NAFC_TVALID 0x10 /* task mangement response code is valid */
2032
2033/*
2034 * ISP24XX Notify Acknowledge
2035 */
2036
2037typedef struct {
2038 isphdr_t na_header;
2039 uint32_t na_handle;
2040 uint16_t na_nphdl;
2041 uint16_t na_reserved1;
2042 uint16_t na_flags;
2043 uint16_t na_srr_rxid;
2044 uint16_t na_status;
2045 uint8_t na_status_subcode;
2046 uint8_t na_fwhandle;
2047 uint32_t na_rxid;
2048 uint16_t na_srr_reloff_lo;
2049 uint16_t na_srr_reloff_hi;
2050 uint16_t na_srr_iu;
2051 uint16_t na_srr_flags;
2052 uint8_t na_reserved3[18];
2053 uint8_t na_reserved4;
2054 uint8_t na_vpidx;
2055 uint8_t na_srr_reject_vunique;
2056 uint8_t na_srr_reject_explanation;
2057 uint8_t na_srr_reject_code;
2058 uint8_t na_reserved5;
2059 uint8_t na_reserved6[6];
2060 uint16_t na_oxid;
2061} na_fcentry_24xx_t;
2062
2063/*
2064 * Accept Target I/O Entry structure
2065 */
2066#define ATIO_CDBLEN 26
2067
2068typedef struct {
2069 isphdr_t at_header;
2070 uint16_t at_reserved;
2071 uint16_t at_handle;
2072 uint8_t at_lun; /* lun */
2073 uint8_t at_iid; /* initiator */
2074 uint8_t at_cdblen; /* cdb length */
2075 uint8_t at_tgt; /* target */
2076 uint32_t at_flags;
2077 uint8_t at_status; /* firmware status */
2078 uint8_t at_scsi_status; /* scsi status */
2079 uint8_t at_tag_val; /* tag value */
2080 uint8_t at_tag_type; /* tag type */
2081 uint8_t at_cdb[ATIO_CDBLEN]; /* received CDB */
2082 uint8_t at_sense[QLTM_SENSELEN];/* suggested sense data */
2083} at_entry_t;
2084
2085/*
2086 * at_flags values
2087 */
2088#define AT_NODISC 0x00008000 /* disconnect disabled */
2089#define AT_TQAE 0x00000002 /* Tagged Queue Action enabled */
2090
2091/*
2092 * at_status values
2093 */
2094#define AT_PATH_INVALID 0x07 /* ATIO sent to firmware for disabled lun */
2095#define AT_RESET 0x0E /* SCSI Bus Reset Occurred */
2096#define AT_PHASE_ERROR 0x14 /* Bus phase sequence error */
2097#define AT_NOCAP 0x16 /* Requested capability not available */
2098#define AT_BDR_MSG 0x17 /* Bus Device Reset msg received */
2099#define AT_CDB 0x3D /* CDB received */
2100/*
2101 * Macros to create and fetch and test concatenated handle and tag value macros
2102 * (SPI only)
2103 */
2104#define AT_MAKE_TAGID(tid, aep) \
2105 tid = aep->at_handle; \
2106 if (aep->at_flags & AT_TQAE) { \
2107 tid |= (aep->at_tag_val << 16); \
2108 tid |= (1 << 24); \
2109 }
2110
2111#define CT_MAKE_TAGID(tid, ct) \
2112 tid = ct->ct_fwhandle; \
2113 if (ct->ct_flags & CT_TQAE) { \
2114 tid |= (ct->ct_tag_val << 16); \
2115 tid |= (1 << 24); \
2116 }
2117
2118#define AT_HAS_TAG(val) ((val) & (1 << 24))
2119#define AT_GET_TAG(val) (((val) >> 16) & 0xff)
2120#define AT_GET_HANDLE(val) ((val) & 0xffff)
2121
2122#define IN_MAKE_TAGID(tid, inp) \
2123 tid = inp->in_seqid; \
2124 tid |= (inp->in_tag_val << 16); \
2125 tid |= (1 << 24)
2126
2127/*
2128 * Accept Target I/O Entry structure, Type 2
2129 */
2130#define ATIO2_CDBLEN 16
2131
2132typedef struct {
2133 isphdr_t at_header;
2134 uint32_t at_reserved;
2135 uint8_t at_lun; /* lun or reserved */
2136 uint8_t at_iid; /* initiator */
2137 uint16_t at_rxid; /* response ID */
2138 uint16_t at_flags;
2139 uint16_t at_status; /* firmware status */
2140 uint8_t at_crn; /* command reference number */
2141 uint8_t at_taskcodes;
2142 uint8_t at_taskflags;
2143 uint8_t at_execodes;
2144 uint8_t at_cdb[ATIO2_CDBLEN]; /* received CDB */
2145 uint32_t at_datalen; /* allocated data len */
2146 uint16_t at_scclun; /* SCC Lun or reserved */
2147 uint16_t at_wwpn[4]; /* WWPN of initiator */
2148 uint16_t at_reserved2[6];
2149 uint16_t at_oxid;
2150} at2_entry_t;
2151
2152typedef struct {
2153 isphdr_t at_header;
2154 uint32_t at_reserved;
2155 uint16_t at_iid; /* initiator */
2156 uint16_t at_rxid; /* response ID */
2157 uint16_t at_flags;
2158 uint16_t at_status; /* firmware status */
2159 uint8_t at_crn; /* command reference number */
2160 uint8_t at_taskcodes;
2161 uint8_t at_taskflags;
2162 uint8_t at_execodes;
2163 uint8_t at_cdb[ATIO2_CDBLEN]; /* received CDB */
2164 uint32_t at_datalen; /* allocated data len */
2165 uint16_t at_scclun; /* SCC Lun or reserved */
2166 uint16_t at_wwpn[4]; /* WWPN of initiator */
2167 uint16_t at_reserved2[6];
2168 uint16_t at_oxid;
2169} at2e_entry_t;
2170
2171#define ATIO2_WWPN_OFFSET 0x2A
2172#define ATIO2_OXID_OFFSET 0x3E
2173
2174#define ATIO2_TC_ATTR_MASK 0x7
2175#define ATIO2_TC_ATTR_SIMPLEQ 0
2176#define ATIO2_TC_ATTR_HEADOFQ 1
2177#define ATIO2_TC_ATTR_ORDERED 2
2178#define ATIO2_TC_ATTR_ACAQ 4
2179#define ATIO2_TC_ATTR_UNTAGGED 5
2180
2181#define ATIO2_EX_WRITE 0x1
2182#define ATIO2_EX_READ 0x2
2183/*
2184 * Macros to create and fetch and test concatenated handle and tag value macros
2185 */
2186#define AT2_MAKE_TAGID(tid, bus, inst, aep) \
2187 tid = aep->at_rxid; \
2188 tid |= (((uint64_t)inst) << 32); \
2189 tid |= (((uint64_t)bus) << 48)
2190
2191#define CT2_MAKE_TAGID(tid, bus, inst, ct) \
2192 tid = ct->ct_rxid; \
2193 tid |= (((uint64_t)inst) << 32); \
2194 tid |= (((uint64_t)(bus & 0xff)) << 48)
2195
2196#define AT2_HAS_TAG(val) 1
2197#define AT2_GET_TAG(val) ((val) & 0xffffffff)
2198#define AT2_GET_INST(val) (((val) >> 32) & 0xffff)
2199#define AT2_GET_HANDLE AT2_GET_TAG
2200#define AT2_GET_BUS(val) (((val) >> 48) & 0xff)
2201
2202#define FC_HAS_TAG AT2_HAS_TAG
2203#define FC_GET_TAG AT2_GET_TAG
2204#define FC_GET_INST AT2_GET_INST
2205#define FC_GET_HANDLE AT2_GET_HANDLE
2206
2207#define IN_FC_MAKE_TAGID(tid, bus, inst, seqid) \
2208 tid = seqid; \
2209 tid |= (((uint64_t)inst) << 32); \
2210 tid |= (((uint64_t)(bus & 0xff)) << 48)
2211
2212#define FC_TAG_INSERT_INST(tid, inst) \
2213 tid &= ~0x0000ffff00000000ull; \
2214 tid |= (((uint64_t)inst) << 32)
2215
2216/*
2217 * 24XX ATIO Definition
2218 *
2219 * This is *quite* different from other entry types.
2220 * First of all, it has its own queue it comes in on.
2221 *
2222 * Secondly, it doesn't have a normal header.
2223 *
2224 * Thirdly, it's just a passthru of the FCP CMND IU
2225 * which is recorded in big endian mode.
2226 */
2227typedef struct {
2228 uint8_t at_type;
2229 uint8_t at_count;
2230 /*
2231 * Task attribute in high four bits,
2232 * the rest is the FCP CMND IU Length.
2233 * NB: the command can extend past the
2234 * length for a single queue entry.
2235 */
2236 uint16_t at_ta_len;
2237 uint32_t at_rxid;
2238 fc_hdr_t at_hdr;
2239 fcp_cmnd_iu_t at_cmnd;
2240} at7_entry_t;
2241#define AT7_NORESRC_RXID 0xffffffff
2242
2243
2244/*
2245 * Continue Target I/O Entry structure
2246 * Request from driver. The response from the
2247 * ISP firmware is the same except that the last 18
2248 * bytes are overwritten by suggested sense data if
2249 * the 'autosense valid' bit is set in the status byte.
2250 */
2251typedef struct {
2252 isphdr_t ct_header;
2253 uint16_t ct_syshandle;
2254 uint16_t ct_fwhandle; /* required by f/w */
2255 uint8_t ct_lun; /* lun */
2256 uint8_t ct_iid; /* initiator id */
2257 uint8_t ct_reserved2;
2258 uint8_t ct_tgt; /* our target id */
2259 uint32_t ct_flags;
2260 uint8_t ct_status; /* isp status */
2261 uint8_t ct_scsi_status; /* scsi status */
2262 uint8_t ct_tag_val; /* tag value */
2263 uint8_t ct_tag_type; /* tag type */
2264 uint32_t ct_xfrlen; /* transfer length */
2265 uint32_t ct_resid; /* residual length */
2266 uint16_t ct_timeout;
2267 uint16_t ct_seg_count;
2268 ispds_t ct_dataseg[ISP_RQDSEG];
2269} ct_entry_t;
2270
2271/*
2272 * For some of the dual port SCSI adapters, port (bus #) is reported
2273 * in the MSbit of ct_iid. Bit fields are a bit too awkward here.
2274 *
2275 * Note that this does not apply to FC adapters at all which can and
2276 * do report IIDs between 0x81 && 0xfe (or 0x7ff) which represent devices
2277 * that have logged in across a SCSI fabric.
2278 */
2279#define GET_IID_VAL(x) (x & 0x3f)
2280#define GET_BUS_VAL(x) ((x >> 7) & 0x1)
2281#define SET_IID_VAL(y, x) y = ((y & ~0x3f) | (x & 0x3f))
2282#define SET_BUS_VAL(y, x) y = ((y & 0x3f) | ((x & 0x1) << 7))
2283
2284/*
2285 * ct_flags values
2286 */
2287#define CT_TQAE 0x00000002 /* bit 1, Tagged Queue Action enable */
2288#define CT_DATA_IN 0x00000040 /* bits 6&7, Data direction - *to* initiator */
2289#define CT_DATA_OUT 0x00000080 /* bits 6&7, Data direction - *from* initiator */
2290#define CT_NO_DATA 0x000000C0 /* bits 6&7, Data direction */
2291#define CT_CCINCR 0x00000100 /* bit 8, autoincrement atio count */
2292#define CT_DATAMASK 0x000000C0 /* bits 6&7, Data direction */
2293#define CT_INISYNCWIDE 0x00004000 /* bit 14, Do Sync/Wide Negotiation */
2294#define CT_NODISC 0x00008000 /* bit 15, Disconnects disabled */
2295#define CT_DSDP 0x01000000 /* bit 24, Disable Save Data Pointers */
2296#define CT_SENDRDP 0x04000000 /* bit 26, Send Restore Pointers msg */
2297#define CT_SENDSTATUS 0x80000000 /* bit 31, Send SCSI status byte */
2298
2299/*
2300 * ct_status values
2301 * - set by the firmware when it returns the CTIO
2302 */
2303#define CT_OK 0x01 /* completed without error */
2304#define CT_ABORTED 0x02 /* aborted by host */
2305#define CT_ERR 0x04 /* see sense data for error */
2306#define CT_INVAL 0x06 /* request for disabled lun */
2307#define CT_NOPATH 0x07 /* invalid ITL nexus */
2308#define CT_INVRXID 0x08 /* (FC only) Invalid RX_ID */
2309#define CT_DATA_OVER 0x09 /* (FC only) Data Overrun */
2310#define CT_RSELTMO 0x0A /* reselection timeout after 2 tries */
2311#define CT_TIMEOUT 0x0B /* timed out */
2312#define CT_RESET 0x0E /* SCSI Bus Reset occurred */
2313#define CT_PARITY 0x0F /* Uncorrectable Parity Error */
2314#define CT_BUS_ERROR 0x10 /* (FC Only) DMA PCI Error */
2315#define CT_PANIC 0x13 /* Unrecoverable Error */
2316#define CT_PHASE_ERROR 0x14 /* Bus phase sequence error */
2317#define CT_DATA_UNDER 0x15 /* (FC only) Data Underrun */
2318#define CT_BDR_MSG 0x17 /* Bus Device Reset msg received */
2319#define CT_TERMINATED 0x19 /* due to Terminate Transfer mbox cmd */
2320#define CT_PORTUNAVAIL 0x28 /* port not available */
2321#define CT_LOGOUT 0x29 /* port logout */
2322#define CT_PORTCHANGED 0x2A /* port changed */
2323#define CT_IDE 0x33 /* Initiator Detected Error */
2324#define CT_NOACK 0x35 /* Outstanding Immed. Notify. entry */
2325#define CT_SRR 0x45 /* SRR Received */
2326#define CT_LUN_RESET 0x48 /* Lun Reset Received */
2327
2328#define CT_HBA_RESET 0xffff /* pseudo error - command destroyed by HBA reset*/
2329
2330/*
2331 * When the firmware returns a CTIO entry, it may overwrite the last
2332 * part of the structure with sense data. This starts at offset 0x2E
2333 * into the entry, which is in the middle of ct_dataseg[1]. Rather
2334 * than define a new struct for this, I'm just using the sense data
2335 * offset.
2336 */
2337#define CTIO_SENSE_OFFSET 0x2E
2338
2339/*
2340 * Entry length in u_longs. All entries are the same size so
2341 * any one will do as the numerator.
2342 */
2343#define UINT32_ENTRY_SIZE (sizeof(at_entry_t)/sizeof(uint32_t))
2344
2345/*
2346 * QLA2100 CTIO (type 2) entry
2347 */
2348#define MAXRESPLEN 26
2349typedef struct {
2350 isphdr_t ct_header;
2351 uint32_t ct_syshandle;
2352 uint8_t ct_lun; /* lun */
2353 uint8_t ct_iid; /* initiator id */
2354 uint16_t ct_rxid; /* response ID */
2355 uint16_t ct_flags;
2356 uint16_t ct_status; /* isp status */
2357 uint16_t ct_timeout;
2358 uint16_t ct_seg_count;
2359 uint32_t ct_reloff; /* relative offset */
2360 uint32_t ct_resid; /* residual length */
2361 union {
2362 /*
2363 * The three different modes that the target driver
2364 * can set the CTIO{2,3,4} up as.
2365 *
2366 * The first is for sending FCP_DATA_IUs as well as
2367 * (optionally) sending a terminal SCSI status FCP_RSP_IU.
2368 *
2369 * The second is for sending SCSI sense data in an FCP_RSP_IU.
2370 * Note that no FCP_DATA_IUs will be sent.
2371 *
2372 * The third is for sending FCP_RSP_IUs as built specifically
2373 * in system memory as located by the isp_dataseg.
2374 */
2375 struct {
2376 uint32_t _reserved;
2377 uint16_t _reserved2;
2378 uint16_t ct_scsi_status;
2379 uint32_t ct_xfrlen;
2380 union {
2381 ispds_t ct_dataseg[ISP_RQDSEG_T2];
2382 ispds64_t ct_dataseg64[ISP_RQDSEG_T3];
2383 ispdslist_t ct_dslist;
2384 } u;
2385 } m0;
2386 struct {
2387 uint16_t _reserved;
2388 uint16_t _reserved2;
2389 uint16_t ct_senselen;
2390 uint16_t ct_scsi_status;
2391 uint16_t ct_resplen;
2392 uint8_t ct_resp[MAXRESPLEN];
2393 } m1;
2394 struct {
2395 uint32_t _reserved;
2396 uint16_t _reserved2;
2397 uint16_t _reserved3;
2398 uint32_t ct_datalen;
2399 union {
2400 ispds_t ct_fcp_rsp_iudata_32;
2401 ispds64_t ct_fcp_rsp_iudata_64;
2402 } u;
2403 } m2;
2404 } rsp;
2405} ct2_entry_t;
2406
2407typedef struct {
2408 isphdr_t ct_header;
2409 uint32_t ct_syshandle;
2410 uint16_t ct_iid; /* initiator id */
2411 uint16_t ct_rxid; /* response ID */
2412 uint16_t ct_flags;
2413 uint16_t ct_status; /* isp status */
2414 uint16_t ct_timeout;
2415 uint16_t ct_seg_count;
2416 uint32_t ct_reloff; /* relative offset */
2417 uint32_t ct_resid; /* residual length */
2418 union {
2419 struct {
2420 uint32_t _reserved;
2421 uint16_t _reserved2;
2422 uint16_t ct_scsi_status;
2423 uint32_t ct_xfrlen;
2424 union {
2425 ispds_t ct_dataseg[ISP_RQDSEG_T2];
2426 ispds64_t ct_dataseg64[ISP_RQDSEG_T3];
2427 ispdslist_t ct_dslist;
2428 } u;
2429 } m0;
2430 struct {
2431 uint16_t _reserved;
2432 uint16_t _reserved2;
2433 uint16_t ct_senselen;
2434 uint16_t ct_scsi_status;
2435 uint16_t ct_resplen;
2436 uint8_t ct_resp[MAXRESPLEN];
2437 } m1;
2438 struct {
2439 uint32_t _reserved;
2440 uint16_t _reserved2;
2441 uint16_t _reserved3;
2442 uint32_t ct_datalen;
2443 union {
2444 ispds_t ct_fcp_rsp_iudata_32;
2445 ispds64_t ct_fcp_rsp_iudata_64;
2446 } u;
2447 } m2;
2448 } rsp;
2449} ct2e_entry_t;
2450
2451/*
2452 * ct_flags values for CTIO2
2453 */
2454#define CT2_FLAG_MODE0 0x0000
2455#define CT2_FLAG_MODE1 0x0001
2456#define CT2_FLAG_MODE2 0x0002
2457#define CT2_FLAG_MMASK 0x0003
2458#define CT2_DATA_IN 0x0040 /* *to* initiator */
2459#define CT2_DATA_OUT 0x0080 /* *from* initiator */
2460#define CT2_NO_DATA 0x00C0
2461#define CT2_DATAMASK 0x00C0
2462#define CT2_CCINCR 0x0100
2463#define CT2_FASTPOST 0x0200
2464#define CT2_CONFIRM 0x2000
2465#define CT2_TERMINATE 0x4000
2466#define CT2_SENDSTATUS 0x8000
2467
2468/*
2469 * ct_status values are (mostly) the same as that for ct_entry.
2470 */
2471
2472/*
2473 * ct_scsi_status values- the low 8 bits are the normal SCSI status
2474 * we know and love. The upper 8 bits are validity markers for FCP_RSP_IU
2475 * fields.
2476 */
2477#define CT2_RSPLEN_VALID 0x0100
2478#define CT2_SNSLEN_VALID 0x0200
2479#define CT2_DATA_OVER 0x0400
2480#define CT2_DATA_UNDER 0x0800
2481
2482/*
2483 * ISP24XX CTIO
2484 */
2485#define MAXRESPLEN_24XX 24
2486typedef struct {
2487 isphdr_t ct_header;
2488 uint32_t ct_syshandle;
2489 uint16_t ct_nphdl; /* status on returned CTIOs */
2490 uint16_t ct_timeout;
2491 uint16_t ct_seg_count;
2492 uint8_t ct_vpidx;
2493 uint8_t ct_xflags;
2494 uint16_t ct_iid_lo; /* low 16 bits of portid */
2495 uint8_t ct_iid_hi; /* hi 8 bits of portid */
2496 uint8_t ct_reserved;
2497 uint32_t ct_rxid;
2498 uint16_t ct_senselen; /* mode 1 only */
2499 uint16_t ct_flags;
2500 uint32_t ct_resid; /* residual length */
2501 uint16_t ct_oxid;
2502 uint16_t ct_scsi_status; /* modes 0 && 1 only */
2503 union {
2504 struct {
2505 uint32_t reloff;
2506 uint32_t reserved0;
2507 uint32_t ct_xfrlen;
2508 uint32_t reserved1;
2509 ispds64_t ds;
2510 } m0;
2511 struct {
2512 uint16_t ct_resplen;
2513 uint16_t reserved;
2514 uint8_t ct_resp[MAXRESPLEN_24XX];
2515 } m1;
2516 struct {
2517 uint32_t reserved0;
2518 uint32_t reserved1;
2519 uint32_t ct_datalen;
2520 uint32_t reserved2;
2521 ispds64_t ct_fcp_rsp_iudata;
2522 } m2;
2523 } rsp;
2524} ct7_entry_t;
2525
2526/*
2527 * ct_flags values for CTIO7
2528 */
2529#define CT7_NO_DATA 0x0000
2530#define CT7_DATA_OUT 0x0001 /* *from* initiator */
2531#define CT7_DATA_IN 0x0002 /* *to* initiator */
2532#define CT7_DATAMASK 0x3
2533#define CT7_DSD_ENABLE 0x0004
2534#define CT7_CONF_STSFD 0x0010
2535#define CT7_EXPLCT_CONF 0x0020
2536#define CT7_FLAG_MODE0 0x0000
2537#define CT7_FLAG_MODE1 0x0040
2538#define CT7_FLAG_MODE2 0x0080
2539#define CT7_FLAG_MMASK 0x00C0
2540#define CT7_NOACK 0x0100
2541#define CT7_TASK_ATTR_SHIFT 9
2542#define CT7_CONFIRM 0x2000
2543#define CT7_TERMINATE 0x4000
2544#define CT7_SENDSTATUS 0x8000
2545
2546/*
2547 * Type 7 CTIO status codes
2548 */
2549#define CT7_OK 0x01 /* completed without error */
2550#define CT7_ABORTED 0x02 /* aborted by host */
2551#define CT7_ERR 0x04 /* see sense data for error */
2552#define CT7_INVAL 0x06 /* request for disabled lun */
2553#define CT7_INVRXID 0x08 /* Invalid RX_ID */
2554#define CT7_DATA_OVER 0x09 /* Data Overrun */
2555#define CT7_TIMEOUT 0x0B /* timed out */
2556#define CT7_RESET 0x0E /* LIP Rset Received */
2557#define CT7_BUS_ERROR 0x10 /* DMA PCI Error */
2558#define CT7_REASSY_ERR 0x11 /* DMA reassembly error */
2559#define CT7_DATA_UNDER 0x15 /* Data Underrun */
2560#define CT7_PORTUNAVAIL 0x28 /* port not available */
2561#define CT7_LOGOUT 0x29 /* port logout */
2562#define CT7_PORTCHANGED 0x2A /* port changed */
2563#define CT7_SRR 0x45 /* SRR Received */
2564
2565/*
2566 * Other 24XX related target IOCBs
2567 */
2568
2569/*
2570 * ABTS Received
2571 */
2572typedef struct {
2573 isphdr_t abts_header;
2574 uint8_t abts_reserved0[6];
2575 uint16_t abts_nphdl;
2576 uint16_t abts_reserved1;
2577 uint16_t abts_sof;
2578 uint32_t abts_rxid_abts;
2579 uint16_t abts_did_lo;
2580 uint8_t abts_did_hi;
2581 uint8_t abts_r_ctl;
2582 uint16_t abts_sid_lo;
2583 uint8_t abts_sid_hi;
2584 uint8_t abts_cs_ctl;
2585 uint16_t abts_fs_ctl;
2586 uint8_t abts_f_ctl;
2587 uint8_t abts_type;
2588 uint16_t abts_seq_cnt;
2589 uint8_t abts_df_ctl;
2590 uint8_t abts_seq_id;
2591 uint16_t abts_rx_id;
2592 uint16_t abts_ox_id;
2593 uint32_t abts_param;
2594 uint8_t abts_reserved2[16];
2595 uint32_t abts_rxid_task;
2596} abts_t;
2597
2598typedef struct {
2599 isphdr_t abts_rsp_header;
2600 uint32_t abts_rsp_handle;
2601 uint16_t abts_rsp_status;
2602 uint16_t abts_rsp_nphdl;
2603 uint16_t abts_rsp_ctl_flags;
2604 uint16_t abts_rsp_sof;
2605 uint32_t abts_rsp_rxid_abts;
2606 uint16_t abts_rsp_did_lo;
2607 uint8_t abts_rsp_did_hi;
2608 uint8_t abts_rsp_r_ctl;
2609 uint16_t abts_rsp_sid_lo;
2610 uint8_t abts_rsp_sid_hi;
2611 uint8_t abts_rsp_cs_ctl;
2612 uint16_t abts_rsp_f_ctl_lo;
2613 uint8_t abts_rsp_f_ctl_hi;
2614 uint8_t abts_rsp_type;
2615 uint16_t abts_rsp_seq_cnt;
2616 uint8_t abts_rsp_df_ctl;
2617 uint8_t abts_rsp_seq_id;
2618 uint16_t abts_rsp_rx_id;
2619 uint16_t abts_rsp_ox_id;
2620 uint32_t abts_rsp_param;
2621 union {
2622 struct {
2623 uint16_t reserved;
2624 uint8_t last_seq_id;
2625 uint8_t seq_id_valid;
2626 uint16_t aborted_rx_id;
2627 uint16_t aborted_ox_id;
2628 uint16_t high_seq_cnt;
2629 uint16_t low_seq_cnt;
2630 uint8_t reserved2[4];
2631 } ba_acc;
2632 struct {
2633 uint8_t vendor_unique;
2634 uint8_t explanation;
2635 uint8_t reason;
2636 uint8_t reserved;
2637 uint8_t reserved2[12];
2638 } ba_rjt;
2639 struct {
2640 uint8_t reserved[8];
2641 uint32_t subcode1;
2642 uint32_t subcode2;
2643 } rsp;
2644 uint8_t reserved[16];
2645 } abts_rsp_payload;
2646 uint32_t abts_rsp_rxid_task;
2647} abts_rsp_t;
2648
2649/* terminate this ABTS exchange */
2650#define ISP24XX_ABTS_RSP_TERMINATE 0x01
2651
2652#define ISP24XX_ABTS_RSP_COMPLETE 0x00
2653#define ISP24XX_ABTS_RSP_RESET 0x04
2654#define ISP24XX_ABTS_RSP_ABORTED 0x05
2655#define ISP24XX_ABTS_RSP_TIMEOUT 0x06
2656#define ISP24XX_ABTS_RSP_INVXID 0x08
2657#define ISP24XX_ABTS_RSP_LOGOUT 0x29
2658#define ISP24XX_ABTS_RSP_SUBCODE 0x31
2659
2660#define ISP24XX_NO_TASK 0xffffffff
2661
2662/*
2663 * Miscellaneous
2664 *
2665 * These are the limits of the number of dma segments we
2666 * can deal with based not on the size of the segment counter
2667 * (which is 16 bits), but on the size of the number of
2668 * queue entries field (which is 8 bits). We assume no
2669 * segments in the first queue entry, so we can either
2670 * have 7 dma segments per continuation entry or 5
2671 * (for 64 bit dma).. multiplying out by 254....
2672 */
2673#define ISP_NSEG_MAX 1778
2674#define ISP_NSEG64_MAX 1270
2675
2676#endif /* _ISPMBOX_H */