ichsmb_pci.c (260352) | ichsmb_pci.c (275439) |
---|---|
1/*- 2 * ichsmb_pci.c 3 * 4 * Author: Archie Cobbs <archie@freebsd.org> 5 * Copyright (c) 2000 Whistle Communications, Inc. 6 * All rights reserved. 7 * Author: Archie Cobbs <archie@freebsd.org> 8 * --- 23 unchanged lines hidden (view full) --- 32 * SERVICES, LOSS OF USE, DATA OR PROFITS, HOWEVER CAUSED AND UNDER ANY 33 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 34 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF 35 * THIS SOFTWARE, EVEN IF WHISTLE COMMUNICATIONS IS ADVISED OF THE POSSIBILITY 36 * OF SUCH DAMAGE. 37 */ 38 39#include <sys/cdefs.h> | 1/*- 2 * ichsmb_pci.c 3 * 4 * Author: Archie Cobbs <archie@freebsd.org> 5 * Copyright (c) 2000 Whistle Communications, Inc. 6 * All rights reserved. 7 * Author: Archie Cobbs <archie@freebsd.org> 8 * --- 23 unchanged lines hidden (view full) --- 32 * SERVICES, LOSS OF USE, DATA OR PROFITS, HOWEVER CAUSED AND UNDER ANY 33 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 34 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF 35 * THIS SOFTWARE, EVEN IF WHISTLE COMMUNICATIONS IS ADVISED OF THE POSSIBILITY 36 * OF SUCH DAMAGE. 37 */ 38 39#include <sys/cdefs.h> |
40__FBSDID("$FreeBSD: stable/10/sys/dev/ichsmb/ichsmb_pci.c 260352 2014-01-05 22:53:55Z mav $"); | 40__FBSDID("$FreeBSD: stable/10/sys/dev/ichsmb/ichsmb_pci.c 275439 2014-12-03 06:53:49Z mav $"); |
41 42/* 43 * Support for the SMBus controller logical device which is part of the 44 * Intel 81801AA/AB/BA/CA/DC/EB (ICH/ICH[02345]) I/O controller hub chips. 45 */ 46 47#include <sys/param.h> 48#include <sys/systm.h> --- 34 unchanged lines hidden (view full) --- 83#define ID_631xESB 0x269b8086 84#define ID_DH89XXCC 0x23308086 85#define ID_PATSBURG 0x1d228086 86#define ID_CPT 0x1c228086 87#define ID_PPT 0x1e228086 88#define ID_AVOTON 0x1f3c8086 89#define ID_COLETOCRK 0x23B08086 90#define ID_LPT 0x8c228086 | 41 42/* 43 * Support for the SMBus controller logical device which is part of the 44 * Intel 81801AA/AB/BA/CA/DC/EB (ICH/ICH[02345]) I/O controller hub chips. 45 */ 46 47#include <sys/param.h> 48#include <sys/systm.h> --- 34 unchanged lines hidden (view full) --- 83#define ID_631xESB 0x269b8086 84#define ID_DH89XXCC 0x23308086 85#define ID_PATSBURG 0x1d228086 86#define ID_CPT 0x1c228086 87#define ID_PPT 0x1e228086 88#define ID_AVOTON 0x1f3c8086 89#define ID_COLETOCRK 0x23B08086 90#define ID_LPT 0x8c228086 |
91#define ID_WCPT 0x8ca28086 |
|
91 92#define PCIS_SERIALBUS_SMBUS_PROGIF 0x00 93 94/* Internal functions */ 95static int ichsmb_pci_probe(device_t dev); 96static int ichsmb_pci_attach(device_t dev); 97/*Use generic one for now*/ 98#if 0 --- 93 unchanged lines hidden (view full) --- 192 device_set_desc(dev, "Intel Panther Point SMBus controller"); 193 break; 194 case ID_AVOTON: 195 device_set_desc(dev, "Intel Avoton SMBus controller"); 196 break; 197 case ID_LPT: 198 device_set_desc(dev, "Intel Lynx Point SMBus controller"); 199 break; | 92 93#define PCIS_SERIALBUS_SMBUS_PROGIF 0x00 94 95/* Internal functions */ 96static int ichsmb_pci_probe(device_t dev); 97static int ichsmb_pci_attach(device_t dev); 98/*Use generic one for now*/ 99#if 0 --- 93 unchanged lines hidden (view full) --- 193 device_set_desc(dev, "Intel Panther Point SMBus controller"); 194 break; 195 case ID_AVOTON: 196 device_set_desc(dev, "Intel Avoton SMBus controller"); 197 break; 198 case ID_LPT: 199 device_set_desc(dev, "Intel Lynx Point SMBus controller"); 200 break; |
201 case ID_WCPT: 202 device_set_desc(dev, "Intel Wildcat Point SMBus controller"); 203 break; |
|
200 case ID_COLETOCRK: 201 device_set_desc(dev, "Intel Coleto Creek SMBus controller"); 202 break; 203 default: 204 return (ENXIO); 205 } 206 207 /* Done */ --- 56 unchanged lines hidden --- | 204 case ID_COLETOCRK: 205 device_set_desc(dev, "Intel Coleto Creek SMBus controller"); 206 break; 207 default: 208 return (ENXIO); 209 } 210 211 /* Done */ --- 56 unchanged lines hidden --- |