1/*-
2 * Copyright (c) 1999 Kazutaka YOKOTA <yokota@zodiac.mech.utsunomiya-u.ac.jp>
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions
7 * are met:
8 * 1. Redistributions of source code must retain the above copyright
--- 9 unchanged lines hidden (view full) ---
18 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
19 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
20 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
21 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
22 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
23 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
24 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
25 *
26 * $Id: vgareg.h,v 1.1 1999/01/09 02:44:49 yokota Exp $
27 */
28
29#ifndef _DEV_FB_VGAREG_H_
30#define _DEV_FB_VGAREG_H_
31
32/* physical addresses */
33#define MDA_BUF_BASE 0xb0000
34#define MDA_BUF_SIZE 0x08000
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55#define TSREG (IO_VGA + 0x05) /* timing sequencer data */
56#define PIXMASK (IO_VGA + 0x06) /* pixel write mask */
57#define PALRADR (IO_VGA + 0x07) /* palette read address */
58#define PALWADR (IO_VGA + 0x08) /* palette write address */
59#define PALDATA (IO_VGA + 0x09) /* palette data register */
60#define GDCIDX (IO_VGA + 0x0E) /* graph data controller idx */
61#define GDCREG (IO_VGA + 0x0F) /* graph data controller data */
62
63#define VGA_DRIVER_NAME "vga"
64#define VGA_UNIT(dev) minor(dev)
65#define VGA_MKMINOR(unit) (unit)
66
67#ifdef KERNEL
68
69struct video_adapter;
70typedef struct vga_softc {
71 struct video_adapter *adp;
72#ifdef FB_INSTALL_CDEV
73 genfb_softc_t gensc;
74#endif
75} vga_softc_t;
76
77int vga_probe_unit(int unit, struct video_adapter *adp, int flags);
78int vga_attach_unit(int unit, vga_softc_t *sc, int flags);
79
80#ifdef FB_INSTALL_CDEV
81int vga_open(dev_t dev, vga_softc_t *sc, int flag, int mode,
82 struct proc *p);
83int vga_close(dev_t dev, vga_softc_t *sc, int flag, int mode,
84 struct proc *p);
85int vga_read(dev_t dev, vga_softc_t *sc, struct uio *uio, int flag);
86int vga_write(dev_t dev, vga_softc_t *sc, struct uio *uio, int flag);
87int vga_ioctl(dev_t dev, vga_softc_t *sc, u_long cmd, caddr_t arg,
88 int flag, struct proc *p);
89int vga_mmap(dev_t dev, vga_softc_t *sc, vm_offset_t offset,
90 int prot);
91#endif
92
93extern int (*vga_sub_configure)(int flags);
94
95#endif /* KERNEL */
96
97#endif /* _DEV_FB_VGAREG_H_ */
2 * Copyright (c) 1999 Kazutaka YOKOTA <yokota@zodiac.mech.utsunomiya-u.ac.jp>
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions
7 * are met:
8 * 1. Redistributions of source code must retain the above copyright
--- 9 unchanged lines hidden (view full) ---
18 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
19 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
20 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
21 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
22 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
23 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
24 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
25 *
26 * $Id: vgareg.h,v 1.1 1999/01/09 02:44:49 yokota Exp $
27 */
28
29#ifndef _DEV_FB_VGAREG_H_
30#define _DEV_FB_VGAREG_H_
31
32/* physical addresses */
33#define MDA_BUF_BASE 0xb0000
34#define MDA_BUF_SIZE 0x08000
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55#define TSREG (IO_VGA + 0x05) /* timing sequencer data */
56#define PIXMASK (IO_VGA + 0x06) /* pixel write mask */
57#define PALRADR (IO_VGA + 0x07) /* palette read address */
58#define PALWADR (IO_VGA + 0x08) /* palette write address */
59#define PALDATA (IO_VGA + 0x09) /* palette data register */
60#define GDCIDX (IO_VGA + 0x0E) /* graph data controller idx */
61#define GDCREG (IO_VGA + 0x0F) /* graph data controller data */
62
63#define VGA_DRIVER_NAME "vga"
64#define VGA_UNIT(dev) minor(dev)
65#define VGA_MKMINOR(unit) (unit)
66
67#ifdef KERNEL
68
69struct video_adapter;
70typedef struct vga_softc {
71 struct video_adapter *adp;
72#ifdef FB_INSTALL_CDEV
73 genfb_softc_t gensc;
74#endif
75} vga_softc_t;
76
77int vga_probe_unit(int unit, struct video_adapter *adp, int flags);
78int vga_attach_unit(int unit, vga_softc_t *sc, int flags);
79
80#ifdef FB_INSTALL_CDEV
81int vga_open(dev_t dev, vga_softc_t *sc, int flag, int mode,
82 struct proc *p);
83int vga_close(dev_t dev, vga_softc_t *sc, int flag, int mode,
84 struct proc *p);
85int vga_read(dev_t dev, vga_softc_t *sc, struct uio *uio, int flag);
86int vga_write(dev_t dev, vga_softc_t *sc, struct uio *uio, int flag);
87int vga_ioctl(dev_t dev, vga_softc_t *sc, u_long cmd, caddr_t arg,
88 int flag, struct proc *p);
89int vga_mmap(dev_t dev, vga_softc_t *sc, vm_offset_t offset,
90 int prot);
91#endif
92
93extern int (*vga_sub_configure)(int flags);
94
95#endif /* KERNEL */
96
97#endif /* _DEV_FB_VGAREG_H_ */