| if_dcreg.h (226701) | if_dcreg.h (226995) |
|---|---|
| 1/*- 2 * Copyright (c) 1997, 1998, 1999 3 * Bill Paul <wpaul@ee.columbia.edu>. All rights reserved. 4 * 5 * Redistribution and use in source and binary forms, with or without 6 * modification, are permitted provided that the following conditions 7 * are met: 8 * 1. Redistributions of source code must retain the above copyright --- 15 unchanged lines hidden (view full) --- 24 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 25 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 26 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 27 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 28 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 29 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF 30 * THE POSSIBILITY OF SUCH DAMAGE. 31 * | 1/*- 2 * Copyright (c) 1997, 1998, 1999 3 * Bill Paul <wpaul@ee.columbia.edu>. All rights reserved. 4 * 5 * Redistribution and use in source and binary forms, with or without 6 * modification, are permitted provided that the following conditions 7 * are met: 8 * 1. Redistributions of source code must retain the above copyright --- 15 unchanged lines hidden (view full) --- 24 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 25 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 26 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 27 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 28 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 29 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF 30 * THE POSSIBILITY OF SUCH DAMAGE. 31 * |
| 32 * $FreeBSD: head/sys/dev/dc/if_dcreg.h 226701 2011-10-24 20:48:02Z yongari $ | 32 * $FreeBSD: head/sys/dev/dc/if_dcreg.h 226995 2011-11-01 16:13:59Z marius $ |
| 33 */ 34 35/* 36 * 21143 and clone common register definitions. 37 */ 38 39#define DC_BUSCTL 0x00 /* bus control */ 40#define DC_TXSTART 0x08 /* tx start demand */ --- 485 unchanged lines hidden (view full) --- 526 uint8_t dc_reset_len; 527 struct dc_mediainfo *dc_next; 528}; 529 530 531struct dc_type { 532 uint32_t dc_devid; 533 uint8_t dc_minrev; | 33 */ 34 35/* 36 * 21143 and clone common register definitions. 37 */ 38 39#define DC_BUSCTL 0x00 /* bus control */ 40#define DC_TXSTART 0x08 /* tx start demand */ --- 485 unchanged lines hidden (view full) --- 526 uint8_t dc_reset_len; 527 struct dc_mediainfo *dc_next; 528}; 529 530 531struct dc_type { 532 uint32_t dc_devid; 533 uint8_t dc_minrev; |
| 534 char *dc_name; | 534 const char *dc_name; |
| 535}; 536 | 535}; 536 |
| 537struct dc_mii_frame { 538 uint8_t mii_stdelim; 539 uint8_t mii_opcode; 540 uint8_t mii_phyaddr; 541 uint8_t mii_regaddr; 542 uint8_t mii_turnaround; 543 uint16_t mii_data; 544}; 545 | |
| 546/* | 537/* |
| 547 * MII constants 548 */ 549#define DC_MII_STARTDELIM 0x01 550#define DC_MII_READOP 0x02 551#define DC_MII_WRITEOP 0x01 552#define DC_MII_TURNAROUND 0x02 553 554 555/* | |
| 556 * Registers specific to clone devices. 557 * This mainly relates to RX filter programming: not all 21x4x clones 558 * use the standard DEC filter programming mechanism. 559 */ 560 561/* 562 * ADMtek specific registers and constants for the AL981 and AN983. 563 * The AN983 doesn't use the magic PHY registers. --- 258 unchanged lines hidden (view full) --- 822 * register space access macros 823 */ 824#define CSR_WRITE_4(sc, reg, val) \ 825 bus_space_write_4(sc->dc_btag, sc->dc_bhandle, reg, val) 826 827#define CSR_READ_4(sc, reg) \ 828 bus_space_read_4(sc->dc_btag, sc->dc_bhandle, reg) 829 | 538 * Registers specific to clone devices. 539 * This mainly relates to RX filter programming: not all 21x4x clones 540 * use the standard DEC filter programming mechanism. 541 */ 542 543/* 544 * ADMtek specific registers and constants for the AL981 and AN983. 545 * The AN983 doesn't use the magic PHY registers. --- 258 unchanged lines hidden (view full) --- 804 * register space access macros 805 */ 806#define CSR_WRITE_4(sc, reg, val) \ 807 bus_space_write_4(sc->dc_btag, sc->dc_bhandle, reg, val) 808 809#define CSR_READ_4(sc, reg) \ 810 bus_space_read_4(sc->dc_btag, sc->dc_bhandle, reg) 811 |
| 830#define CSR_BARRIER_4(sc, reg, flags) \ | 812#define CSR_BARRIER_4(sc, reg, flags) \ |
| 831 bus_space_barrier(sc->dc_btag, sc->dc_bhandle, reg, 4, flags) 832 833#define DC_TIMEOUT 1000 834 835/* 836 * General constants that are fun to know. 837 */ 838 --- 382 unchanged lines hidden --- | 813 bus_space_barrier(sc->dc_btag, sc->dc_bhandle, reg, 4, flags) 814 815#define DC_TIMEOUT 1000 816 817/* 818 * General constants that are fun to know. 819 */ 820 --- 382 unchanged lines hidden --- |