| coretemp.c (221335) | coretemp.c (221509) |
|---|---|
| 1/*- 2 * Copyright (c) 2007, 2008 Rui Paulo <rpaulo@FreeBSD.org> 3 * All rights reserved. 4 * 5 * Redistribution and use in source and binary forms, with or without 6 * modification, are permitted provided that the following conditions 7 * are met: 8 * 1. Redistributions of source code must retain the above copyright --- 16 unchanged lines hidden (view full) --- 25 */ 26 27/* 28 * Device driver for Intel's On Die thermal sensor via MSR. 29 * First introduced in Intel's Core line of processors. 30 */ 31 32#include <sys/cdefs.h> | 1/*- 2 * Copyright (c) 2007, 2008 Rui Paulo <rpaulo@FreeBSD.org> 3 * All rights reserved. 4 * 5 * Redistribution and use in source and binary forms, with or without 6 * modification, are permitted provided that the following conditions 7 * are met: 8 * 1. Redistributions of source code must retain the above copyright --- 16 unchanged lines hidden (view full) --- 25 */ 26 27/* 28 * Device driver for Intel's On Die thermal sensor via MSR. 29 * First introduced in Intel's Core line of processors. 30 */ 31 32#include <sys/cdefs.h> |
| 33__FBSDID("$FreeBSD: head/sys/dev/coretemp/coretemp.c 221335 2011-05-02 18:41:54Z delphij $"); | 33__FBSDID("$FreeBSD: head/sys/dev/coretemp/coretemp.c 221509 2011-05-05 19:15:15Z delphij $"); |
| 34 35#include <sys/param.h> 36#include <sys/bus.h> 37#include <sys/systm.h> 38#include <sys/types.h> 39#include <sys/module.h> 40#include <sys/conf.h> 41#include <sys/kernel.h> --- 150 unchanged lines hidden (view full) --- 192 } else if (cpu_model == 0x17) { 193 switch (cpu_stepping) { 194 case 0x6: /* Mobile Core 2 Duo */ 195 sc->sc_tjmax = 105; 196 break; 197 default: /* Unknown stepping */ 198 break; 199 } | 34 35#include <sys/param.h> 36#include <sys/bus.h> 37#include <sys/systm.h> 38#include <sys/types.h> 39#include <sys/module.h> 40#include <sys/conf.h> 41#include <sys/kernel.h> --- 150 unchanged lines hidden (view full) --- 192 } else if (cpu_model == 0x17) { 193 switch (cpu_stepping) { 194 case 0x6: /* Mobile Core 2 Duo */ 195 sc->sc_tjmax = 105; 196 break; 197 default: /* Unknown stepping */ 198 break; 199 } |
| 200 } else if (cpu_model == 0x1c) { 201 switch (cpu_stepping) { 202 case 0xa: /* 45nm Atom D400, N400 and D500 series */ 203 sc->sc_tjmax = 100; 204 break; 205 default: 206 sc->sc_tjmax = 90; 207 break; 208 } |
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| 200 } else { 201 /* 202 * Attempt to get Tj(max) from MSR IA32_TEMPERATURE_TARGET. 203 * 204 * This method is described in Intel white paper "CPU 205 * Monitoring With DTS/PECI". (#322683) 206 */ 207 ret = rdmsr_safe(MSR_IA32_TEMPERATURE_TARGET, &msr); --- 130 unchanged lines hidden --- | 209 } else { 210 /* 211 * Attempt to get Tj(max) from MSR IA32_TEMPERATURE_TARGET. 212 * 213 * This method is described in Intel white paper "CPU 214 * Monitoring With DTS/PECI". (#322683) 215 */ 216 ret = rdmsr_safe(MSR_IA32_TEMPERATURE_TARGET, &msr); --- 130 unchanged lines hidden --- |