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bktr_reg.h (25329) bktr_reg.h (29233)
1/*
2 * Copyright (c) 1995 Mark Tinguely and Jim Lowe
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions
7 * are met:
8 * 1. Redistributions of source code must retain the above copyright

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208#define BT848_INT_VPRES (1<<5)
209#define BT848_INT_HLOCK (1<<4)
210#define BT848_INT_OFLOW (1<<3)
211#define BT848_INT_HSYNC (1<<2)
212#define BT848_INT_VSYNC (1<<1)
213#define BT848_INT_FMTCHG (1<<0)
214 int :32; /* 108, 109,10a,10b */
215 BTWORD (gpio_dma_ctl); /* 10c, 10d,10e,10f */
1/*
2 * Copyright (c) 1995 Mark Tinguely and Jim Lowe
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions
7 * are met:
8 * 1. Redistributions of source code must retain the above copyright

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208#define BT848_INT_VPRES (1<<5)
209#define BT848_INT_HLOCK (1<<4)
210#define BT848_INT_OFLOW (1<<3)
211#define BT848_INT_HSYNC (1<<2)
212#define BT848_INT_VSYNC (1<<1)
213#define BT848_INT_FMTCHG (1<<0)
214 int :32; /* 108, 109,10a,10b */
215 BTWORD (gpio_dma_ctl); /* 10c, 10d,10e,10f */
216#define BT848_DMA_CTL_PL23TP4 (0<<6) /* planar1 trigger 4 */
217#define BT848_DMA_CTL_PL23TP8 (1<<6) /* planar1 trigger 8 */
218#define BT848_DMA_CTL_PL23TP16 (2<<6) /* planar1 trigger 16 */
219#define BT848_DMA_CTL_PL23TP32 (3<<6) /* planar1 trigger 32 */
220#define BT848_DMA_CTL_PL1TP4 (0<<4) /* planar1 trigger 4 */
221#define BT848_DMA_CTL_PL1TP8 (1<<4) /* planar1 trigger 8 */
222#define BT848_DMA_CTL_PL1TP16 (2<<4) /* planar1 trigger 16 */
223#define BT848_DMA_CTL_PL1TP32 (3<<4) /* planar1 trigger 32 */
224#define BT848_DMA_CTL_PKTP4 (0<<2) /* packed trigger 4 */
225#define BT848_DMA_CTL_PKTP8 (1<<2) /* packed trigger 8 */
226#define BT848_DMA_CTL_PKTP16 (2<<2) /* packed trigger 16 */
227#define BT848_DMA_CTL_PKTP32 (3<<2) /* packed trigger 32 */
216#define BT848_DMA_CTL_RISC_EN (1<<1)
217#define BT848_DMA_CTL_FIFO_EN (1<<0)
218 BTLONG (i2c_data_ctl); /* 110, 111,112,113 */
219#define BT848_DATA_CTL_I2CDIV (0xf<<4)
220#define BT848_DATA_CTL_I2CSYNC (1<<3)
221#define BT848_DATA_CTL_I2CW3B (1<<2)
222#define BT848_DATA_CTL_I2CSCL (1<<1)
223#define BT848_DATA_CTL_I2CSDA (1<<0)

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325 mute, present */
326};
327
328struct format_params {
329 /* Total lines, lines before image, image lines */
330 int vtotal, vdelay, vactive;
331 /* Total unscaled horizontal pixels, pixels before image, image pixels */
332 int htotal, hdelay, hactive;
228#define BT848_DMA_CTL_RISC_EN (1<<1)
229#define BT848_DMA_CTL_FIFO_EN (1<<0)
230 BTLONG (i2c_data_ctl); /* 110, 111,112,113 */
231#define BT848_DATA_CTL_I2CDIV (0xf<<4)
232#define BT848_DATA_CTL_I2CSYNC (1<<3)
233#define BT848_DATA_CTL_I2CW3B (1<<2)
234#define BT848_DATA_CTL_I2CSCL (1<<1)
235#define BT848_DATA_CTL_I2CSDA (1<<0)

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337 mute, present */
338};
339
340struct format_params {
341 /* Total lines, lines before image, image lines */
342 int vtotal, vdelay, vactive;
343 /* Total unscaled horizontal pixels, pixels before image, image pixels */
344 int htotal, hdelay, hactive;
333 /* One might expect this to be hactive / htotal, but maybe not! */
334 float hactive_frac;
345 /* visible active horizontal and vertical : 480 640 for NTSC */
346 int horizontal, vertical;
347/* frame rate . for ntsc is 30 frames per second */
348 int frame_rate;
335};
336
337
338typedef struct bktr_clip bktr_clip_t;
339/*
340 * BrookTree 848 info structure, one per bt848 card installed.
341 */
342struct bktr_softc {
349};
350
351
352typedef struct bktr_clip bktr_clip_t;
353/*
354 * BrookTree 848 info structure, one per bt848 card installed.
355 */
356struct bktr_softc {
357#ifdef __bsdi__
358 struct device bktr_dev; /* base device */
359 struct isadev bktr_id; /* ISA device */
360 struct intrhand bktr_ih; /* interrupt vectoring */
361#define pcici_t pci_devaddr_t
362#endif
343 bt848_ptr_t base; /* Bt848 register physical address */
344 vm_offset_t phys_base; /* Bt848 register physical address */
345 pcici_t tag; /* PCI tag, for doing PCI commands */
346 vm_offset_t bigbuf; /* buffer that holds the captured image */
347 int alloc_pages; /* number of pages in bigbuf */
348 struct proc *proc; /* process to receive raised signal */
349 int signal; /* signal to send to process */
350#define METEOR_SIG_MODE_MASK 0xffff0000

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366 u_long fifo_errors; /* number of fifo capture errors since open */
367 u_long dma_errors; /* number of DMA capture errors since open */
368 u_long frames_captured;/* number of frames captured since open */
369 u_long even_fields_captured; /* number of even fields captured */
370 u_long odd_fields_captured; /* number of odd fields captured */
371 u_long range_enable; /* enable range checking ?? */
372 u_short capcontrol; /* reg 0xdc capture control */
373 u_short bktr_cap_ctl;
363 bt848_ptr_t base; /* Bt848 register physical address */
364 vm_offset_t phys_base; /* Bt848 register physical address */
365 pcici_t tag; /* PCI tag, for doing PCI commands */
366 vm_offset_t bigbuf; /* buffer that holds the captured image */
367 int alloc_pages; /* number of pages in bigbuf */
368 struct proc *proc; /* process to receive raised signal */
369 int signal; /* signal to send to process */
370#define METEOR_SIG_MODE_MASK 0xffff0000

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386 u_long fifo_errors; /* number of fifo capture errors since open */
387 u_long dma_errors; /* number of DMA capture errors since open */
388 u_long frames_captured;/* number of frames captured since open */
389 u_long even_fields_captured; /* number of even fields captured */
390 u_long odd_fields_captured; /* number of odd fields captured */
391 u_long range_enable; /* enable range checking ?? */
392 u_short capcontrol; /* reg 0xdc capture control */
393 u_short bktr_cap_ctl;
374 unsigned flags;
394 volatile u_int flags;
375#define METEOR_INITALIZED 0x00000001
376#define METEOR_OPEN 0x00000002
377#define METEOR_MMAP 0x00000004
378#define METEOR_INTR 0x00000008
379#define METEOR_READ 0x00000010 /* XXX never gets referenced */
380#define METEOR_SINGLE 0x00000020 /* get single frame */
381#define METEOR_CONTIN 0x00000040 /* continuously get frames */
382#define METEOR_SYNCAP 0x00000080 /* synchronously get frames */

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395#define METEOR_INITALIZED 0x00000001
396#define METEOR_OPEN 0x00000002
397#define METEOR_MMAP 0x00000004
398#define METEOR_INTR 0x00000008
399#define METEOR_READ 0x00000010 /* XXX never gets referenced */
400#define METEOR_SINGLE 0x00000020 /* get single frame */
401#define METEOR_CONTIN 0x00000040 /* continuously get frames */
402#define METEOR_SYNCAP 0x00000080 /* synchronously get frames */

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