1/* $NetBSD: i80321var.h,v 1.8 2003/10/06 16:06:06 thorpej Exp $ */
2
3/*-
4 * Copyright (c) 2002, 2003 Wasabi Systems, Inc.
5 * All rights reserved.
6 *
7 * Written by Jason R. Thorpe for Wasabi Systems, Inc.
8 *
9 * Redistribution and use in source and binary forms, with or without
10 * modification, are permitted provided that the following conditions
11 * are met:
12 * 1. Redistributions of source code must retain the above copyright
13 * notice, this list of conditions and the following disclaimer.
14 * 2. Redistributions in binary form must reproduce the above copyright
15 * notice, this list of conditions and the following disclaimer in the
16 * documentation and/or other materials provided with the distribution.
17 * 3. All advertising materials mentioning features or use of this software
18 * must display the following acknowledgement:
19 * This product includes software developed for the NetBSD Project by
20 * Wasabi Systems, Inc.
21 * 4. The name of Wasabi Systems, Inc. may not be used to endorse
22 * or promote products derived from this software without specific prior
23 * written permission.
24 *
25 * THIS SOFTWARE IS PROVIDED BY WASABI SYSTEMS, INC. ``AS IS'' AND
26 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
27 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
28 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL WASABI SYSTEMS, INC
29 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
30 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
31 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
32 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
33 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
34 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
35 * POSSIBILITY OF SUCH DAMAGE.
36 *
| 1/* $NetBSD: i80321var.h,v 1.8 2003/10/06 16:06:06 thorpej Exp $ */
2
3/*-
4 * Copyright (c) 2002, 2003 Wasabi Systems, Inc.
5 * All rights reserved.
6 *
7 * Written by Jason R. Thorpe for Wasabi Systems, Inc.
8 *
9 * Redistribution and use in source and binary forms, with or without
10 * modification, are permitted provided that the following conditions
11 * are met:
12 * 1. Redistributions of source code must retain the above copyright
13 * notice, this list of conditions and the following disclaimer.
14 * 2. Redistributions in binary form must reproduce the above copyright
15 * notice, this list of conditions and the following disclaimer in the
16 * documentation and/or other materials provided with the distribution.
17 * 3. All advertising materials mentioning features or use of this software
18 * must display the following acknowledgement:
19 * This product includes software developed for the NetBSD Project by
20 * Wasabi Systems, Inc.
21 * 4. The name of Wasabi Systems, Inc. may not be used to endorse
22 * or promote products derived from this software without specific prior
23 * written permission.
24 *
25 * THIS SOFTWARE IS PROVIDED BY WASABI SYSTEMS, INC. ``AS IS'' AND
26 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
27 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
28 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL WASABI SYSTEMS, INC
29 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
30 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
31 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
32 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
33 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
34 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
35 * POSSIBILITY OF SUCH DAMAGE.
36 *
|
38 *
39 */
40
41#ifndef _ARM_XSCALE_I80321VAR_H_
42#define _ARM_XSCALE_I80321VAR_H_
43
44#include <sys/queue.h>
45#include <dev/pci/pcivar.h>
46#include <sys/rman.h>
47
48/*
49 * There are roughly 32 interrupt sources.
50 */
51#define NIRQ 32
52
53extern struct bus_space i80321_bs_tag;
54
55struct i80321_softc {
56 device_t dev;
57 bus_space_tag_t sc_st;
58 bus_space_handle_t sc_sh;
59 /* Handles for the various subregions. */
60 bus_space_handle_t sc_atu_sh;
61 bus_space_handle_t sc_mcu_sh;
62 int sc_is_host;
63
64 /*
65 * We expect the board-specific front-end to have already mapped
66 * the PCI I/O space .. it is only 64K, and I/O mappings tend to
67 * be smaller than a page size, so it's generally more efficient
68 * to map them all into virtual space in one fell swoop.
69 */
70 vm_offset_t sc_iow_vaddr; /* I/O window vaddr */
71
72 /*
73 * Variables that define the Inbound windows. The base address of
74 * 0-2 are configured by a host via BARs. The xlate variable
75 * defines the start of the local address space that it maps to.
76 * The size variable defines the byte size.
77 *
78 * The first 3 windows are for incoming PCI memory read/write
79 * cycles from a host. The 4th window, not configured by the
80 * host (as it outside the normal BAR range) is the inbound
81 * window for PCI devices controlled by the i80321.
82 */
83 struct {
84 uint32_t iwin_base_hi;
85 uint32_t iwin_base_lo;
86 uint32_t iwin_xlate;
87 uint32_t iwin_size;
88 } sc_iwin[4];
89
90 /*
91 * Variables that define the Outbound windows.
92 */
93 struct {
94 uint32_t owin_xlate_lo;
95 uint32_t owin_xlate_hi;
96 } sc_owin[2];
97
98 /*
99 * This is the PCI address that the Outbound I/O
100 * window maps to.
101 */
102 uint32_t sc_ioout_xlate;
103
104 /* Bus space, DMA, and PCI tags for the PCI bus (private devices). */
105 struct bus_space sc_pci_iot;
106 struct bus_space sc_pci_memt;
107
108 /* GPIO state */
109 uint8_t sc_gpio_dir; /* GPIO pin direction (1 == output) */
110 uint8_t sc_gpio_val; /* GPIO output pin value */
111 struct rman sc_irq_rman;
112
113};
| 38 *
39 */
40
41#ifndef _ARM_XSCALE_I80321VAR_H_
42#define _ARM_XSCALE_I80321VAR_H_
43
44#include <sys/queue.h>
45#include <dev/pci/pcivar.h>
46#include <sys/rman.h>
47
48/*
49 * There are roughly 32 interrupt sources.
50 */
51#define NIRQ 32
52
53extern struct bus_space i80321_bs_tag;
54
55struct i80321_softc {
56 device_t dev;
57 bus_space_tag_t sc_st;
58 bus_space_handle_t sc_sh;
59 /* Handles for the various subregions. */
60 bus_space_handle_t sc_atu_sh;
61 bus_space_handle_t sc_mcu_sh;
62 int sc_is_host;
63
64 /*
65 * We expect the board-specific front-end to have already mapped
66 * the PCI I/O space .. it is only 64K, and I/O mappings tend to
67 * be smaller than a page size, so it's generally more efficient
68 * to map them all into virtual space in one fell swoop.
69 */
70 vm_offset_t sc_iow_vaddr; /* I/O window vaddr */
71
72 /*
73 * Variables that define the Inbound windows. The base address of
74 * 0-2 are configured by a host via BARs. The xlate variable
75 * defines the start of the local address space that it maps to.
76 * The size variable defines the byte size.
77 *
78 * The first 3 windows are for incoming PCI memory read/write
79 * cycles from a host. The 4th window, not configured by the
80 * host (as it outside the normal BAR range) is the inbound
81 * window for PCI devices controlled by the i80321.
82 */
83 struct {
84 uint32_t iwin_base_hi;
85 uint32_t iwin_base_lo;
86 uint32_t iwin_xlate;
87 uint32_t iwin_size;
88 } sc_iwin[4];
89
90 /*
91 * Variables that define the Outbound windows.
92 */
93 struct {
94 uint32_t owin_xlate_lo;
95 uint32_t owin_xlate_hi;
96 } sc_owin[2];
97
98 /*
99 * This is the PCI address that the Outbound I/O
100 * window maps to.
101 */
102 uint32_t sc_ioout_xlate;
103
104 /* Bus space, DMA, and PCI tags for the PCI bus (private devices). */
105 struct bus_space sc_pci_iot;
106 struct bus_space sc_pci_memt;
107
108 /* GPIO state */
109 uint8_t sc_gpio_dir; /* GPIO pin direction (1 == output) */
110 uint8_t sc_gpio_val; /* GPIO output pin value */
111 struct rman sc_irq_rman;
112
113};
|
114void i80321_sdram_bounds(bus_space_tag_t, bus_space_handle_t,
115 vm_paddr_t *, vm_size_t *);
116
117void i80321_attach(struct i80321_softc *);
118void i80321_calibrate_delay(void);
119
120void i80321_bs_init(bus_space_tag_t, void *);
121void i80321_io_bs_init(bus_space_tag_t, void *);
122void i80321_mem_bs_init(bus_space_tag_t, void *);
| 130void i80321_sdram_bounds(bus_space_tag_t, bus_space_handle_t,
131 vm_paddr_t *, vm_size_t *);
132
133void i80321_attach(struct i80321_softc *);
134void i80321_calibrate_delay(void);
135
136void i80321_bs_init(bus_space_tag_t, void *);
137void i80321_io_bs_init(bus_space_tag_t, void *);
138void i80321_mem_bs_init(bus_space_tag_t, void *);
|