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dt_cg.c (178576) dt_cg.c (249367)
1/*
2 * CDDL HEADER START
3 *
4 * The contents of this file are subject to the terms of the
5 * Common Development and Distribution License, Version 1.0 only
6 * (the "License"). You may not use this file except in compliance
7 * with the License.
8 *

--- 5 unchanged lines hidden (view full) ---

14 * When distributing Covered Code, include this CDDL HEADER in each
15 * file and include the License file at usr/src/OPENSOLARIS.LICENSE.
16 * If applicable, add the following below this CDDL HEADER, with the
17 * fields enclosed by brackets "[]" replaced with your own identifying
18 * information: Portions Copyright [yyyy] [name of copyright owner]
19 *
20 * CDDL HEADER END
21 */
1/*
2 * CDDL HEADER START
3 *
4 * The contents of this file are subject to the terms of the
5 * Common Development and Distribution License, Version 1.0 only
6 * (the "License"). You may not use this file except in compliance
7 * with the License.
8 *

--- 5 unchanged lines hidden (view full) ---

14 * When distributing Covered Code, include this CDDL HEADER in each
15 * file and include the License file at usr/src/OPENSOLARIS.LICENSE.
16 * If applicable, add the following below this CDDL HEADER, with the
17 * fields enclosed by brackets "[]" replaced with your own identifying
18 * information: Portions Copyright [yyyy] [name of copyright owner]
19 *
20 * CDDL HEADER END
21 */
22
22/*
23 * Copyright 2005 Sun Microsystems, Inc. All rights reserved.
24 * Use is subject to license terms.
25 */
26
23/*
24 * Copyright 2005 Sun Microsystems, Inc. All rights reserved.
25 * Use is subject to license terms.
26 */
27
27#pragma ident "%Z%%M% %I% %E% SMI"
28/*
29 * Copyright (c) 2012 by Delphix. All rights reserved.
30 */
28
29#include <sys/types.h>
30#include <sys/sysmacros.h>
31#include <sys/isa_defs.h>
32
33#include <strings.h>
34#include <stdlib.h>
35#include <setjmp.h>

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188 ctf_file_t *ctfp = dnp->dn_ctfp;
189 ctf_arinfo_t r;
190 dif_instr_t instr;
191 ctf_id_t type;
192 uint_t kind;
193 ssize_t size;
194 int sreg;
195
31
32#include <sys/types.h>
33#include <sys/sysmacros.h>
34#include <sys/isa_defs.h>
35
36#include <strings.h>
37#include <stdlib.h>
38#include <setjmp.h>

--- 152 unchanged lines hidden (view full) ---

191 ctf_file_t *ctfp = dnp->dn_ctfp;
192 ctf_arinfo_t r;
193 dif_instr_t instr;
194 ctf_id_t type;
195 uint_t kind;
196 ssize_t size;
197 int sreg;
198
196 if ((sreg = dt_regset_alloc(drp)) == -1)
197 longjmp(yypcb->pcb_jmpbuf, EDT_NOREG);
198
199 type = ctf_type_resolve(ctfp, dnp->dn_type);
200 kind = ctf_type_kind(ctfp, type);
201 assert(kind == CTF_K_POINTER || kind == CTF_K_ARRAY);
202
203 if (kind == CTF_K_ARRAY) {
204 if (ctf_array_info(ctfp, type, &r) != 0) {
205 yypcb->pcb_hdl->dt_ctferr = ctf_errno(ctfp);
206 longjmp(yypcb->pcb_jmpbuf, EDT_CTF);
207 }
208 type = r.ctr_contents;
209 } else
210 type = ctf_type_reference(ctfp, type);
211
212 if ((size = ctf_type_size(ctfp, type)) == 1)
213 return; /* multiply or divide by one can be omitted */
214
199 type = ctf_type_resolve(ctfp, dnp->dn_type);
200 kind = ctf_type_kind(ctfp, type);
201 assert(kind == CTF_K_POINTER || kind == CTF_K_ARRAY);
202
203 if (kind == CTF_K_ARRAY) {
204 if (ctf_array_info(ctfp, type, &r) != 0) {
205 yypcb->pcb_hdl->dt_ctferr = ctf_errno(ctfp);
206 longjmp(yypcb->pcb_jmpbuf, EDT_CTF);
207 }
208 type = r.ctr_contents;
209 } else
210 type = ctf_type_reference(ctfp, type);
211
212 if ((size = ctf_type_size(ctfp, type)) == 1)
213 return; /* multiply or divide by one can be omitted */
214
215 sreg = dt_regset_alloc(drp);
215 dt_cg_setx(dlp, sreg, size);
216 instr = DIF_INSTR_FMT(op, dreg, sreg, dreg);
217 dt_irlist_append(dlp, dt_cg_node_alloc(DT_LBL_NONE, instr));
218 dt_regset_free(drp, sreg);
219}
220
221/*
222 * If the result of a "." or "->" operation is a bit-field, we use this routine

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246
247 if (ctf_type_encoding(fp, mp->ctm_type, &e) != 0 || e.cte_bits > 64) {
248 xyerror(D_UNKNOWN, "cg: bad field: off %lu type <%ld> "
249 "bits %u\n", mp->ctm_offset, mp->ctm_type, e.cte_bits);
250 }
251
252 assert(dnp->dn_op == DT_TOK_PTR || dnp->dn_op == DT_TOK_DOT);
253 r1 = dnp->dn_left->dn_reg;
216 dt_cg_setx(dlp, sreg, size);
217 instr = DIF_INSTR_FMT(op, dreg, sreg, dreg);
218 dt_irlist_append(dlp, dt_cg_node_alloc(DT_LBL_NONE, instr));
219 dt_regset_free(drp, sreg);
220}
221
222/*
223 * If the result of a "." or "->" operation is a bit-field, we use this routine

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247
248 if (ctf_type_encoding(fp, mp->ctm_type, &e) != 0 || e.cte_bits > 64) {
249 xyerror(D_UNKNOWN, "cg: bad field: off %lu type <%ld> "
250 "bits %u\n", mp->ctm_offset, mp->ctm_type, e.cte_bits);
251 }
252
253 assert(dnp->dn_op == DT_TOK_PTR || dnp->dn_op == DT_TOK_DOT);
254 r1 = dnp->dn_left->dn_reg;
255 r2 = dt_regset_alloc(drp);
254
256
255 if ((r2 = dt_regset_alloc(drp)) == -1)
256 longjmp(yypcb->pcb_jmpbuf, EDT_NOREG);
257
258 /*
259 * On little-endian architectures, ctm_offset counts from the right so
260 * ctm_offset % NBBY itself is the amount we want to shift right to
261 * move the value bits to the little end of the register to mask them.
262 * On big-endian architectures, ctm_offset counts from the left so we
263 * must subtract (ctm_offset % NBBY + cte_bits) from the size in bits
264 * we used for the load. The size of our load in turn is found by
265 * rounding cte_bits up to a byte boundary and then finding the

--- 85 unchanged lines hidden (view full) ---

351 longjmp(yypcb->pcb_jmpbuf, EDT_CTF);
352 }
353
354 if (ctf_type_encoding(fp, m.ctm_type, &e) != 0 || e.cte_bits > 64) {
355 xyerror(D_UNKNOWN, "cg: bad field: off %lu type <%ld> "
356 "bits %u\n", m.ctm_offset, m.ctm_type, e.cte_bits);
357 }
358
257 /*
258 * On little-endian architectures, ctm_offset counts from the right so
259 * ctm_offset % NBBY itself is the amount we want to shift right to
260 * move the value bits to the little end of the register to mask them.
261 * On big-endian architectures, ctm_offset counts from the left so we
262 * must subtract (ctm_offset % NBBY + cte_bits) from the size in bits
263 * we used for the load. The size of our load in turn is found by
264 * rounding cte_bits up to a byte boundary and then finding the

--- 85 unchanged lines hidden (view full) ---

350 longjmp(yypcb->pcb_jmpbuf, EDT_CTF);
351 }
352
353 if (ctf_type_encoding(fp, m.ctm_type, &e) != 0 || e.cte_bits > 64) {
354 xyerror(D_UNKNOWN, "cg: bad field: off %lu type <%ld> "
355 "bits %u\n", m.ctm_offset, m.ctm_type, e.cte_bits);
356 }
357
359 if ((r1 = dt_regset_alloc(drp)) == -1 ||
360 (r2 = dt_regset_alloc(drp)) == -1 ||
361 (r3 = dt_regset_alloc(drp)) == -1)
362 longjmp(yypcb->pcb_jmpbuf, EDT_NOREG);
358 r1 = dt_regset_alloc(drp);
359 r2 = dt_regset_alloc(drp);
360 r3 = dt_regset_alloc(drp);
363
364 /*
365 * Compute shifts and masks. We need to compute "shift" as the amount
366 * we need to shift left to position our field in the containing word.
367 * Refer to the comments in dt_cg_field_get(), above, for more info.
368 * We then compute fmask as the mask that truncates the value in the
369 * input register to width cte_bits, and cmask as the mask used to
370 * pass through the containing bits and zero the field bits.

--- 47 unchanged lines hidden (view full) ---

418 */
419 if ((dst->dn_flags & DT_NF_BITFIELD) &&
420 ctf_type_encoding(dst->dn_ctfp, dst->dn_type, &e) != CTF_ERR)
421 size = clp2(P2ROUNDUP(e.cte_bits, NBBY) / NBBY);
422 else
423 size = dt_node_type_size(src);
424
425 if (src->dn_flags & DT_NF_REF) {
361
362 /*
363 * Compute shifts and masks. We need to compute "shift" as the amount
364 * we need to shift left to position our field in the containing word.
365 * Refer to the comments in dt_cg_field_get(), above, for more info.
366 * We then compute fmask as the mask that truncates the value in the
367 * input register to width cte_bits, and cmask as the mask used to
368 * pass through the containing bits and zero the field bits.

--- 47 unchanged lines hidden (view full) ---

416 */
417 if ((dst->dn_flags & DT_NF_BITFIELD) &&
418 ctf_type_encoding(dst->dn_ctfp, dst->dn_type, &e) != CTF_ERR)
419 size = clp2(P2ROUNDUP(e.cte_bits, NBBY) / NBBY);
420 else
421 size = dt_node_type_size(src);
422
423 if (src->dn_flags & DT_NF_REF) {
426 if ((reg = dt_regset_alloc(drp)) == -1)
427 longjmp(yypcb->pcb_jmpbuf, EDT_NOREG);
424 reg = dt_regset_alloc(drp);
428 dt_cg_setx(dlp, reg, size);
429 instr = DIF_INSTR_COPYS(src->dn_reg, reg, dst->dn_reg);
430 dt_irlist_append(dlp, dt_cg_node_alloc(DT_LBL_NONE, instr));
431 dt_regset_free(drp, reg);
432 } else {
433 if (dst->dn_flags & DT_NF_BITFIELD)
434 reg = dt_cg_field_set(src, dlp, drp, dst);
435 else

--- 33 unchanged lines hidden (view full) ---

469static void
470dt_cg_typecast(const dt_node_t *src, const dt_node_t *dst,
471 dt_irlist_t *dlp, dt_regset_t *drp)
472{
473 size_t srcsize = dt_node_type_size(src);
474 size_t dstsize = dt_node_type_size(dst);
475
476 dif_instr_t instr;
425 dt_cg_setx(dlp, reg, size);
426 instr = DIF_INSTR_COPYS(src->dn_reg, reg, dst->dn_reg);
427 dt_irlist_append(dlp, dt_cg_node_alloc(DT_LBL_NONE, instr));
428 dt_regset_free(drp, reg);
429 } else {
430 if (dst->dn_flags & DT_NF_BITFIELD)
431 reg = dt_cg_field_set(src, dlp, drp, dst);
432 else

--- 33 unchanged lines hidden (view full) ---

466static void
467dt_cg_typecast(const dt_node_t *src, const dt_node_t *dst,
468 dt_irlist_t *dlp, dt_regset_t *drp)
469{
470 size_t srcsize = dt_node_type_size(src);
471 size_t dstsize = dt_node_type_size(dst);
472
473 dif_instr_t instr;
477 int reg, n;
474 int rg;
478
475
479 if (dt_node_is_scalar(dst) && (dstsize < srcsize ||
480 (src->dn_flags & DT_NF_SIGNED) ^ (dst->dn_flags & DT_NF_SIGNED))) {
481 if ((reg = dt_regset_alloc(drp)) == -1)
482 longjmp(yypcb->pcb_jmpbuf, EDT_NOREG);
476 if (!dt_node_is_scalar(dst))
477 return; /* not a scalar */
478 if (dstsize == srcsize &&
479 ((src->dn_flags ^ dst->dn_flags) & DT_NF_SIGNED) != 0)
480 return; /* not narrowing or changing signed-ness */
481 if (dstsize > srcsize && (src->dn_flags & DT_NF_SIGNED) == 0)
482 return; /* nothing to do in this case */
483
483
484 if (dstsize < srcsize)
485 n = sizeof (uint64_t) * NBBY - dstsize * NBBY;
486 else
487 n = sizeof (uint64_t) * NBBY - srcsize * NBBY;
484 rg = dt_regset_alloc(drp);
488
485
489 dt_cg_setx(dlp, reg, n);
486 if (dstsize > srcsize) {
487 int n = sizeof (uint64_t) * NBBY - srcsize * NBBY;
488 int s = (dstsize - srcsize) * NBBY;
490
489
491 instr = DIF_INSTR_FMT(DIF_OP_SLL,
492 src->dn_reg, reg, dst->dn_reg);
490 dt_cg_setx(dlp, rg, n);
491
492 instr = DIF_INSTR_FMT(DIF_OP_SLL, src->dn_reg, rg, dst->dn_reg);
493 dt_irlist_append(dlp, dt_cg_node_alloc(DT_LBL_NONE, instr));
494
493 dt_irlist_append(dlp, dt_cg_node_alloc(DT_LBL_NONE, instr));
494
495 instr = DIF_INSTR_FMT((dst->dn_flags & DT_NF_SIGNED) ?
496 DIF_OP_SRA : DIF_OP_SRL, dst->dn_reg, reg, dst->dn_reg);
495 if ((dst->dn_flags & DT_NF_SIGNED) || n == s) {
496 instr = DIF_INSTR_FMT(DIF_OP_SRA,
497 dst->dn_reg, rg, dst->dn_reg);
498 dt_irlist_append(dlp,
499 dt_cg_node_alloc(DT_LBL_NONE, instr));
500 } else {
501 dt_cg_setx(dlp, rg, s);
502 instr = DIF_INSTR_FMT(DIF_OP_SRA,
503 dst->dn_reg, rg, dst->dn_reg);
504 dt_irlist_append(dlp,
505 dt_cg_node_alloc(DT_LBL_NONE, instr));
506 dt_cg_setx(dlp, rg, n - s);
507 instr = DIF_INSTR_FMT(DIF_OP_SRL,
508 dst->dn_reg, rg, dst->dn_reg);
509 dt_irlist_append(dlp,
510 dt_cg_node_alloc(DT_LBL_NONE, instr));
511 }
512 } else if (dstsize != sizeof (uint64_t)) {
513 int n = sizeof (uint64_t) * NBBY - dstsize * NBBY;
497
514
515 dt_cg_setx(dlp, rg, n);
516
517 instr = DIF_INSTR_FMT(DIF_OP_SLL, src->dn_reg, rg, dst->dn_reg);
498 dt_irlist_append(dlp, dt_cg_node_alloc(DT_LBL_NONE, instr));
518 dt_irlist_append(dlp, dt_cg_node_alloc(DT_LBL_NONE, instr));
499 dt_regset_free(drp, reg);
519
520 instr = DIF_INSTR_FMT((dst->dn_flags & DT_NF_SIGNED) ?
521 DIF_OP_SRA : DIF_OP_SRL, dst->dn_reg, rg, dst->dn_reg);
522 dt_irlist_append(dlp, dt_cg_node_alloc(DT_LBL_NONE, instr));
500 }
523 }
524
525 dt_regset_free(drp, rg);
501}
502
503/*
504 * Generate code to push the specified argument list on to the tuple stack.
505 * We use this routine for handling subroutine calls and associative arrays.
506 * We must first generate code for all subexpressions before loading the stack
507 * because any subexpression could itself require the use of the tuple stack.
508 * This holds a number of registers equal to the number of arguments, but this

--- 9 unchanged lines hidden (view full) ---

518{
519 const dt_idsig_t *isp = idp->di_data;
520 dt_node_t *dnp;
521 int i = 0;
522
523 for (dnp = args; dnp != NULL; dnp = dnp->dn_list)
524 dt_cg_node(dnp, dlp, drp);
525
526}
527
528/*
529 * Generate code to push the specified argument list on to the tuple stack.
530 * We use this routine for handling subroutine calls and associative arrays.
531 * We must first generate code for all subexpressions before loading the stack
532 * because any subexpression could itself require the use of the tuple stack.
533 * This holds a number of registers equal to the number of arguments, but this

--- 9 unchanged lines hidden (view full) ---

543{
544 const dt_idsig_t *isp = idp->di_data;
545 dt_node_t *dnp;
546 int i = 0;
547
548 for (dnp = args; dnp != NULL; dnp = dnp->dn_list)
549 dt_cg_node(dnp, dlp, drp);
550
526 dt_irlist_append(dlp,
527 dt_cg_node_alloc(DT_LBL_NONE, DIF_INSTR_FLUSHTS));
551 dt_irlist_append(dlp, dt_cg_node_alloc(DT_LBL_NONE, DIF_INSTR_FLUSHTS));
528
529 for (dnp = args; dnp != NULL; dnp = dnp->dn_list, i++) {
530 dtrace_diftype_t t;
531 dif_instr_t instr;
532 uint_t op;
533 int reg;
534
535 dt_node_diftype(yypcb->pcb_hdl, dnp, &t);
536
537 isp->dis_args[i].dn_reg = dnp->dn_reg; /* re-use register */
538 dt_cg_typecast(dnp, &isp->dis_args[i], dlp, drp);
539 isp->dis_args[i].dn_reg = -1;
540
552
553 for (dnp = args; dnp != NULL; dnp = dnp->dn_list, i++) {
554 dtrace_diftype_t t;
555 dif_instr_t instr;
556 uint_t op;
557 int reg;
558
559 dt_node_diftype(yypcb->pcb_hdl, dnp, &t);
560
561 isp->dis_args[i].dn_reg = dnp->dn_reg; /* re-use register */
562 dt_cg_typecast(dnp, &isp->dis_args[i], dlp, drp);
563 isp->dis_args[i].dn_reg = -1;
564
541 if (t.dtdt_flags & DIF_TF_BYREF)
565 if (t.dtdt_flags & DIF_TF_BYREF) {
542 op = DIF_OP_PUSHTR;
566 op = DIF_OP_PUSHTR;
543 else
567 if (t.dtdt_size != 0) {
568 reg = dt_regset_alloc(drp);
569 dt_cg_setx(dlp, reg, t.dtdt_size);
570 } else {
571 reg = DIF_REG_R0;
572 }
573 } else {
544 op = DIF_OP_PUSHTV;
574 op = DIF_OP_PUSHTV;
545
546 if (t.dtdt_size != 0) {
547 if ((reg = dt_regset_alloc(drp)) == -1)
548 longjmp(yypcb->pcb_jmpbuf, EDT_NOREG);
549 dt_cg_setx(dlp, reg, t.dtdt_size);
550 } else
551 reg = DIF_REG_R0;
575 reg = DIF_REG_R0;
576 }
552
553 instr = DIF_INSTR_PUSHTS(op, t.dtdt_kind, reg, dnp->dn_reg);
554 dt_irlist_append(dlp, dt_cg_node_alloc(DT_LBL_NONE, instr));
555 dt_regset_free(drp, dnp->dn_reg);
556
557 if (reg != DIF_REG_R0)
558 dt_regset_free(drp, reg);
559 }

--- 64 unchanged lines hidden (view full) ---

624 type = ctf_type_resolve(ctfp, dnp->dn_type);
625 assert(ctf_type_kind(ctfp, type) == CTF_K_POINTER);
626 size = ctf_type_size(ctfp, ctf_type_reference(ctfp, type));
627 }
628
629 dt_cg_node(dnp->dn_child, dlp, drp);
630 dnp->dn_reg = dnp->dn_child->dn_reg;
631
577
578 instr = DIF_INSTR_PUSHTS(op, t.dtdt_kind, reg, dnp->dn_reg);
579 dt_irlist_append(dlp, dt_cg_node_alloc(DT_LBL_NONE, instr));
580 dt_regset_free(drp, dnp->dn_reg);
581
582 if (reg != DIF_REG_R0)
583 dt_regset_free(drp, reg);
584 }

--- 64 unchanged lines hidden (view full) ---

649 type = ctf_type_resolve(ctfp, dnp->dn_type);
650 assert(ctf_type_kind(ctfp, type) == CTF_K_POINTER);
651 size = ctf_type_size(ctfp, ctf_type_reference(ctfp, type));
652 }
653
654 dt_cg_node(dnp->dn_child, dlp, drp);
655 dnp->dn_reg = dnp->dn_child->dn_reg;
656
632 if ((reg = dt_regset_alloc(drp)) == -1)
633 longjmp(yypcb->pcb_jmpbuf, EDT_NOREG);
634
657 reg = dt_regset_alloc(drp);
635 dt_cg_setx(dlp, reg, size);
636
637 instr = DIF_INSTR_FMT(op, dnp->dn_reg, reg, dnp->dn_reg);
638 dt_irlist_append(dlp, dt_cg_node_alloc(DT_LBL_NONE, instr));
639 dt_regset_free(drp, reg);
640
641 /*
642 * If we are modifying a variable, generate an stv instruction from

--- 40 unchanged lines hidden (view full) ---

683 type = ctf_type_resolve(ctfp, dnp->dn_type);
684 assert(ctf_type_kind(ctfp, type) == CTF_K_POINTER);
685 size = ctf_type_size(ctfp, ctf_type_reference(ctfp, type));
686 }
687
688 dt_cg_node(dnp->dn_child, dlp, drp);
689 dnp->dn_reg = dnp->dn_child->dn_reg;
690
658 dt_cg_setx(dlp, reg, size);
659
660 instr = DIF_INSTR_FMT(op, dnp->dn_reg, reg, dnp->dn_reg);
661 dt_irlist_append(dlp, dt_cg_node_alloc(DT_LBL_NONE, instr));
662 dt_regset_free(drp, reg);
663
664 /*
665 * If we are modifying a variable, generate an stv instruction from

--- 40 unchanged lines hidden (view full) ---

706 type = ctf_type_resolve(ctfp, dnp->dn_type);
707 assert(ctf_type_kind(ctfp, type) == CTF_K_POINTER);
708 size = ctf_type_size(ctfp, ctf_type_reference(ctfp, type));
709 }
710
711 dt_cg_node(dnp->dn_child, dlp, drp);
712 dnp->dn_reg = dnp->dn_child->dn_reg;
713
691 if ((nreg = dt_regset_alloc(drp)) == -1)
692 longjmp(yypcb->pcb_jmpbuf, EDT_NOREG);
693
714 nreg = dt_regset_alloc(drp);
694 dt_cg_setx(dlp, nreg, size);
695 instr = DIF_INSTR_FMT(op, dnp->dn_reg, nreg, nreg);
696 dt_irlist_append(dlp, dt_cg_node_alloc(DT_LBL_NONE, instr));
697
698 /*
699 * If we are modifying a variable, generate an stv instruction from
700 * the variable specified by the identifier. If we are storing to a
701 * memory address, generate code again for the left-hand side using

--- 301 unchanged lines hidden (view full) ---

1003 mn.dn_kind = DT_NODE_IDENT;
1004 mn.dn_op = DT_TOK_IDENT;
1005
1006 /*
1007 * Allocate a register for our scratch data pointer. First we
1008 * set it to the size of our data structure, and then replace
1009 * it with the result of an allocs of the specified size.
1010 */
715 dt_cg_setx(dlp, nreg, size);
716 instr = DIF_INSTR_FMT(op, dnp->dn_reg, nreg, nreg);
717 dt_irlist_append(dlp, dt_cg_node_alloc(DT_LBL_NONE, instr));
718
719 /*
720 * If we are modifying a variable, generate an stv instruction from
721 * the variable specified by the identifier. If we are storing to a
722 * memory address, generate code again for the left-hand side using

--- 301 unchanged lines hidden (view full) ---

1024 mn.dn_kind = DT_NODE_IDENT;
1025 mn.dn_op = DT_TOK_IDENT;
1026
1027 /*
1028 * Allocate a register for our scratch data pointer. First we
1029 * set it to the size of our data structure, and then replace
1030 * it with the result of an allocs of the specified size.
1031 */
1011 if ((r1 = dt_regset_alloc(drp)) == -1)
1012 longjmp(yypcb->pcb_jmpbuf, EDT_NOREG);
1013
1032 r1 = dt_regset_alloc(drp);
1014 dt_cg_setx(dlp, r1,
1015 ctf_type_size(dxp->dx_dst_ctfp, dxp->dx_dst_base));
1016
1017 instr = DIF_INSTR_ALLOCS(r1, r1);
1018 dt_irlist_append(dlp, dt_cg_node_alloc(DT_LBL_NONE, instr));
1019
1020 /*
1021 * When dt_cg_asgn_op() is called, we have already generated

--- 27 unchanged lines hidden (view full) ---

1049
1050 /*
1051 * If the destination member is at offset 0, store the
1052 * result directly to r1 (the scratch buffer address).
1053 * Otherwise allocate another temporary for the offset
1054 * and add r1 to it before storing the result.
1055 */
1056 if (ctm.ctm_offset != 0) {
1033 dt_cg_setx(dlp, r1,
1034 ctf_type_size(dxp->dx_dst_ctfp, dxp->dx_dst_base));
1035
1036 instr = DIF_INSTR_ALLOCS(r1, r1);
1037 dt_irlist_append(dlp, dt_cg_node_alloc(DT_LBL_NONE, instr));
1038
1039 /*
1040 * When dt_cg_asgn_op() is called, we have already generated

--- 27 unchanged lines hidden (view full) ---

1068
1069 /*
1070 * If the destination member is at offset 0, store the
1071 * result directly to r1 (the scratch buffer address).
1072 * Otherwise allocate another temporary for the offset
1073 * and add r1 to it before storing the result.
1074 */
1075 if (ctm.ctm_offset != 0) {
1057 if ((r2 = dt_regset_alloc(drp)) == -1)
1058 longjmp(yypcb->pcb_jmpbuf, EDT_NOREG);
1076 r2 = dt_regset_alloc(drp);
1059
1060 /*
1061 * Add the member offset rounded down to the
1062 * nearest byte. If the offset was not aligned
1063 * on a byte boundary, this member is a bit-
1064 * field and dt_cg_store() will handle masking.
1065 */
1066 dt_cg_setx(dlp, r2, ctm.ctm_offset / NBBY);

--- 70 unchanged lines hidden (view full) ---

1137 uint_t op;
1138
1139 assert(dnp->dn_kind == DT_NODE_VAR);
1140 assert(!(dnp->dn_ident->di_flags & DT_IDFLG_LOCAL));
1141 assert(dnp->dn_args != NULL);
1142
1143 dt_cg_arglist(dnp->dn_ident, dnp->dn_args, dlp, drp);
1144
1077
1078 /*
1079 * Add the member offset rounded down to the
1080 * nearest byte. If the offset was not aligned
1081 * on a byte boundary, this member is a bit-
1082 * field and dt_cg_store() will handle masking.
1083 */
1084 dt_cg_setx(dlp, r2, ctm.ctm_offset / NBBY);

--- 70 unchanged lines hidden (view full) ---

1155 uint_t op;
1156
1157 assert(dnp->dn_kind == DT_NODE_VAR);
1158 assert(!(dnp->dn_ident->di_flags & DT_IDFLG_LOCAL));
1159 assert(dnp->dn_args != NULL);
1160
1161 dt_cg_arglist(dnp->dn_ident, dnp->dn_args, dlp, drp);
1162
1145 if ((dnp->dn_reg = dt_regset_alloc(drp)) == -1)
1146 longjmp(yypcb->pcb_jmpbuf, EDT_NOREG);
1163 dnp->dn_reg = dt_regset_alloc(drp);
1147
1148 if (dnp->dn_ident->di_flags & DT_IDFLG_TLS)
1149 op = DIF_OP_LDTAA;
1150 else
1151 op = DIF_OP_LDGAA;
1152
1153 dnp->dn_ident->di_flags |= DT_IDFLG_DIFR;
1154 instr = DIF_INSTR_LDV(op, dnp->dn_ident->di_id, dnp->dn_reg);

--- 113 unchanged lines hidden (view full) ---

1268 * (and it some cases, likely) that the upper bits will be garbage.
1269 */
1270 if (idp->di_id != DIF_VAR_ARGS || !dt_node_is_scalar(dnp))
1271 return;
1272
1273 if ((size = dt_node_type_size(dnp)) == sizeof (uint64_t))
1274 return;
1275
1164
1165 if (dnp->dn_ident->di_flags & DT_IDFLG_TLS)
1166 op = DIF_OP_LDTAA;
1167 else
1168 op = DIF_OP_LDGAA;
1169
1170 dnp->dn_ident->di_flags |= DT_IDFLG_DIFR;
1171 instr = DIF_INSTR_LDV(op, dnp->dn_ident->di_id, dnp->dn_reg);

--- 113 unchanged lines hidden (view full) ---

1285 * (and it some cases, likely) that the upper bits will be garbage.
1286 */
1287 if (idp->di_id != DIF_VAR_ARGS || !dt_node_is_scalar(dnp))
1288 return;
1289
1290 if ((size = dt_node_type_size(dnp)) == sizeof (uint64_t))
1291 return;
1292
1276 if ((reg = dt_regset_alloc(drp)) == -1)
1277 longjmp(yypcb->pcb_jmpbuf, EDT_NOREG);
1278
1293 reg = dt_regset_alloc(drp);
1279 assert(size < sizeof (uint64_t));
1280 n = sizeof (uint64_t) * NBBY - size * NBBY;
1281
1282 dt_cg_setx(dlp, reg, n);
1283
1284 instr = DIF_INSTR_FMT(DIF_OP_SLL, dnp->dn_reg, reg, dnp->dn_reg);
1285 dt_irlist_append(dlp, dt_cg_node_alloc(DT_LBL_NONE, instr));
1286

--- 80 unchanged lines hidden (view full) ---

1367 strp->dn_string = strdup(buf);
1368
1369 if (dtrace_lookup_by_type(dtp, DTRACE_OBJ_EVERY, buf, &dtt) < 0)
1370 return;
1371
1372 typs->dn_value = ctf_type_size(dtt.dtt_ctfp, dtt.dtt_type);
1373}
1374
1294 assert(size < sizeof (uint64_t));
1295 n = sizeof (uint64_t) * NBBY - size * NBBY;
1296
1297 dt_cg_setx(dlp, reg, n);
1298
1299 instr = DIF_INSTR_FMT(DIF_OP_SLL, dnp->dn_reg, reg, dnp->dn_reg);
1300 dt_irlist_append(dlp, dt_cg_node_alloc(DT_LBL_NONE, instr));
1301

--- 80 unchanged lines hidden (view full) ---

1382 strp->dn_string = strdup(buf);
1383
1384 if (dtrace_lookup_by_type(dtp, DTRACE_OBJ_EVERY, buf, &dtt) < 0)
1385 return;
1386
1387 typs->dn_value = ctf_type_size(dtt.dtt_ctfp, dtt.dtt_type);
1388}
1389
1390typedef struct dt_xlmemb {
1391 dt_ident_t *dtxl_idp; /* translated ident */
1392 dt_irlist_t *dtxl_dlp; /* instruction list */
1393 dt_regset_t *dtxl_drp; /* register set */
1394 int dtxl_sreg; /* location of the translation input */
1395 int dtxl_dreg; /* location of our allocated buffer */
1396} dt_xlmemb_t;
1397
1398/*ARGSUSED*/
1399static int
1400dt_cg_xlate_member(const char *name, ctf_id_t type, ulong_t off, void *arg)
1401{
1402 dt_xlmemb_t *dx = arg;
1403 dt_ident_t *idp = dx->dtxl_idp;
1404 dt_irlist_t *dlp = dx->dtxl_dlp;
1405 dt_regset_t *drp = dx->dtxl_drp;
1406
1407 dt_node_t *mnp;
1408 dt_xlator_t *dxp;
1409
1410 int reg, treg;
1411 uint32_t instr;
1412 size_t size;
1413
1414 /* Generate code for the translation. */
1415 dxp = idp->di_data;
1416 mnp = dt_xlator_member(dxp, name);
1417
1418 /* If there's no translator for the given member, skip it. */
1419 if (mnp == NULL)
1420 return (0);
1421
1422 dxp->dx_ident->di_flags |= DT_IDFLG_CGREG;
1423 dxp->dx_ident->di_id = dx->dtxl_sreg;
1424
1425 dt_cg_node(mnp->dn_membexpr, dlp, drp);
1426
1427 dxp->dx_ident->di_flags &= ~DT_IDFLG_CGREG;
1428 dxp->dx_ident->di_id = 0;
1429
1430 treg = mnp->dn_membexpr->dn_reg;
1431
1432 /* Compute the offset into our buffer and store the result there. */
1433 reg = dt_regset_alloc(drp);
1434
1435 dt_cg_setx(dlp, reg, off / NBBY);
1436 instr = DIF_INSTR_FMT(DIF_OP_ADD, dx->dtxl_dreg, reg, reg);
1437 dt_irlist_append(dlp, dt_cg_node_alloc(DT_LBL_NONE, instr));
1438
1439 size = ctf_type_size(mnp->dn_membexpr->dn_ctfp,
1440 mnp->dn_membexpr->dn_type);
1441 if (dt_node_is_scalar(mnp->dn_membexpr)) {
1442 /*
1443 * Copying scalars is simple.
1444 */
1445 switch (size) {
1446 case 1:
1447 instr = DIF_INSTR_STORE(DIF_OP_STB, treg, reg);
1448 break;
1449 case 2:
1450 instr = DIF_INSTR_STORE(DIF_OP_STH, treg, reg);
1451 break;
1452 case 4:
1453 instr = DIF_INSTR_STORE(DIF_OP_STW, treg, reg);
1454 break;
1455 case 8:
1456 instr = DIF_INSTR_STORE(DIF_OP_STX, treg, reg);
1457 break;
1458 default:
1459 xyerror(D_UNKNOWN, "internal error -- unexpected "
1460 "size: %lu\n", (ulong_t)size);
1461 }
1462
1463 dt_irlist_append(dlp, dt_cg_node_alloc(DT_LBL_NONE, instr));
1464
1465 } else if (dt_node_is_string(mnp->dn_membexpr)) {
1466 int szreg;
1467
1468 /*
1469 * Use the copys instruction for strings.
1470 */
1471 szreg = dt_regset_alloc(drp);
1472 dt_cg_setx(dlp, szreg, size);
1473 instr = DIF_INSTR_COPYS(treg, szreg, reg);
1474 dt_irlist_append(dlp, dt_cg_node_alloc(DT_LBL_NONE, instr));
1475 dt_regset_free(drp, szreg);
1476 } else {
1477 int szreg;
1478
1479 /*
1480 * If it's anything else then we'll just bcopy it.
1481 */
1482 szreg = dt_regset_alloc(drp);
1483 dt_cg_setx(dlp, szreg, size);
1484 dt_irlist_append(dlp,
1485 dt_cg_node_alloc(DT_LBL_NONE, DIF_INSTR_FLUSHTS));
1486 instr = DIF_INSTR_PUSHTS(DIF_OP_PUSHTV, DIF_TYPE_CTF,
1487 DIF_REG_R0, treg);
1488 dt_irlist_append(dlp, dt_cg_node_alloc(DT_LBL_NONE, instr));
1489 instr = DIF_INSTR_PUSHTS(DIF_OP_PUSHTV, DIF_TYPE_CTF,
1490 DIF_REG_R0, reg);
1491 dt_irlist_append(dlp, dt_cg_node_alloc(DT_LBL_NONE, instr));
1492 instr = DIF_INSTR_PUSHTS(DIF_OP_PUSHTV, DIF_TYPE_CTF,
1493 DIF_REG_R0, szreg);
1494 dt_irlist_append(dlp, dt_cg_node_alloc(DT_LBL_NONE, instr));
1495 instr = DIF_INSTR_CALL(DIF_SUBR_BCOPY, szreg);
1496 dt_irlist_append(dlp, dt_cg_node_alloc(DT_LBL_NONE, instr));
1497 dt_regset_free(drp, szreg);
1498 }
1499
1500 dt_regset_free(drp, reg);
1501 dt_regset_free(drp, treg);
1502
1503 return (0);
1504}
1505
1506/*
1507 * If we're expanding a translated type, we create an appropriately sized
1508 * buffer with alloca() and then translate each member into it.
1509 */
1510static int
1511dt_cg_xlate_expand(dt_node_t *dnp, dt_ident_t *idp, dt_irlist_t *dlp,
1512 dt_regset_t *drp)
1513{
1514 dt_xlmemb_t dlm;
1515 uint32_t instr;
1516 int dreg;
1517 size_t size;
1518
1519 dreg = dt_regset_alloc(drp);
1520 size = ctf_type_size(dnp->dn_ident->di_ctfp, dnp->dn_ident->di_type);
1521
1522 /* Call alloca() to create the buffer. */
1523 dt_cg_setx(dlp, dreg, size);
1524
1525 dt_irlist_append(dlp, dt_cg_node_alloc(DT_LBL_NONE, DIF_INSTR_FLUSHTS));
1526
1527 instr = DIF_INSTR_PUSHTS(DIF_OP_PUSHTV, DIF_TYPE_CTF, DIF_REG_R0, dreg);
1528 dt_irlist_append(dlp, dt_cg_node_alloc(DT_LBL_NONE, instr));
1529
1530 instr = DIF_INSTR_CALL(DIF_SUBR_ALLOCA, dreg);
1531 dt_irlist_append(dlp, dt_cg_node_alloc(DT_LBL_NONE, instr));
1532
1533 /* Generate the translation for each member. */
1534 dlm.dtxl_idp = idp;
1535 dlm.dtxl_dlp = dlp;
1536 dlm.dtxl_drp = drp;
1537 dlm.dtxl_sreg = dnp->dn_reg;
1538 dlm.dtxl_dreg = dreg;
1539 (void) ctf_member_iter(dnp->dn_ident->di_ctfp,
1540 dnp->dn_ident->di_type, dt_cg_xlate_member,
1541 &dlm);
1542
1543 return (dreg);
1544}
1545
1375static void
1376dt_cg_node(dt_node_t *dnp, dt_irlist_t *dlp, dt_regset_t *drp)
1377{
1378 ctf_file_t *ctfp = dnp->dn_ctfp;
1379 ctf_file_t *octfp;
1380 ctf_membinfo_t m;
1381 ctf_id_t type;
1382
1383 dif_instr_t instr;
1384 dt_ident_t *idp;
1385 ssize_t stroff;
1386 uint_t op;
1546static void
1547dt_cg_node(dt_node_t *dnp, dt_irlist_t *dlp, dt_regset_t *drp)
1548{
1549 ctf_file_t *ctfp = dnp->dn_ctfp;
1550 ctf_file_t *octfp;
1551 ctf_membinfo_t m;
1552 ctf_id_t type;
1553
1554 dif_instr_t instr;
1555 dt_ident_t *idp;
1556 ssize_t stroff;
1557 uint_t op;
1387 int reg;
1388
1389 switch (dnp->dn_op) {
1390 case DT_TOK_COMMA:
1391 dt_cg_node(dnp->dn_left, dlp, drp);
1392 dt_regset_free(drp, dnp->dn_left->dn_reg);
1393 dt_cg_node(dnp->dn_right, dlp, drp);
1394 dnp->dn_reg = dnp->dn_right->dn_reg;
1395 break;

--- 185 unchanged lines hidden (view full) ---

1581
1582 dt_irlist_append(dlp, dt_cg_node_alloc(DT_LBL_NONE, instr));
1583 break;
1584
1585 case DT_TOK_DEREF:
1586 dt_cg_node(dnp->dn_child, dlp, drp);
1587 dnp->dn_reg = dnp->dn_child->dn_reg;
1588
1558
1559 switch (dnp->dn_op) {
1560 case DT_TOK_COMMA:
1561 dt_cg_node(dnp->dn_left, dlp, drp);
1562 dt_regset_free(drp, dnp->dn_left->dn_reg);
1563 dt_cg_node(dnp->dn_right, dlp, drp);
1564 dnp->dn_reg = dnp->dn_right->dn_reg;
1565 break;

--- 185 unchanged lines hidden (view full) ---

1751
1752 dt_irlist_append(dlp, dt_cg_node_alloc(DT_LBL_NONE, instr));
1753 break;
1754
1755 case DT_TOK_DEREF:
1756 dt_cg_node(dnp->dn_child, dlp, drp);
1757 dnp->dn_reg = dnp->dn_child->dn_reg;
1758
1589 if (!(dnp->dn_flags & DT_NF_REF)) {
1759 if (dt_node_is_dynamic(dnp->dn_child)) {
1760 int reg;
1761 idp = dt_node_resolve(dnp->dn_child, DT_IDENT_XLPTR);
1762 assert(idp != NULL);
1763 reg = dt_cg_xlate_expand(dnp, idp, dlp, drp);
1764
1765 dt_regset_free(drp, dnp->dn_child->dn_reg);
1766 dnp->dn_reg = reg;
1767
1768 } else if (!(dnp->dn_flags & DT_NF_REF)) {
1590 uint_t ubit = dnp->dn_flags & DT_NF_USERLAND;
1591
1592 /*
1593 * Save and restore DT_NF_USERLAND across dt_cg_load():
1594 * we need the sign bit from dnp and the user bit from
1595 * dnp->dn_child in order to get the proper opcode.
1596 */
1597 dnp->dn_flags |=

--- 19 unchanged lines hidden (view full) ---

1617
1618 dnp->dn_child->dn_flags &= ~DT_NF_REF;
1619 dnp->dn_child->dn_flags |= rbit;
1620 break;
1621 }
1622
1623 case DT_TOK_SIZEOF: {
1624 size_t size = dt_node_sizeof(dnp->dn_child);
1769 uint_t ubit = dnp->dn_flags & DT_NF_USERLAND;
1770
1771 /*
1772 * Save and restore DT_NF_USERLAND across dt_cg_load():
1773 * we need the sign bit from dnp and the user bit from
1774 * dnp->dn_child in order to get the proper opcode.
1775 */
1776 dnp->dn_flags |=

--- 19 unchanged lines hidden (view full) ---

1796
1797 dnp->dn_child->dn_flags &= ~DT_NF_REF;
1798 dnp->dn_child->dn_flags |= rbit;
1799 break;
1800 }
1801
1802 case DT_TOK_SIZEOF: {
1803 size_t size = dt_node_sizeof(dnp->dn_child);
1625
1626 if ((dnp->dn_reg = dt_regset_alloc(drp)) == -1)
1627 longjmp(yypcb->pcb_jmpbuf, EDT_NOREG);
1628
1804 dnp->dn_reg = dt_regset_alloc(drp);
1629 assert(size != 0);
1630 dt_cg_setx(dlp, dnp->dn_reg, size);
1631 break;
1632 }
1633
1634 case DT_TOK_STRINGOF:
1635 dt_cg_node(dnp->dn_child, dlp, drp);
1636 dnp->dn_reg = dnp->dn_child->dn_reg;

--- 8 unchanged lines hidden (view full) ---

1645 * the corresponding member, pre-computed for us in dn_members.
1646 */
1647 if (dnp->dn_kind == DT_NODE_XLATOR) {
1648 dt_xlator_t *dxp = dnp->dn_xlator;
1649
1650 assert(dxp->dx_ident->di_flags & DT_IDFLG_CGREG);
1651 assert(dxp->dx_ident->di_id != 0);
1652
1805 assert(size != 0);
1806 dt_cg_setx(dlp, dnp->dn_reg, size);
1807 break;
1808 }
1809
1810 case DT_TOK_STRINGOF:
1811 dt_cg_node(dnp->dn_child, dlp, drp);
1812 dnp->dn_reg = dnp->dn_child->dn_reg;

--- 8 unchanged lines hidden (view full) ---

1821 * the corresponding member, pre-computed for us in dn_members.
1822 */
1823 if (dnp->dn_kind == DT_NODE_XLATOR) {
1824 dt_xlator_t *dxp = dnp->dn_xlator;
1825
1826 assert(dxp->dx_ident->di_flags & DT_IDFLG_CGREG);
1827 assert(dxp->dx_ident->di_id != 0);
1828
1653 if ((dnp->dn_reg = dt_regset_alloc(drp)) == -1)
1654 longjmp(yypcb->pcb_jmpbuf, EDT_NOREG);
1829 dnp->dn_reg = dt_regset_alloc(drp);
1655
1656 if (dxp->dx_arg == -1) {
1657 instr = DIF_INSTR_MOV(
1658 dxp->dx_ident->di_id, dnp->dn_reg);
1659 dt_irlist_append(dlp,
1660 dt_cg_node_alloc(DT_LBL_NONE, instr));
1661 op = DIF_OP_XLATE;
1662 } else

--- 67 unchanged lines hidden (view full) ---

1730
1731 if ((ctfp = dt_cg_membinfo(octfp = ctfp, type,
1732 dnp->dn_right->dn_string, &m)) == NULL) {
1733 yypcb->pcb_hdl->dt_ctferr = ctf_errno(octfp);
1734 longjmp(yypcb->pcb_jmpbuf, EDT_CTF);
1735 }
1736
1737 if (m.ctm_offset != 0) {
1830
1831 if (dxp->dx_arg == -1) {
1832 instr = DIF_INSTR_MOV(
1833 dxp->dx_ident->di_id, dnp->dn_reg);
1834 dt_irlist_append(dlp,
1835 dt_cg_node_alloc(DT_LBL_NONE, instr));
1836 op = DIF_OP_XLATE;
1837 } else

--- 67 unchanged lines hidden (view full) ---

1905
1906 if ((ctfp = dt_cg_membinfo(octfp = ctfp, type,
1907 dnp->dn_right->dn_string, &m)) == NULL) {
1908 yypcb->pcb_hdl->dt_ctferr = ctf_errno(octfp);
1909 longjmp(yypcb->pcb_jmpbuf, EDT_CTF);
1910 }
1911
1912 if (m.ctm_offset != 0) {
1738 if ((reg = dt_regset_alloc(drp)) == -1)
1739 longjmp(yypcb->pcb_jmpbuf, EDT_NOREG);
1913 int reg;
1740
1914
1915 reg = dt_regset_alloc(drp);
1916
1741 /*
1742 * If the offset is not aligned on a byte boundary, it
1743 * is a bit-field member and we will extract the value
1744 * bits below after we generate the appropriate load.
1745 */
1746 dt_cg_setx(dlp, reg, m.ctm_offset / NBBY);
1747
1748 instr = DIF_INSTR_FMT(DIF_OP_ADD,

--- 28 unchanged lines hidden (view full) ---

1777 if (dnp->dn_flags & DT_NF_BITFIELD)
1778 dt_cg_field_get(dnp, dlp, drp, ctfp, &m);
1779 }
1780
1781 dnp->dn_reg = dnp->dn_left->dn_reg;
1782 break;
1783
1784 case DT_TOK_STRING:
1917 /*
1918 * If the offset is not aligned on a byte boundary, it
1919 * is a bit-field member and we will extract the value
1920 * bits below after we generate the appropriate load.
1921 */
1922 dt_cg_setx(dlp, reg, m.ctm_offset / NBBY);
1923
1924 instr = DIF_INSTR_FMT(DIF_OP_ADD,

--- 28 unchanged lines hidden (view full) ---

1953 if (dnp->dn_flags & DT_NF_BITFIELD)
1954 dt_cg_field_get(dnp, dlp, drp, ctfp, &m);
1955 }
1956
1957 dnp->dn_reg = dnp->dn_left->dn_reg;
1958 break;
1959
1960 case DT_TOK_STRING:
1785 if ((dnp->dn_reg = dt_regset_alloc(drp)) == -1)
1786 longjmp(yypcb->pcb_jmpbuf, EDT_NOREG);
1961 dnp->dn_reg = dt_regset_alloc(drp);
1787
1788 assert(dnp->dn_kind == DT_NODE_STRING);
1789 stroff = dt_strtab_insert(yypcb->pcb_strtab, dnp->dn_string);
1790
1791 if (stroff == -1L)
1792 longjmp(yypcb->pcb_jmpbuf, EDT_NOMEM);
1793 if (stroff > DIF_STROFF_MAX)
1794 longjmp(yypcb->pcb_jmpbuf, EDT_STR2BIG);

--- 6 unchanged lines hidden (view full) ---

1801 /*
1802 * If the specified identifier is a variable on which we have
1803 * set the code generator register flag, then this variable
1804 * has already had code generated for it and saved in di_id.
1805 * Allocate a new register and copy the existing value to it.
1806 */
1807 if (dnp->dn_kind == DT_NODE_VAR &&
1808 (dnp->dn_ident->di_flags & DT_IDFLG_CGREG)) {
1962
1963 assert(dnp->dn_kind == DT_NODE_STRING);
1964 stroff = dt_strtab_insert(yypcb->pcb_strtab, dnp->dn_string);
1965
1966 if (stroff == -1L)
1967 longjmp(yypcb->pcb_jmpbuf, EDT_NOMEM);
1968 if (stroff > DIF_STROFF_MAX)
1969 longjmp(yypcb->pcb_jmpbuf, EDT_STR2BIG);

--- 6 unchanged lines hidden (view full) ---

1976 /*
1977 * If the specified identifier is a variable on which we have
1978 * set the code generator register flag, then this variable
1979 * has already had code generated for it and saved in di_id.
1980 * Allocate a new register and copy the existing value to it.
1981 */
1982 if (dnp->dn_kind == DT_NODE_VAR &&
1983 (dnp->dn_ident->di_flags & DT_IDFLG_CGREG)) {
1809 if ((dnp->dn_reg = dt_regset_alloc(drp)) == -1)
1810 longjmp(yypcb->pcb_jmpbuf, EDT_NOREG);
1984 dnp->dn_reg = dt_regset_alloc(drp);
1811 instr = DIF_INSTR_MOV(dnp->dn_ident->di_id,
1812 dnp->dn_reg);
1813 dt_irlist_append(dlp,
1814 dt_cg_node_alloc(DT_LBL_NONE, instr));
1815 break;
1816 }
1817
1818 /*

--- 24 unchanged lines hidden (view full) ---

1843 break;
1844
1845 default:
1846 break;
1847 }
1848
1849 dt_cg_arglist(dnp->dn_ident, dnp->dn_args, dlp, drp);
1850
1985 instr = DIF_INSTR_MOV(dnp->dn_ident->di_id,
1986 dnp->dn_reg);
1987 dt_irlist_append(dlp,
1988 dt_cg_node_alloc(DT_LBL_NONE, instr));
1989 break;
1990 }
1991
1992 /*

--- 24 unchanged lines hidden (view full) ---

2017 break;
2018
2019 default:
2020 break;
2021 }
2022
2023 dt_cg_arglist(dnp->dn_ident, dnp->dn_args, dlp, drp);
2024
1851 if ((dnp->dn_reg = dt_regset_alloc(drp)) == -1)
1852 longjmp(yypcb->pcb_jmpbuf, EDT_NOREG);
2025 dnp->dn_reg = dt_regset_alloc(drp);
2026 instr = DIF_INSTR_CALL(dnp->dn_ident->di_id,
2027 dnp->dn_reg);
1853
2028
1854 instr = DIF_INSTR_CALL(
1855 dnp->dn_ident->di_id, dnp->dn_reg);
1856
1857 dt_irlist_append(dlp,
1858 dt_cg_node_alloc(DT_LBL_NONE, instr));
1859
1860 break;
1861 }
1862
1863 case DT_NODE_VAR:
1864 if (dnp->dn_ident->di_kind == DT_IDENT_XLSOU ||

--- 10 unchanged lines hidden (view full) ---

1875 if (dnp->dn_ident->di_kind == DT_IDENT_ARRAY) {
1876 if (dnp->dn_ident->di_id > DIF_VAR_ARRAY_MAX)
1877 dt_cg_assoc_op(dnp, dlp, drp);
1878 else
1879 dt_cg_array_op(dnp, dlp, drp);
1880 break;
1881 }
1882
2029 dt_irlist_append(dlp,
2030 dt_cg_node_alloc(DT_LBL_NONE, instr));
2031
2032 break;
2033 }
2034
2035 case DT_NODE_VAR:
2036 if (dnp->dn_ident->di_kind == DT_IDENT_XLSOU ||

--- 10 unchanged lines hidden (view full) ---

2047 if (dnp->dn_ident->di_kind == DT_IDENT_ARRAY) {
2048 if (dnp->dn_ident->di_id > DIF_VAR_ARRAY_MAX)
2049 dt_cg_assoc_op(dnp, dlp, drp);
2050 else
2051 dt_cg_array_op(dnp, dlp, drp);
2052 break;
2053 }
2054
1883 if ((dnp->dn_reg = dt_regset_alloc(drp)) == -1)
1884 longjmp(yypcb->pcb_jmpbuf, EDT_NOREG);
2055 dnp->dn_reg = dt_regset_alloc(drp);
1885
1886 if (dnp->dn_ident->di_flags & DT_IDFLG_LOCAL)
1887 op = DIF_OP_LDLS;
1888 else if (dnp->dn_ident->di_flags & DT_IDFLG_TLS)
1889 op = DIF_OP_LDTS;
1890 else
1891 op = DIF_OP_LDGS;
1892

--- 13 unchanged lines hidden (view full) ---

1906
1907 if (dtrace_lookup_by_name(dtp,
1908 sip->dts_object, sip->dts_name, &sym, NULL) == -1) {
1909 xyerror(D_UNKNOWN, "cg failed for symbol %s`%s:"
1910 " %s\n", sip->dts_object, sip->dts_name,
1911 dtrace_errmsg(dtp, dtrace_errno(dtp)));
1912 }
1913
2056
2057 if (dnp->dn_ident->di_flags & DT_IDFLG_LOCAL)
2058 op = DIF_OP_LDLS;
2059 else if (dnp->dn_ident->di_flags & DT_IDFLG_TLS)
2060 op = DIF_OP_LDTS;
2061 else
2062 op = DIF_OP_LDGS;
2063

--- 13 unchanged lines hidden (view full) ---

2077
2078 if (dtrace_lookup_by_name(dtp,
2079 sip->dts_object, sip->dts_name, &sym, NULL) == -1) {
2080 xyerror(D_UNKNOWN, "cg failed for symbol %s`%s:"
2081 " %s\n", sip->dts_object, sip->dts_name,
2082 dtrace_errmsg(dtp, dtrace_errno(dtp)));
2083 }
2084
1914 if ((dnp->dn_reg = dt_regset_alloc(drp)) == -1)
1915 longjmp(yypcb->pcb_jmpbuf, EDT_NOREG);
1916
2085 dnp->dn_reg = dt_regset_alloc(drp);
1917 dt_cg_xsetx(dlp, dnp->dn_ident,
1918 DT_LBL_NONE, dnp->dn_reg, sym.st_value);
1919
1920 if (!(dnp->dn_flags & DT_NF_REF)) {
1921 instr = DIF_INSTR_LOAD(dt_cg_load(dnp, ctfp,
1922 dnp->dn_type), dnp->dn_reg, dnp->dn_reg);
1923 dt_irlist_append(dlp,
1924 dt_cg_node_alloc(DT_LBL_NONE, instr));
1925 }
1926 break;
1927 }
1928
1929 default:
1930 xyerror(D_UNKNOWN, "internal error -- node type %u is "
1931 "not valid for an identifier\n", dnp->dn_kind);
1932 }
1933 break;
1934
1935 case DT_TOK_INT:
2086 dt_cg_xsetx(dlp, dnp->dn_ident,
2087 DT_LBL_NONE, dnp->dn_reg, sym.st_value);
2088
2089 if (!(dnp->dn_flags & DT_NF_REF)) {
2090 instr = DIF_INSTR_LOAD(dt_cg_load(dnp, ctfp,
2091 dnp->dn_type), dnp->dn_reg, dnp->dn_reg);
2092 dt_irlist_append(dlp,
2093 dt_cg_node_alloc(DT_LBL_NONE, instr));
2094 }
2095 break;
2096 }
2097
2098 default:
2099 xyerror(D_UNKNOWN, "internal error -- node type %u is "
2100 "not valid for an identifier\n", dnp->dn_kind);
2101 }
2102 break;
2103
2104 case DT_TOK_INT:
1936 if ((dnp->dn_reg = dt_regset_alloc(drp)) == -1)
1937 longjmp(yypcb->pcb_jmpbuf, EDT_NOREG);
1938
2105 dnp->dn_reg = dt_regset_alloc(drp);
1939 dt_cg_setx(dlp, dnp->dn_reg, dnp->dn_value);
1940 break;
1941
1942 default:
1943 xyerror(D_UNKNOWN, "internal error -- token type %u is not a "
1944 "valid D compilation token\n", dnp->dn_op);
1945 }
1946}
1947
1948void
1949dt_cg(dt_pcb_t *pcb, dt_node_t *dnp)
1950{
1951 dif_instr_t instr;
1952 dt_xlator_t *dxp;
2106 dt_cg_setx(dlp, dnp->dn_reg, dnp->dn_value);
2107 break;
2108
2109 default:
2110 xyerror(D_UNKNOWN, "internal error -- token type %u is not a "
2111 "valid D compilation token\n", dnp->dn_op);
2112 }
2113}
2114
2115void
2116dt_cg(dt_pcb_t *pcb, dt_node_t *dnp)
2117{
2118 dif_instr_t instr;
2119 dt_xlator_t *dxp;
2120 dt_ident_t *idp;
1953
1954 if (pcb->pcb_regs == NULL && (pcb->pcb_regs =
1955 dt_regset_create(pcb->pcb_hdl->dt_conf.dtc_difintregs)) == NULL)
1956 longjmp(pcb->pcb_jmpbuf, EDT_NOMEM);
1957
1958 dt_regset_reset(pcb->pcb_regs);
1959 (void) dt_regset_alloc(pcb->pcb_regs); /* allocate %r0 */
1960

--- 10 unchanged lines hidden (view full) ---

1971 longjmp(pcb->pcb_jmpbuf, EDT_NOMEM);
1972
1973 dt_irlist_destroy(&pcb->pcb_ir);
1974 dt_irlist_create(&pcb->pcb_ir);
1975
1976 assert(pcb->pcb_dret == NULL);
1977 pcb->pcb_dret = dnp;
1978
2121
2122 if (pcb->pcb_regs == NULL && (pcb->pcb_regs =
2123 dt_regset_create(pcb->pcb_hdl->dt_conf.dtc_difintregs)) == NULL)
2124 longjmp(pcb->pcb_jmpbuf, EDT_NOMEM);
2125
2126 dt_regset_reset(pcb->pcb_regs);
2127 (void) dt_regset_alloc(pcb->pcb_regs); /* allocate %r0 */
2128

--- 10 unchanged lines hidden (view full) ---

2139 longjmp(pcb->pcb_jmpbuf, EDT_NOMEM);
2140
2141 dt_irlist_destroy(&pcb->pcb_ir);
2142 dt_irlist_create(&pcb->pcb_ir);
2143
2144 assert(pcb->pcb_dret == NULL);
2145 pcb->pcb_dret = dnp;
2146
1979 if (dt_node_is_dynamic(dnp)) {
2147 if (dt_node_resolve(dnp, DT_IDENT_XLPTR) != NULL) {
1980 dnerror(dnp, D_CG_DYN, "expression cannot evaluate to result "
2148 dnerror(dnp, D_CG_DYN, "expression cannot evaluate to result "
1981 "of dynamic type\n");
2149 "of a translated pointer\n");
1982 }
1983
1984 /*
1985 * If we're generating code for a translator body, assign the input
1986 * parameter to the first available register (i.e. caller passes %r1).
1987 */
1988 if (dnp->dn_kind == DT_NODE_MEMBER) {
1989 dxp = dnp->dn_membxlator;
1990 dnp = dnp->dn_membexpr;
1991
1992 dxp->dx_ident->di_flags |= DT_IDFLG_CGREG;
1993 dxp->dx_ident->di_id = dt_regset_alloc(pcb->pcb_regs);
1994 }
1995
1996 dt_cg_node(dnp, &pcb->pcb_ir, pcb->pcb_regs);
2150 }
2151
2152 /*
2153 * If we're generating code for a translator body, assign the input
2154 * parameter to the first available register (i.e. caller passes %r1).
2155 */
2156 if (dnp->dn_kind == DT_NODE_MEMBER) {
2157 dxp = dnp->dn_membxlator;
2158 dnp = dnp->dn_membexpr;
2159
2160 dxp->dx_ident->di_flags |= DT_IDFLG_CGREG;
2161 dxp->dx_ident->di_id = dt_regset_alloc(pcb->pcb_regs);
2162 }
2163
2164 dt_cg_node(dnp, &pcb->pcb_ir, pcb->pcb_regs);
2165
2166 if ((idp = dt_node_resolve(dnp, DT_IDENT_XLSOU)) != NULL) {
2167 int reg = dt_cg_xlate_expand(dnp, idp,
2168 &pcb->pcb_ir, pcb->pcb_regs);
2169 dt_regset_free(pcb->pcb_regs, dnp->dn_reg);
2170 dnp->dn_reg = reg;
2171 }
2172
1997 instr = DIF_INSTR_RET(dnp->dn_reg);
1998 dt_regset_free(pcb->pcb_regs, dnp->dn_reg);
1999 dt_irlist_append(&pcb->pcb_ir, dt_cg_node_alloc(DT_LBL_NONE, instr));
2000
2001 if (dnp->dn_kind == DT_NODE_MEMBER) {
2002 dt_regset_free(pcb->pcb_regs, dxp->dx_ident->di_id);
2003 dxp->dx_ident->di_id = 0;
2004 dxp->dx_ident->di_flags &= ~DT_IDFLG_CGREG;
2005 }
2173 instr = DIF_INSTR_RET(dnp->dn_reg);
2174 dt_regset_free(pcb->pcb_regs, dnp->dn_reg);
2175 dt_irlist_append(&pcb->pcb_ir, dt_cg_node_alloc(DT_LBL_NONE, instr));
2176
2177 if (dnp->dn_kind == DT_NODE_MEMBER) {
2178 dt_regset_free(pcb->pcb_regs, dxp->dx_ident->di_id);
2179 dxp->dx_ident->di_id = 0;
2180 dxp->dx_ident->di_flags &= ~DT_IDFLG_CGREG;
2181 }
2182
2183 dt_regset_free(pcb->pcb_regs, 0);
2184 dt_regset_assert_free(pcb->pcb_regs);
2006}
2185}